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Dominik Geyerb46acba2008-05-16 12:55:55 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2008 Stefan Wildemann <stefan.wildemann@kontron.com>
5 * Copyright (C) 2008 Claus Gindhart <claus.gindhart@kontron.com>
6 * Copyright (C) 2008 Dominik Geyer <dominik.geyer@kontron.com>
Stefan Reinauera9424d52008-06-27 16:28:34 +00007 * Copyright (C) 2008 coresystems GmbH <info@coresystems.de>
Dominik Geyerb46acba2008-05-16 12:55:55 +00008 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Dominik Geyerb46acba2008-05-16 12:55:55 +000022 */
23
24/*
25 * This module is designed for supporting the devices
26 * ST M25P40
27 * ST M25P80
28 * ST M25P16
29 * ST M25P32 already tested
30 * ST M25P64
31 * AT 25DF321 already tested
32 *
33 */
34
Dominik Geyerb46acba2008-05-16 12:55:55 +000035#include <string.h>
Dominik Geyerb46acba2008-05-16 12:55:55 +000036#include <sys/mman.h>
Dominik Geyerb46acba2008-05-16 12:55:55 +000037#include "flash.h"
38#include "spi.h"
39
Stefan Reinauera9424d52008-06-27 16:28:34 +000040/* ICH9 controller register definition */
41#define ICH9_REG_FADDR 0x08 /* 32 Bits */
42#define ICH9_REG_FDATA0 0x10 /* 64 Bytes */
43
44#define ICH9_REG_SSFS 0x90 /* 08 Bits */
Dominik Geyerb46acba2008-05-16 12:55:55 +000045#define SSFS_SCIP 0x00000001
46#define SSFS_CDS 0x00000004
47#define SSFS_FCERR 0x00000008
48#define SSFS_AEL 0x00000010
Stefan Reinauera9424d52008-06-27 16:28:34 +000049
50#define ICH9_REG_SSFC 0x91 /* 24 Bits */
Dominik Geyerb46acba2008-05-16 12:55:55 +000051#define SSFC_SCGO 0x00000200
52#define SSFC_ACS 0x00000400
53#define SSFC_SPOP 0x00000800
54#define SSFC_COP 0x00001000
55#define SSFC_DBC 0x00010000
56#define SSFC_DS 0x00400000
57#define SSFC_SME 0x00800000
58#define SSFC_SCF 0x01000000
59#define SSFC_SCF_20MHZ 0x00000000
60#define SSFC_SCF_33MHZ 0x01000000
Stefan Reinauera9424d52008-06-27 16:28:34 +000061
62#define ICH9_REG_PREOP 0x94 /* 16 Bits */
63#define ICH9_REG_OPTYPE 0x96 /* 16 Bits */
64#define ICH9_REG_OPMENU 0x98 /* 64 Bits */
Dominik Geyerb46acba2008-05-16 12:55:55 +000065
66// ICH9R SPI commands
67#define SPI_OPCODE_TYPE_READ_NO_ADDRESS 0
68#define SPI_OPCODE_TYPE_WRITE_NO_ADDRESS 1
69#define SPI_OPCODE_TYPE_READ_WITH_ADDRESS 2
70#define SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS 3
71
Stefan Reinauera9424d52008-06-27 16:28:34 +000072// ICH7 registers
73#define ICH7_REG_SPIS 0x00 /* 16 Bits */
74#define SPIS_SCIP 0x00000001
75#define SPIS_CDS 0x00000004
76#define SPIS_FCERR 0x00000008
77
Rudolf Marek3fdbccf2008-06-30 21:38:30 +000078/* VIA SPI is compatible with ICH7, but maxdata
79 to transfer is 16 bytes.
80
81 DATA byte count on ICH7 is 8:13, on VIA 8:11
82
83 bit 12 is port select CS0 CS1
84 bit 13 is FAST READ enable
85 bit 7 is used with fast read and one shot controls CS de-assert?
86*/
87
Stefan Reinauera9424d52008-06-27 16:28:34 +000088#define ICH7_REG_SPIC 0x02 /* 16 Bits */
89#define SPIC_SCGO 0x0002
90#define SPIC_ACS 0x0004
91#define SPIC_SPOP 0x0008
Rudolf Marek3fdbccf2008-06-30 21:38:30 +000092#define SPIC_DS 0x4000
Stefan Reinauera9424d52008-06-27 16:28:34 +000093
94#define ICH7_REG_SPIA 0x04 /* 32 Bits */
95#define ICH7_REG_SPID0 0x08 /* 64 Bytes */
96#define ICH7_REG_PREOP 0x54 /* 16 Bits */
97#define ICH7_REG_OPTYPE 0x56 /* 16 Bits */
98#define ICH7_REG_OPMENU 0x58 /* 64 Bits */
99
FENG yu ningc05a2952008-12-08 18:16:58 +0000100/* ICH SPI configuration lock-down. May be set during chipset enabling. */
101int ichspi_lock = 0;
102
Dominik Geyerb46acba2008-05-16 12:55:55 +0000103typedef struct _OPCODE {
104 uint8_t opcode; //This commands spi opcode
105 uint8_t spi_type; //This commands spi type
106 uint8_t atomic; //Use preop: (0: none, 1: preop0, 2: preop1
107} OPCODE;
108
109/* Opcode definition:
110 * Preop 1: Write Enable
111 * Preop 2: Write Status register enable
112 *
113 * OP 0: Write address
114 * OP 1: Read Address
115 * OP 2: ERASE block
116 * OP 3: Read Status register
117 * OP 4: Read ID
118 * OP 5: Write Status register
119 * OP 6: chip private (read JDEC id)
120 * OP 7: Chip erase
121 */
122typedef struct _OPCODES {
123 uint8_t preop[2];
124 OPCODE opcode[8];
125} OPCODES;
126
Stefan Reinauer325b5d42008-06-27 15:18:20 +0000127static OPCODES *curopcodes = NULL;
Dominik Geyerb46acba2008-05-16 12:55:55 +0000128
129/* HW access functions */
Uwe Hermann09e04f72009-05-16 22:36:00 +0000130static uint32_t REGREAD32(int X)
Dominik Geyerb46acba2008-05-16 12:55:55 +0000131{
Carl-Daniel Hailfinger78185dc2009-05-17 15:49:24 +0000132 return mmio_readl(spibar + X);
Stefan Reinauera9424d52008-06-27 16:28:34 +0000133}
134
Uwe Hermann09e04f72009-05-16 22:36:00 +0000135static uint16_t REGREAD16(int X)
Stefan Reinauera9424d52008-06-27 16:28:34 +0000136{
Carl-Daniel Hailfinger78185dc2009-05-17 15:49:24 +0000137 return mmio_readw(spibar + X);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000138}
139
Carl-Daniel Hailfinger78185dc2009-05-17 15:49:24 +0000140#define REGWRITE32(X,Y) mmio_writel(Y, spibar+X)
141#define REGWRITE16(X,Y) mmio_writew(Y, spibar+X)
142#define REGWRITE8(X,Y) mmio_writeb(Y, spibar+X)
Dominik Geyerb46acba2008-05-16 12:55:55 +0000143
Dominik Geyerb46acba2008-05-16 12:55:55 +0000144/* Common SPI functions */
Uwe Hermann09e04f72009-05-16 22:36:00 +0000145static int find_opcode(OPCODES *op, uint8_t opcode);
146static int find_preop(OPCODES *op, uint8_t preop);
FENG yu ningf041e9b2008-12-15 02:32:11 +0000147static int generate_opcodes(OPCODES * op);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000148static int program_opcodes(OPCODES * op);
Stefan Reinauer43119562008-11-02 19:51:50 +0000149static int run_opcode(OPCODE op, uint32_t offset,
Stefan Reinauer325b5d42008-06-27 15:18:20 +0000150 uint8_t datalength, uint8_t * data);
151static int ich_spi_read_page(struct flashchip *flash, uint8_t * buf,
Rudolf Marek3fdbccf2008-06-30 21:38:30 +0000152 int offset, int maxdata);
Stefan Reinauer325b5d42008-06-27 15:18:20 +0000153static int ich_spi_write_page(struct flashchip *flash, uint8_t * bytes,
Rudolf Marek3fdbccf2008-06-30 21:38:30 +0000154 int offset, int maxdata);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000155
FENG yu ningf041e9b2008-12-15 02:32:11 +0000156/* for pairing opcodes with their required preop */
157struct preop_opcode_pair {
158 uint8_t preop;
159 uint8_t opcode;
160};
161
162struct preop_opcode_pair pops[] = {
163 {JEDEC_WREN, JEDEC_BYTE_PROGRAM},
164 {JEDEC_WREN, JEDEC_SE}, /* sector erase */
165 {JEDEC_WREN, JEDEC_BE_52}, /* block erase */
166 {JEDEC_WREN, JEDEC_BE_D8}, /* block erase */
167 {JEDEC_WREN, JEDEC_CE_60}, /* chip erase */
168 {JEDEC_WREN, JEDEC_CE_C7}, /* chip erase */
169 {JEDEC_EWSR, JEDEC_WRSR},
170 {0,}
171};
172
Dominik Geyerb46acba2008-05-16 12:55:55 +0000173OPCODES O_ST_M25P = {
174 {
175 JEDEC_WREN,
Stefan Reinauer325b5d42008-06-27 15:18:20 +0000176 0},
Dominik Geyerb46acba2008-05-16 12:55:55 +0000177 {
Stefan Reinauer325b5d42008-06-27 15:18:20 +0000178 {JEDEC_BYTE_PROGRAM, SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS, 1}, // Write Byte
179 {JEDEC_READ, SPI_OPCODE_TYPE_READ_WITH_ADDRESS, 0}, // Read Data
180 {JEDEC_BE_D8, SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS, 1}, // Erase Sector
181 {JEDEC_RDSR, SPI_OPCODE_TYPE_READ_NO_ADDRESS, 0}, // Read Device Status Reg
182 {JEDEC_RES, SPI_OPCODE_TYPE_READ_WITH_ADDRESS, 0}, // Resume Deep Power-Down
183 {JEDEC_WRSR, SPI_OPCODE_TYPE_WRITE_NO_ADDRESS, 1}, // Write Status Register
184 {JEDEC_RDID, SPI_OPCODE_TYPE_READ_NO_ADDRESS, 0}, // Read JDEC ID
185 {JEDEC_CE_C7, SPI_OPCODE_TYPE_WRITE_NO_ADDRESS, 1}, // Bulk erase
186 }
Dominik Geyerb46acba2008-05-16 12:55:55 +0000187};
188
FENG yu ningc05a2952008-12-08 18:16:58 +0000189OPCODES O_EXISTING = {};
190
Uwe Hermann09e04f72009-05-16 22:36:00 +0000191static int find_opcode(OPCODES *op, uint8_t opcode)
FENG yu ningc05a2952008-12-08 18:16:58 +0000192{
193 int a;
194
195 for (a = 0; a < 8; a++) {
196 if (op->opcode[a].opcode == opcode)
197 return a;
198 }
199
200 return -1;
201}
202
Uwe Hermann09e04f72009-05-16 22:36:00 +0000203static int find_preop(OPCODES *op, uint8_t preop)
FENG yu ningc05a2952008-12-08 18:16:58 +0000204{
205 int a;
206
207 for (a = 0; a < 2; a++) {
208 if (op->preop[a] == preop)
209 return a;
210 }
211
212 return -1;
213}
214
FENG yu ningf041e9b2008-12-15 02:32:11 +0000215static int generate_opcodes(OPCODES * op)
FENG yu ningc05a2952008-12-08 18:16:58 +0000216{
FENG yu ningf041e9b2008-12-15 02:32:11 +0000217 int a, b, i;
FENG yu ningc05a2952008-12-08 18:16:58 +0000218 uint16_t preop, optype;
219 uint32_t opmenu[2];
FENG yu ningc05a2952008-12-08 18:16:58 +0000220
221 if (op == NULL) {
222 printf_debug("\n%s: null OPCODES pointer!\n", __FUNCTION__);
223 return -1;
224 }
225
226 switch (flashbus) {
227 case BUS_TYPE_ICH7_SPI:
228 case BUS_TYPE_VIA_SPI:
229 preop = REGREAD16(ICH7_REG_PREOP);
230 optype = REGREAD16(ICH7_REG_OPTYPE);
231 opmenu[0] = REGREAD32(ICH7_REG_OPMENU);
232 opmenu[1] = REGREAD32(ICH7_REG_OPMENU + 4);
233 break;
234 case BUS_TYPE_ICH9_SPI:
235 preop = REGREAD16(ICH9_REG_PREOP);
236 optype = REGREAD16(ICH9_REG_OPTYPE);
237 opmenu[0] = REGREAD32(ICH9_REG_OPMENU);
238 opmenu[1] = REGREAD32(ICH9_REG_OPMENU + 4);
239 break;
240 default:
241 printf_debug("%s: unsupported chipset\n", __FUNCTION__);
242 return -1;
243 }
244
245 op->preop[0] = (uint8_t) preop;
246 op->preop[1] = (uint8_t) (preop >> 8);
247
248 for (a = 0; a < 8; a++) {
249 op->opcode[a].spi_type = (uint8_t) (optype & 0x3);
250 optype >>= 2;
251 }
252
253 for (a = 0; a < 4; a++) {
254 op->opcode[a].opcode = (uint8_t) (opmenu[0] & 0xff);
255 opmenu[0] >>= 8;
256 }
257
258 for (a = 4; a < 8; a++) {
259 op->opcode[a].opcode = (uint8_t) (opmenu[1] & 0xff);
260 opmenu[1] >>= 8;
261 }
262
263 /* atomic (link opcode with required pre-op) */
264 for (a = 4; a < 8; a++)
265 op->opcode[a].atomic = 0;
266
FENG yu ningf041e9b2008-12-15 02:32:11 +0000267 for (i = 0; pops[i].opcode; i++) {
268 a = find_opcode(op, pops[i].opcode);
269 b = find_preop(op, pops[i].preop);
270 if ((a != -1) && (b != -1))
271 op->opcode[a].atomic = (uint8_t) ++b;
FENG yu ningc05a2952008-12-08 18:16:58 +0000272 }
273
274 return 0;
275}
276
Dominik Geyerb46acba2008-05-16 12:55:55 +0000277int program_opcodes(OPCODES * op)
278{
279 uint8_t a;
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000280 uint16_t preop, optype;
281 uint32_t opmenu[2];
Dominik Geyerb46acba2008-05-16 12:55:55 +0000282
283 /* Program Prefix Opcodes */
Dominik Geyerb46acba2008-05-16 12:55:55 +0000284 /* 0:7 Prefix Opcode 1 */
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000285 preop = (op->preop[0]);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000286 /* 8:16 Prefix Opcode 2 */
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000287 preop |= ((uint16_t) op->preop[1]) << 8;
Uwe Hermann394131e2008-10-18 21:14:13 +0000288
Stefan Reinauera9424d52008-06-27 16:28:34 +0000289 /* Program Opcode Types 0 - 7 */
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000290 optype = 0;
Dominik Geyerb46acba2008-05-16 12:55:55 +0000291 for (a = 0; a < 8; a++) {
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000292 optype |= ((uint16_t) op->opcode[a].spi_type) << (a * 2);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000293 }
Uwe Hermann394131e2008-10-18 21:14:13 +0000294
Stefan Reinauera9424d52008-06-27 16:28:34 +0000295 /* Program Allowable Opcodes 0 - 3 */
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000296 opmenu[0] = 0;
Dominik Geyerb46acba2008-05-16 12:55:55 +0000297 for (a = 0; a < 4; a++) {
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000298 opmenu[0] |= ((uint32_t) op->opcode[a].opcode) << (a * 8);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000299 }
Stefan Reinauera9424d52008-06-27 16:28:34 +0000300
Dominik Geyerb46acba2008-05-16 12:55:55 +0000301 /*Program Allowable Opcodes 4 - 7 */
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000302 opmenu[1] = 0;
Dominik Geyerb46acba2008-05-16 12:55:55 +0000303 for (a = 4; a < 8; a++) {
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000304 opmenu[1] |= ((uint32_t) op->opcode[a].opcode) << ((a - 4) * 8);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000305 }
Stefan Reinauera9424d52008-06-27 16:28:34 +0000306
Peter Stuge016d4e12009-01-15 02:13:18 +0000307 printf_debug("\n%s: preop=%04x optype=%04x opmenu=%08x%08x\n", __func__, preop, optype, opmenu[0], opmenu[1]);
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000308 switch (flashbus) {
Uwe Hermann394131e2008-10-18 21:14:13 +0000309 case BUS_TYPE_ICH7_SPI:
310 case BUS_TYPE_VIA_SPI:
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000311 REGWRITE16(ICH7_REG_PREOP, preop);
312 REGWRITE16(ICH7_REG_OPTYPE, optype);
313 REGWRITE32(ICH7_REG_OPMENU, opmenu[0]);
314 REGWRITE32(ICH7_REG_OPMENU + 4, opmenu[1]);
315 break;
316 case BUS_TYPE_ICH9_SPI:
317 REGWRITE16(ICH9_REG_PREOP, preop);
318 REGWRITE16(ICH9_REG_OPTYPE, optype);
319 REGWRITE32(ICH9_REG_OPMENU, opmenu[0]);
320 REGWRITE32(ICH9_REG_OPMENU + 4, opmenu[1]);
321 break;
322 default:
323 printf_debug("%s: unsupported chipset\n", __FUNCTION__);
324 return -1;
Stefan Reinauera9424d52008-06-27 16:28:34 +0000325 }
Dominik Geyerb46acba2008-05-16 12:55:55 +0000326
327 return 0;
328}
329
FENG yu ningf041e9b2008-12-15 02:32:11 +0000330/* This function generates OPCODES from or programs OPCODES to ICH according to
331 * the chipset's SPI configuration lock.
FENG yu ningc05a2952008-12-08 18:16:58 +0000332 *
FENG yu ningf041e9b2008-12-15 02:32:11 +0000333 * It should be called before ICH sends any spi command.
FENG yu ningc05a2952008-12-08 18:16:58 +0000334 */
Uwe Hermann7b2969b2009-04-15 10:52:49 +0000335int ich_init_opcodes(void)
FENG yu ningc05a2952008-12-08 18:16:58 +0000336{
337 int rc = 0;
338 OPCODES *curopcodes_done;
339
340 if (curopcodes)
341 return 0;
342
343 if (ichspi_lock) {
344 printf_debug("Generating OPCODES... ");
345 curopcodes_done = &O_EXISTING;
FENG yu ningf041e9b2008-12-15 02:32:11 +0000346 rc = generate_opcodes(curopcodes_done);
FENG yu ningc05a2952008-12-08 18:16:58 +0000347 } else {
348 printf_debug("Programming OPCODES... ");
349 curopcodes_done = &O_ST_M25P;
350 rc = program_opcodes(curopcodes_done);
351 }
352
353 if (rc) {
354 curopcodes = NULL;
355 printf_debug("failed\n");
356 return 1;
357 } else {
358 curopcodes = curopcodes_done;
359 printf_debug("done\n");
360 return 0;
361 }
362}
363
Stefan Reinauer43119562008-11-02 19:51:50 +0000364static int ich7_run_opcode(OPCODE op, uint32_t offset,
Rudolf Marek3fdbccf2008-06-30 21:38:30 +0000365 uint8_t datalength, uint8_t * data, int maxdata)
Dominik Geyerb46acba2008-05-16 12:55:55 +0000366{
367 int write_cmd = 0;
Stefan Reinauera9424d52008-06-27 16:28:34 +0000368 int timeout;
Peter Stuge7e2c0792008-06-29 01:30:41 +0000369 uint32_t temp32 = 0;
Stefan Reinauera9424d52008-06-27 16:28:34 +0000370 uint16_t temp16;
Dominik Geyerb46acba2008-05-16 12:55:55 +0000371 uint32_t a;
Stefan Reinauer43119562008-11-02 19:51:50 +0000372 uint64_t opmenu;
373 int opcode_index;
Dominik Geyerb46acba2008-05-16 12:55:55 +0000374
375 /* Is it a write command? */
376 if ((op.spi_type == SPI_OPCODE_TYPE_WRITE_NO_ADDRESS)
377 || (op.spi_type == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS)) {
378 write_cmd = 1;
379 }
380
381 /* Programm Offset in Flash into FADDR */
Stefan Reinauera9424d52008-06-27 16:28:34 +0000382 REGWRITE32(ICH7_REG_SPIA, (offset & 0x00FFFFFF)); /* SPI addresses are 24 BIT only */
Dominik Geyerb46acba2008-05-16 12:55:55 +0000383
384 /* Program data into FDATA0 to N */
385 if (write_cmd && (datalength != 0)) {
386 temp32 = 0;
387 for (a = 0; a < datalength; a++) {
388 if ((a % 4) == 0) {
389 temp32 = 0;
390 }
391
392 temp32 |= ((uint32_t) data[a]) << ((a % 4) * 8);
393
394 if ((a % 4) == 3) {
Stefan Reinauera9424d52008-06-27 16:28:34 +0000395 REGWRITE32(ICH7_REG_SPID0 + (a - (a % 4)),
396 temp32);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000397 }
398 }
399 if (((a - 1) % 4) != 3) {
Stefan Reinauera9424d52008-06-27 16:28:34 +0000400 REGWRITE32(ICH7_REG_SPID0 +
401 ((a - 1) - ((a - 1) % 4)), temp32);
402 }
403
404 }
405
406 /* Assemble SPIS */
407 temp16 = 0;
408 /* clear error status registers */
409 temp16 |= (SPIS_CDS + SPIS_FCERR);
410 REGWRITE16(ICH7_REG_SPIS, temp16);
411
412 /* Assemble SPIC */
413 temp16 = 0;
414
415 if (datalength != 0) {
416 temp16 |= SPIC_DS;
Rudolf Marek3fdbccf2008-06-30 21:38:30 +0000417 temp16 |= ((uint32_t) ((datalength - 1) & (maxdata - 1))) << 8;
Stefan Reinauera9424d52008-06-27 16:28:34 +0000418 }
419
420 /* Select opcode */
Stefan Reinauer43119562008-11-02 19:51:50 +0000421 opmenu = REGREAD32(ICH7_REG_OPMENU);
422 opmenu |= ((uint64_t)REGREAD32(ICH7_REG_OPMENU + 4)) << 32;
423
Uwe Hermann7b2969b2009-04-15 10:52:49 +0000424 for (opcode_index = 0; opcode_index < 8; opcode_index++) {
425 if ((opmenu & 0xff) == op.opcode) {
Stefan Reinauer43119562008-11-02 19:51:50 +0000426 break;
427 }
428 opmenu >>= 8;
429 }
430 if (opcode_index == 8) {
431 printf_debug("Opcode %x not found.\n", op.opcode);
432 return 1;
433 }
434 temp16 |= ((uint16_t) (opcode_index & 0x07)) << 4;
Stefan Reinauera9424d52008-06-27 16:28:34 +0000435
436 /* Handle Atomic */
437 if (op.atomic != 0) {
438 /* Select atomic command */
439 temp16 |= SPIC_ACS;
Carl-Daniel Hailfinger738fdff2008-11-18 00:43:14 +0000440 /* Select prefix opcode */
Stefan Reinauera9424d52008-06-27 16:28:34 +0000441 if ((op.atomic - 1) == 1) {
442 /*Select prefix opcode 2 */
443 temp16 |= SPIC_SPOP;
444 }
445 }
446
447 /* Start */
448 temp16 |= SPIC_SCGO;
449
450 /* write it */
451 REGWRITE16(ICH7_REG_SPIC, temp16);
452
453 /* wait for cycle complete */
Carl-Daniel Hailfinger4c24ad42009-05-09 07:24:23 +0000454 timeout = 100 * 1000 * 60; // 60s is a looong timeout.
Stefan Reinauera9424d52008-06-27 16:28:34 +0000455 while (((REGREAD16(ICH7_REG_SPIS) & SPIS_CDS) == 0) && --timeout) {
Carl-Daniel Hailfinger4c24ad42009-05-09 07:24:23 +0000456 myusec_delay(10);
Stefan Reinauera9424d52008-06-27 16:28:34 +0000457 }
458 if (!timeout) {
459 printf_debug("timeout\n");
460 }
461
462 if ((REGREAD16(ICH7_REG_SPIS) & SPIS_FCERR) != 0) {
463 printf_debug("Transaction error!\n");
464 return 1;
465 }
466
467 if ((!write_cmd) && (datalength != 0)) {
468 for (a = 0; a < datalength; a++) {
469 if ((a % 4) == 0) {
470 temp32 = REGREAD32(ICH7_REG_SPID0 + (a));
471 }
472
473 data[a] =
474 (temp32 & (((uint32_t) 0xff) << ((a % 4) * 8)))
475 >> ((a % 4) * 8);
476 }
477 }
478
479 return 0;
480}
481
Stefan Reinauer43119562008-11-02 19:51:50 +0000482static int ich9_run_opcode(OPCODE op, uint32_t offset,
Stefan Reinauera9424d52008-06-27 16:28:34 +0000483 uint8_t datalength, uint8_t * data)
484{
485 int write_cmd = 0;
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000486 int timeout;
Stefan Reinauera9424d52008-06-27 16:28:34 +0000487 uint32_t temp32;
488 uint32_t a;
Stefan Reinauer43119562008-11-02 19:51:50 +0000489 uint64_t opmenu;
490 int opcode_index;
Stefan Reinauera9424d52008-06-27 16:28:34 +0000491
492 /* Is it a write command? */
493 if ((op.spi_type == SPI_OPCODE_TYPE_WRITE_NO_ADDRESS)
494 || (op.spi_type == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS)) {
495 write_cmd = 1;
496 }
497
498 /* Programm Offset in Flash into FADDR */
499 REGWRITE32(ICH9_REG_FADDR, (offset & 0x00FFFFFF)); /* SPI addresses are 24 BIT only */
500
501 /* Program data into FDATA0 to N */
502 if (write_cmd && (datalength != 0)) {
503 temp32 = 0;
504 for (a = 0; a < datalength; a++) {
505 if ((a % 4) == 0) {
506 temp32 = 0;
507 }
508
509 temp32 |= ((uint32_t) data[a]) << ((a % 4) * 8);
510
511 if ((a % 4) == 3) {
512 REGWRITE32(ICH9_REG_FDATA0 + (a - (a % 4)),
513 temp32);
514 }
515 }
516 if (((a - 1) % 4) != 3) {
517 REGWRITE32(ICH9_REG_FDATA0 +
518 ((a - 1) - ((a - 1) % 4)), temp32);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000519 }
Dominik Geyerb46acba2008-05-16 12:55:55 +0000520 }
521
522 /* Assemble SSFS + SSFC */
523 temp32 = 0;
524
525 /* clear error status registers */
526 temp32 |= (SSFS_CDS + SSFS_FCERR);
527 /* USE 20 MhZ */
528 temp32 |= SSFC_SCF_20MHZ;
529
530 if (datalength != 0) {
531 uint32_t datatemp;
532 temp32 |= SSFC_DS;
533 datatemp = ((uint32_t) ((datalength - 1) & 0x3f)) << (8 + 8);
534 temp32 |= datatemp;
535 }
536
537 /* Select opcode */
Stefan Reinauer43119562008-11-02 19:51:50 +0000538 opmenu = REGREAD32(ICH9_REG_OPMENU);
539 opmenu |= ((uint64_t)REGREAD32(ICH9_REG_OPMENU + 4)) << 32;
540
Uwe Hermann7b2969b2009-04-15 10:52:49 +0000541 for (opcode_index = 0; opcode_index < 8; opcode_index++) {
542 if ((opmenu & 0xff) == op.opcode) {
Stefan Reinauer43119562008-11-02 19:51:50 +0000543 break;
544 }
545 opmenu >>= 8;
546 }
547 if (opcode_index == 8) {
548 printf_debug("Opcode %x not found.\n", op.opcode);
549 return 1;
550 }
551 temp32 |= ((uint32_t) (opcode_index & 0x07)) << (8 + 4);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000552
553 /* Handle Atomic */
554 if (op.atomic != 0) {
555 /* Select atomic command */
556 temp32 |= SSFC_ACS;
557 /* Selct prefix opcode */
558 if ((op.atomic - 1) == 1) {
559 /*Select prefix opcode 2 */
560 temp32 |= SSFC_SPOP;
561 }
562 }
563
564 /* Start */
565 temp32 |= SSFC_SCGO;
566
567 /* write it */
Stefan Reinauera9424d52008-06-27 16:28:34 +0000568 REGWRITE32(ICH9_REG_SSFS, temp32);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000569
570 /*wait for cycle complete */
Carl-Daniel Hailfinger4c24ad42009-05-09 07:24:23 +0000571 timeout = 100 * 1000 * 60; // 60s is a looong timeout.
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000572 while (((REGREAD32(ICH9_REG_SSFS) & SSFS_CDS) == 0) && --timeout) {
Carl-Daniel Hailfinger4c24ad42009-05-09 07:24:23 +0000573 myusec_delay(10);
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000574 }
575 if (!timeout) {
576 printf_debug("timeout\n");
Dominik Geyerb46acba2008-05-16 12:55:55 +0000577 }
578
Stefan Reinauera9424d52008-06-27 16:28:34 +0000579 if ((REGREAD32(ICH9_REG_SSFS) & SSFS_FCERR) != 0) {
Dominik Geyerb46acba2008-05-16 12:55:55 +0000580 printf_debug("Transaction error!\n");
581 return 1;
582 }
583
584 if ((!write_cmd) && (datalength != 0)) {
585 for (a = 0; a < datalength; a++) {
586 if ((a % 4) == 0) {
Stefan Reinauera9424d52008-06-27 16:28:34 +0000587 temp32 = REGREAD32(ICH9_REG_FDATA0 + (a));
Dominik Geyerb46acba2008-05-16 12:55:55 +0000588 }
589
590 data[a] =
Stefan Reinauera9424d52008-06-27 16:28:34 +0000591 (temp32 & (((uint32_t) 0xff) << ((a % 4) * 8)))
592 >> ((a % 4) * 8);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000593 }
594 }
595
596 return 0;
597}
598
Stefan Reinauer43119562008-11-02 19:51:50 +0000599static int run_opcode(OPCODE op, uint32_t offset,
Stefan Reinauera9424d52008-06-27 16:28:34 +0000600 uint8_t datalength, uint8_t * data)
601{
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000602 switch (flashbus) {
603 case BUS_TYPE_VIA_SPI:
Stefan Reinauer43119562008-11-02 19:51:50 +0000604 return ich7_run_opcode(op, offset, datalength, data, 16);
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000605 case BUS_TYPE_ICH7_SPI:
Stefan Reinauer43119562008-11-02 19:51:50 +0000606 return ich7_run_opcode(op, offset, datalength, data, 64);
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000607 case BUS_TYPE_ICH9_SPI:
Stefan Reinauer43119562008-11-02 19:51:50 +0000608 return ich9_run_opcode(op, offset, datalength, data);
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000609 default:
610 printf_debug("%s: unsupported chipset\n", __FUNCTION__);
611 }
Stefan Reinauera9424d52008-06-27 16:28:34 +0000612
613 /* If we ever get here, something really weird happened */
614 return -1;
615}
616
Uwe Hermann394131e2008-10-18 21:14:13 +0000617static int ich_spi_read_page(struct flashchip *flash, uint8_t * buf, int offset,
618 int maxdata)
Dominik Geyerb46acba2008-05-16 12:55:55 +0000619{
620 int page_size = flash->page_size;
621 uint32_t remaining = flash->page_size;
622 int a;
623
Stefan Reinauera9424d52008-06-27 16:28:34 +0000624 printf_debug("ich_spi_read_page: offset=%d, number=%d, buf=%p\n",
625 offset, page_size, buf);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000626
Rudolf Marek3fdbccf2008-06-30 21:38:30 +0000627 for (a = 0; a < page_size; a += maxdata) {
628 if (remaining < maxdata) {
Dominik Geyerb46acba2008-05-16 12:55:55 +0000629
Carl-Daniel Hailfinger738fdff2008-11-18 00:43:14 +0000630 if (spi_nbyte_read(offset + (page_size - remaining),
631 &buf[page_size - remaining], remaining)) {
Dominik Geyerb46acba2008-05-16 12:55:55 +0000632 printf_debug("Error reading");
633 return 1;
634 }
635 remaining = 0;
636 } else {
Carl-Daniel Hailfinger738fdff2008-11-18 00:43:14 +0000637 if (spi_nbyte_read(offset + (page_size - remaining),
638 &buf[page_size - remaining], maxdata)) {
Dominik Geyerb46acba2008-05-16 12:55:55 +0000639 printf_debug("Error reading");
640 return 1;
641 }
Rudolf Marek3fdbccf2008-06-30 21:38:30 +0000642 remaining -= maxdata;
Dominik Geyerb46acba2008-05-16 12:55:55 +0000643 }
644 }
645
646 return 0;
647}
648
649static int ich_spi_write_page(struct flashchip *flash, uint8_t * bytes,
Rudolf Marek3fdbccf2008-06-30 21:38:30 +0000650 int offset, int maxdata)
Dominik Geyerb46acba2008-05-16 12:55:55 +0000651{
652 int page_size = flash->page_size;
653 uint32_t remaining = page_size;
654 int a;
655
Stefan Reinauera9424d52008-06-27 16:28:34 +0000656 printf_debug("ich_spi_write_page: offset=%d, number=%d, buf=%p\n",
657 offset, page_size, bytes);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000658
Rudolf Marek3fdbccf2008-06-30 21:38:30 +0000659 for (a = 0; a < page_size; a += maxdata) {
660 if (remaining < maxdata) {
Dominik Geyerb46acba2008-05-16 12:55:55 +0000661 if (run_opcode
Stefan Reinauer43119562008-11-02 19:51:50 +0000662 (curopcodes->opcode[0],
Stefan Reinauera9424d52008-06-27 16:28:34 +0000663 offset + (page_size - remaining), remaining,
Dominik Geyerb46acba2008-05-16 12:55:55 +0000664 &bytes[page_size - remaining]) != 0) {
665 printf_debug("Error writing");
666 return 1;
667 }
668 remaining = 0;
669 } else {
670 if (run_opcode
Stefan Reinauer43119562008-11-02 19:51:50 +0000671 (curopcodes->opcode[0],
Rudolf Marek3fdbccf2008-06-30 21:38:30 +0000672 offset + (page_size - remaining), maxdata,
Dominik Geyerb46acba2008-05-16 12:55:55 +0000673 &bytes[page_size - remaining]) != 0) {
674 printf_debug("Error writing");
675 return 1;
676 }
Rudolf Marek3fdbccf2008-06-30 21:38:30 +0000677 remaining -= maxdata;
Dominik Geyerb46acba2008-05-16 12:55:55 +0000678 }
679 }
680
681 return 0;
682}
683
Dominik Geyerb46acba2008-05-16 12:55:55 +0000684int ich_spi_read(struct flashchip *flash, uint8_t * buf)
685{
686 int i, rc = 0;
687 int total_size = flash->total_size * 1024;
688 int page_size = flash->page_size;
Rudolf Marek3fdbccf2008-06-30 21:38:30 +0000689 int maxdata = 64;
690
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000691 if (flashbus == BUS_TYPE_VIA_SPI) {
Rudolf Marek3fdbccf2008-06-30 21:38:30 +0000692 maxdata = 16;
693 }
Dominik Geyerb46acba2008-05-16 12:55:55 +0000694
695 for (i = 0; (i < total_size / page_size) && (rc == 0); i++) {
696 rc = ich_spi_read_page(flash, (void *)(buf + i * page_size),
Rudolf Marek3fdbccf2008-06-30 21:38:30 +0000697 i * page_size, maxdata);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000698 }
699
700 return rc;
701}
702
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +0000703int ich_spi_write_256(struct flashchip *flash, uint8_t * buf)
Dominik Geyerb46acba2008-05-16 12:55:55 +0000704{
705 int i, j, rc = 0;
706 int total_size = flash->total_size * 1024;
707 int page_size = flash->page_size;
708 int erase_size = 64 * 1024;
Rudolf Marek3fdbccf2008-06-30 21:38:30 +0000709 int maxdata = 64;
Dominik Geyerb46acba2008-05-16 12:55:55 +0000710
711 spi_disable_blockprotect();
712
713 printf("Programming page: \n");
714
715 for (i = 0; i < total_size / erase_size; i++) {
Carl-Daniel Hailfinger6afb6132008-11-03 00:02:11 +0000716 /* FIMXE: call the chip-specific spi_block_erase_XX instead.
717 * For this, we need to add a block erase function to
718 * struct flashchip.
719 */
720 rc = spi_block_erase_d8(flash, i * erase_size);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000721 if (rc) {
722 printf("Error erasing block at 0x%x\n", i);
723 break;
724 }
Stefan Reinauer325b5d42008-06-27 15:18:20 +0000725
Peter Stuge6a214162008-07-07 05:14:06 +0000726 if (flashbus == BUS_TYPE_VIA_SPI)
727 maxdata = 16;
728
Dominik Geyerb46acba2008-05-16 12:55:55 +0000729 for (j = 0; j < erase_size / page_size; j++) {
Uwe Hermann394131e2008-10-18 21:14:13 +0000730 ich_spi_write_page(flash,
731 (void *)(buf + (i * erase_size) + (j * page_size)),
732 (i * erase_size) + (j * page_size), maxdata);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000733 }
734 }
735
736 printf("\n");
737
738 return rc;
739}
740
Stefan Reinauer325b5d42008-06-27 15:18:20 +0000741int ich_spi_command(unsigned int writecnt, unsigned int readcnt,
742 const unsigned char *writearr, unsigned char *readarr)
Dominik Geyerb46acba2008-05-16 12:55:55 +0000743{
744 int a;
745 int opcode_index = -1;
746 const unsigned char cmd = *writearr;
747 OPCODE *opcode;
748 uint32_t addr = 0;
749 uint8_t *data;
750 int count;
751
Dominik Geyerb46acba2008-05-16 12:55:55 +0000752 /* find cmd in opcodes-table */
753 for (a = 0; a < 8; a++) {
754 if ((curopcodes->opcode[a]).opcode == cmd) {
755 opcode_index = a;
756 break;
757 }
758 }
759
760 /* unknown / not programmed command */
761 if (opcode_index == -1) {
762 printf_debug("Invalid OPCODE 0x%02x\n", cmd);
Carl-Daniel Hailfinger3e9dbea2009-05-13 11:40:08 +0000763 return SPI_INVALID_OPCODE;
Dominik Geyerb46acba2008-05-16 12:55:55 +0000764 }
765
766 opcode = &(curopcodes->opcode[opcode_index]);
767
768 /* if opcode-type requires an address */
769 if (opcode->spi_type == SPI_OPCODE_TYPE_READ_WITH_ADDRESS ||
770 opcode->spi_type == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS) {
Stefan Reinauer325b5d42008-06-27 15:18:20 +0000771 addr = (writearr[1] << 16) |
772 (writearr[2] << 8) | (writearr[3] << 0);
Dominik Geyerb46acba2008-05-16 12:55:55 +0000773 }
Stefan Reinauer325b5d42008-06-27 15:18:20 +0000774
Dominik Geyerb46acba2008-05-16 12:55:55 +0000775 /* translate read/write array/count */
776 if (opcode->spi_type == SPI_OPCODE_TYPE_WRITE_NO_ADDRESS) {
Stefan Reinauer325b5d42008-06-27 15:18:20 +0000777 data = (uint8_t *) (writearr + 1);
778 count = writecnt - 1;
779 } else if (opcode->spi_type == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS) {
780 data = (uint8_t *) (writearr + 4);
781 count = writecnt - 4;
782 } else {
783 data = (uint8_t *) readarr;
Dominik Geyerb46acba2008-05-16 12:55:55 +0000784 count = readcnt;
785 }
Stefan Reinauer325b5d42008-06-27 15:18:20 +0000786
Stefan Reinauer43119562008-11-02 19:51:50 +0000787 if (run_opcode(*opcode, addr, count, data) != 0) {
Dominik Geyerb46acba2008-05-16 12:55:55 +0000788 printf_debug("run OPCODE 0x%02x failed\n", opcode->opcode);
789 return 1;
790 }
791
792 return 0;
793}