Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the flashrom project. |
| 3 | * |
| 4 | * Copyright (C) 2008 Stefan Wildemann <stefan.wildemann@kontron.com> |
| 5 | * Copyright (C) 2008 Claus Gindhart <claus.gindhart@kontron.com> |
| 6 | * Copyright (C) 2008 Dominik Geyer <dominik.geyer@kontron.com> |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 7 | * Copyright (C) 2008 coresystems GmbH <info@coresystems.de> |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License as published by |
| 11 | * the Free Software Foundation; either version 2 of the License, or |
| 12 | * (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 22 | * |
| 23 | */ |
| 24 | |
| 25 | /* |
| 26 | * This module is designed for supporting the devices |
| 27 | * ST M25P40 |
| 28 | * ST M25P80 |
| 29 | * ST M25P16 |
| 30 | * ST M25P32 already tested |
| 31 | * ST M25P64 |
| 32 | * AT 25DF321 already tested |
| 33 | * |
| 34 | */ |
| 35 | |
| 36 | #include <stdio.h> |
| 37 | #include <string.h> |
| 38 | #include <stdint.h> |
| 39 | #include <sys/mman.h> |
| 40 | #include <pci/pci.h> |
| 41 | #include "flash.h" |
| 42 | #include "spi.h" |
| 43 | |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 44 | /* ICH9 controller register definition */ |
| 45 | #define ICH9_REG_FADDR 0x08 /* 32 Bits */ |
| 46 | #define ICH9_REG_FDATA0 0x10 /* 64 Bytes */ |
| 47 | |
| 48 | #define ICH9_REG_SSFS 0x90 /* 08 Bits */ |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 49 | #define SSFS_SCIP 0x00000001 |
| 50 | #define SSFS_CDS 0x00000004 |
| 51 | #define SSFS_FCERR 0x00000008 |
| 52 | #define SSFS_AEL 0x00000010 |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 53 | |
| 54 | #define ICH9_REG_SSFC 0x91 /* 24 Bits */ |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 55 | #define SSFC_SCGO 0x00000200 |
| 56 | #define SSFC_ACS 0x00000400 |
| 57 | #define SSFC_SPOP 0x00000800 |
| 58 | #define SSFC_COP 0x00001000 |
| 59 | #define SSFC_DBC 0x00010000 |
| 60 | #define SSFC_DS 0x00400000 |
| 61 | #define SSFC_SME 0x00800000 |
| 62 | #define SSFC_SCF 0x01000000 |
| 63 | #define SSFC_SCF_20MHZ 0x00000000 |
| 64 | #define SSFC_SCF_33MHZ 0x01000000 |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 65 | |
| 66 | #define ICH9_REG_PREOP 0x94 /* 16 Bits */ |
| 67 | #define ICH9_REG_OPTYPE 0x96 /* 16 Bits */ |
| 68 | #define ICH9_REG_OPMENU 0x98 /* 64 Bits */ |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 69 | |
| 70 | // ICH9R SPI commands |
| 71 | #define SPI_OPCODE_TYPE_READ_NO_ADDRESS 0 |
| 72 | #define SPI_OPCODE_TYPE_WRITE_NO_ADDRESS 1 |
| 73 | #define SPI_OPCODE_TYPE_READ_WITH_ADDRESS 2 |
| 74 | #define SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS 3 |
| 75 | |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 76 | // ICH7 registers |
| 77 | #define ICH7_REG_SPIS 0x00 /* 16 Bits */ |
| 78 | #define SPIS_SCIP 0x00000001 |
| 79 | #define SPIS_CDS 0x00000004 |
| 80 | #define SPIS_FCERR 0x00000008 |
| 81 | |
Rudolf Marek | 3fdbccf | 2008-06-30 21:38:30 +0000 | [diff] [blame] | 82 | /* VIA SPI is compatible with ICH7, but maxdata |
| 83 | to transfer is 16 bytes. |
| 84 | |
| 85 | DATA byte count on ICH7 is 8:13, on VIA 8:11 |
| 86 | |
| 87 | bit 12 is port select CS0 CS1 |
| 88 | bit 13 is FAST READ enable |
| 89 | bit 7 is used with fast read and one shot controls CS de-assert? |
| 90 | */ |
| 91 | |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 92 | #define ICH7_REG_SPIC 0x02 /* 16 Bits */ |
| 93 | #define SPIC_SCGO 0x0002 |
| 94 | #define SPIC_ACS 0x0004 |
| 95 | #define SPIC_SPOP 0x0008 |
Rudolf Marek | 3fdbccf | 2008-06-30 21:38:30 +0000 | [diff] [blame] | 96 | #define SPIC_DS 0x4000 |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 97 | |
| 98 | #define ICH7_REG_SPIA 0x04 /* 32 Bits */ |
| 99 | #define ICH7_REG_SPID0 0x08 /* 64 Bytes */ |
| 100 | #define ICH7_REG_PREOP 0x54 /* 16 Bits */ |
| 101 | #define ICH7_REG_OPTYPE 0x56 /* 16 Bits */ |
| 102 | #define ICH7_REG_OPMENU 0x58 /* 64 Bits */ |
| 103 | |
FENG yu ning | c05a295 | 2008-12-08 18:16:58 +0000 | [diff] [blame^] | 104 | /* ICH SPI configuration lock-down. May be set during chipset enabling. */ |
| 105 | int ichspi_lock = 0; |
| 106 | |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 107 | typedef struct _OPCODE { |
| 108 | uint8_t opcode; //This commands spi opcode |
| 109 | uint8_t spi_type; //This commands spi type |
| 110 | uint8_t atomic; //Use preop: (0: none, 1: preop0, 2: preop1 |
| 111 | } OPCODE; |
| 112 | |
| 113 | /* Opcode definition: |
| 114 | * Preop 1: Write Enable |
| 115 | * Preop 2: Write Status register enable |
| 116 | * |
| 117 | * OP 0: Write address |
| 118 | * OP 1: Read Address |
| 119 | * OP 2: ERASE block |
| 120 | * OP 3: Read Status register |
| 121 | * OP 4: Read ID |
| 122 | * OP 5: Write Status register |
| 123 | * OP 6: chip private (read JDEC id) |
| 124 | * OP 7: Chip erase |
| 125 | */ |
| 126 | typedef struct _OPCODES { |
| 127 | uint8_t preop[2]; |
| 128 | OPCODE opcode[8]; |
| 129 | } OPCODES; |
| 130 | |
Stefan Reinauer | 325b5d4 | 2008-06-27 15:18:20 +0000 | [diff] [blame] | 131 | static OPCODES *curopcodes = NULL; |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 132 | |
| 133 | /* HW access functions */ |
| 134 | static inline uint32_t REGREAD32(int X) |
| 135 | { |
| 136 | volatile uint32_t regval; |
Uwe Hermann | 394131e | 2008-10-18 21:14:13 +0000 | [diff] [blame] | 137 | regval = *(volatile uint32_t *)((uint8_t *) spibar + X); |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 138 | return regval; |
| 139 | } |
| 140 | |
| 141 | static inline uint16_t REGREAD16(int X) |
| 142 | { |
| 143 | volatile uint16_t regval; |
Uwe Hermann | 394131e | 2008-10-18 21:14:13 +0000 | [diff] [blame] | 144 | regval = *(volatile uint16_t *)((uint8_t *) spibar + X); |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 145 | return regval; |
| 146 | } |
| 147 | |
Stefan Reinauer | 2cb94e1 | 2008-06-30 23:45:22 +0000 | [diff] [blame] | 148 | #define REGWRITE32(X,Y) (*(uint32_t *)((uint8_t *)spibar+X)=Y) |
| 149 | #define REGWRITE16(X,Y) (*(uint16_t *)((uint8_t *)spibar+X)=Y) |
| 150 | #define REGWRITE8(X,Y) (*(uint8_t *)((uint8_t *)spibar+X)=Y) |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 151 | |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 152 | /* Common SPI functions */ |
FENG yu ning | c05a295 | 2008-12-08 18:16:58 +0000 | [diff] [blame^] | 153 | static inline int find_opcode(OPCODES *op, uint8_t opcode); |
| 154 | static inline int find_preop(OPCODES *op, uint8_t preop); |
| 155 | static int generate_opcodes(struct flashchip * flash, OPCODES * op); |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 156 | static int program_opcodes(OPCODES * op); |
FENG yu ning | c05a295 | 2008-12-08 18:16:58 +0000 | [diff] [blame^] | 157 | int ich_check_opcodes(struct flashchip * flash); |
Stefan Reinauer | 4311956 | 2008-11-02 19:51:50 +0000 | [diff] [blame] | 158 | static int run_opcode(OPCODE op, uint32_t offset, |
Stefan Reinauer | 325b5d4 | 2008-06-27 15:18:20 +0000 | [diff] [blame] | 159 | uint8_t datalength, uint8_t * data); |
| 160 | static int ich_spi_read_page(struct flashchip *flash, uint8_t * buf, |
Rudolf Marek | 3fdbccf | 2008-06-30 21:38:30 +0000 | [diff] [blame] | 161 | int offset, int maxdata); |
Stefan Reinauer | 325b5d4 | 2008-06-27 15:18:20 +0000 | [diff] [blame] | 162 | static int ich_spi_write_page(struct flashchip *flash, uint8_t * bytes, |
Rudolf Marek | 3fdbccf | 2008-06-30 21:38:30 +0000 | [diff] [blame] | 163 | int offset, int maxdata); |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 164 | |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 165 | OPCODES O_ST_M25P = { |
| 166 | { |
| 167 | JEDEC_WREN, |
Stefan Reinauer | 325b5d4 | 2008-06-27 15:18:20 +0000 | [diff] [blame] | 168 | 0}, |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 169 | { |
Stefan Reinauer | 325b5d4 | 2008-06-27 15:18:20 +0000 | [diff] [blame] | 170 | {JEDEC_BYTE_PROGRAM, SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS, 1}, // Write Byte |
| 171 | {JEDEC_READ, SPI_OPCODE_TYPE_READ_WITH_ADDRESS, 0}, // Read Data |
| 172 | {JEDEC_BE_D8, SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS, 1}, // Erase Sector |
| 173 | {JEDEC_RDSR, SPI_OPCODE_TYPE_READ_NO_ADDRESS, 0}, // Read Device Status Reg |
| 174 | {JEDEC_RES, SPI_OPCODE_TYPE_READ_WITH_ADDRESS, 0}, // Resume Deep Power-Down |
| 175 | {JEDEC_WRSR, SPI_OPCODE_TYPE_WRITE_NO_ADDRESS, 1}, // Write Status Register |
| 176 | {JEDEC_RDID, SPI_OPCODE_TYPE_READ_NO_ADDRESS, 0}, // Read JDEC ID |
| 177 | {JEDEC_CE_C7, SPI_OPCODE_TYPE_WRITE_NO_ADDRESS, 1}, // Bulk erase |
| 178 | } |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 179 | }; |
| 180 | |
FENG yu ning | c05a295 | 2008-12-08 18:16:58 +0000 | [diff] [blame^] | 181 | OPCODES O_EXISTING = {}; |
| 182 | |
| 183 | static inline int find_opcode(OPCODES *op, uint8_t opcode) |
| 184 | { |
| 185 | int a; |
| 186 | |
| 187 | for (a = 0; a < 8; a++) { |
| 188 | if (op->opcode[a].opcode == opcode) |
| 189 | return a; |
| 190 | } |
| 191 | |
| 192 | return -1; |
| 193 | } |
| 194 | |
| 195 | static inline int find_preop(OPCODES *op, uint8_t preop) |
| 196 | { |
| 197 | int a; |
| 198 | |
| 199 | for (a = 0; a < 2; a++) { |
| 200 | if (op->preop[a] == preop) |
| 201 | return a; |
| 202 | } |
| 203 | |
| 204 | return -1; |
| 205 | } |
| 206 | |
| 207 | static int generate_opcodes(struct flashchip * flash, OPCODES * op) |
| 208 | { |
| 209 | int a, b, i; |
| 210 | uint16_t preop, optype; |
| 211 | uint32_t opmenu[2]; |
| 212 | struct preop_opcode_pair *pair; |
| 213 | |
| 214 | if (op == NULL) { |
| 215 | printf_debug("\n%s: null OPCODES pointer!\n", __FUNCTION__); |
| 216 | return -1; |
| 217 | } |
| 218 | |
| 219 | switch (flashbus) { |
| 220 | case BUS_TYPE_ICH7_SPI: |
| 221 | case BUS_TYPE_VIA_SPI: |
| 222 | preop = REGREAD16(ICH7_REG_PREOP); |
| 223 | optype = REGREAD16(ICH7_REG_OPTYPE); |
| 224 | opmenu[0] = REGREAD32(ICH7_REG_OPMENU); |
| 225 | opmenu[1] = REGREAD32(ICH7_REG_OPMENU + 4); |
| 226 | break; |
| 227 | case BUS_TYPE_ICH9_SPI: |
| 228 | preop = REGREAD16(ICH9_REG_PREOP); |
| 229 | optype = REGREAD16(ICH9_REG_OPTYPE); |
| 230 | opmenu[0] = REGREAD32(ICH9_REG_OPMENU); |
| 231 | opmenu[1] = REGREAD32(ICH9_REG_OPMENU + 4); |
| 232 | break; |
| 233 | default: |
| 234 | printf_debug("%s: unsupported chipset\n", __FUNCTION__); |
| 235 | return -1; |
| 236 | } |
| 237 | |
| 238 | op->preop[0] = (uint8_t) preop; |
| 239 | op->preop[1] = (uint8_t) (preop >> 8); |
| 240 | |
| 241 | for (a = 0; a < 8; a++) { |
| 242 | op->opcode[a].spi_type = (uint8_t) (optype & 0x3); |
| 243 | optype >>= 2; |
| 244 | } |
| 245 | |
| 246 | for (a = 0; a < 4; a++) { |
| 247 | op->opcode[a].opcode = (uint8_t) (opmenu[0] & 0xff); |
| 248 | opmenu[0] >>= 8; |
| 249 | } |
| 250 | |
| 251 | for (a = 4; a < 8; a++) { |
| 252 | op->opcode[a].opcode = (uint8_t) (opmenu[1] & 0xff); |
| 253 | opmenu[1] >>= 8; |
| 254 | } |
| 255 | |
| 256 | /* atomic (link opcode with required pre-op) */ |
| 257 | for (a = 4; a < 8; a++) |
| 258 | op->opcode[a].atomic = 0; |
| 259 | |
| 260 | pair = flash->preop_opcode_pairs; |
| 261 | if (pair) { |
| 262 | for (i = 0; pair[i].opcode; i++) { |
| 263 | a = find_opcode(op, pair[i].opcode); |
| 264 | b = find_preop(op, pair[i].preop); |
| 265 | if ((a != -1) && (b != -1)) |
| 266 | op->opcode[a].atomic = (uint8_t) ++b; |
| 267 | } |
| 268 | } |
| 269 | |
| 270 | return 0; |
| 271 | } |
| 272 | |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 273 | int program_opcodes(OPCODES * op) |
| 274 | { |
| 275 | uint8_t a; |
Stefan Reinauer | 2cb94e1 | 2008-06-30 23:45:22 +0000 | [diff] [blame] | 276 | uint16_t preop, optype; |
| 277 | uint32_t opmenu[2]; |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 278 | |
| 279 | /* Program Prefix Opcodes */ |
Stefan Reinauer | 2cb94e1 | 2008-06-30 23:45:22 +0000 | [diff] [blame] | 280 | preop = 0; |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 281 | /* 0:7 Prefix Opcode 1 */ |
Stefan Reinauer | 2cb94e1 | 2008-06-30 23:45:22 +0000 | [diff] [blame] | 282 | preop = (op->preop[0]); |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 283 | /* 8:16 Prefix Opcode 2 */ |
Stefan Reinauer | 2cb94e1 | 2008-06-30 23:45:22 +0000 | [diff] [blame] | 284 | preop |= ((uint16_t) op->preop[1]) << 8; |
Uwe Hermann | 394131e | 2008-10-18 21:14:13 +0000 | [diff] [blame] | 285 | |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 286 | /* Program Opcode Types 0 - 7 */ |
Stefan Reinauer | 2cb94e1 | 2008-06-30 23:45:22 +0000 | [diff] [blame] | 287 | optype = 0; |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 288 | for (a = 0; a < 8; a++) { |
Stefan Reinauer | 2cb94e1 | 2008-06-30 23:45:22 +0000 | [diff] [blame] | 289 | optype |= ((uint16_t) op->opcode[a].spi_type) << (a * 2); |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 290 | } |
Uwe Hermann | 394131e | 2008-10-18 21:14:13 +0000 | [diff] [blame] | 291 | |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 292 | /* Program Allowable Opcodes 0 - 3 */ |
Stefan Reinauer | 2cb94e1 | 2008-06-30 23:45:22 +0000 | [diff] [blame] | 293 | opmenu[0] = 0; |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 294 | for (a = 0; a < 4; a++) { |
Stefan Reinauer | 2cb94e1 | 2008-06-30 23:45:22 +0000 | [diff] [blame] | 295 | opmenu[0] |= ((uint32_t) op->opcode[a].opcode) << (a * 8); |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 296 | } |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 297 | |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 298 | /*Program Allowable Opcodes 4 - 7 */ |
Stefan Reinauer | 2cb94e1 | 2008-06-30 23:45:22 +0000 | [diff] [blame] | 299 | opmenu[1] = 0; |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 300 | for (a = 4; a < 8; a++) { |
Stefan Reinauer | 2cb94e1 | 2008-06-30 23:45:22 +0000 | [diff] [blame] | 301 | opmenu[1] |= ((uint32_t) op->opcode[a].opcode) << ((a - 4) * 8); |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 302 | } |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 303 | |
Stefan Reinauer | 2cb94e1 | 2008-06-30 23:45:22 +0000 | [diff] [blame] | 304 | switch (flashbus) { |
Uwe Hermann | 394131e | 2008-10-18 21:14:13 +0000 | [diff] [blame] | 305 | case BUS_TYPE_ICH7_SPI: |
| 306 | case BUS_TYPE_VIA_SPI: |
Stefan Reinauer | 2cb94e1 | 2008-06-30 23:45:22 +0000 | [diff] [blame] | 307 | REGWRITE16(ICH7_REG_PREOP, preop); |
| 308 | REGWRITE16(ICH7_REG_OPTYPE, optype); |
| 309 | REGWRITE32(ICH7_REG_OPMENU, opmenu[0]); |
| 310 | REGWRITE32(ICH7_REG_OPMENU + 4, opmenu[1]); |
| 311 | break; |
| 312 | case BUS_TYPE_ICH9_SPI: |
| 313 | REGWRITE16(ICH9_REG_PREOP, preop); |
| 314 | REGWRITE16(ICH9_REG_OPTYPE, optype); |
| 315 | REGWRITE32(ICH9_REG_OPMENU, opmenu[0]); |
| 316 | REGWRITE32(ICH9_REG_OPMENU + 4, opmenu[1]); |
| 317 | break; |
| 318 | default: |
| 319 | printf_debug("%s: unsupported chipset\n", __FUNCTION__); |
| 320 | return -1; |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 321 | } |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 322 | |
| 323 | return 0; |
| 324 | } |
| 325 | |
FENG yu ning | c05a295 | 2008-12-08 18:16:58 +0000 | [diff] [blame^] | 326 | /* This function generates OPCODES from or programs OPCODES to the chipset |
| 327 | * according to its SPI configuration lock. |
| 328 | * |
| 329 | * It should be called in the ICH7/ICH9/VIA part of each operation driver(i.e. |
| 330 | * probe, read, erase, write, etc.) before any command is sent. |
| 331 | */ |
| 332 | int ich_check_opcodes(struct flashchip * flash) |
| 333 | { |
| 334 | int rc = 0; |
| 335 | OPCODES *curopcodes_done; |
| 336 | |
| 337 | if (curopcodes) |
| 338 | return 0; |
| 339 | |
| 340 | if (ichspi_lock) { |
| 341 | printf_debug("Generating OPCODES... "); |
| 342 | curopcodes_done = &O_EXISTING; |
| 343 | rc = generate_opcodes(flash, curopcodes_done); |
| 344 | } else { |
| 345 | printf_debug("Programming OPCODES... "); |
| 346 | curopcodes_done = &O_ST_M25P; |
| 347 | rc = program_opcodes(curopcodes_done); |
| 348 | } |
| 349 | |
| 350 | if (rc) { |
| 351 | curopcodes = NULL; |
| 352 | printf_debug("failed\n"); |
| 353 | return 1; |
| 354 | } else { |
| 355 | curopcodes = curopcodes_done; |
| 356 | printf_debug("done\n"); |
| 357 | return 0; |
| 358 | } |
| 359 | } |
| 360 | |
Stefan Reinauer | 4311956 | 2008-11-02 19:51:50 +0000 | [diff] [blame] | 361 | static int ich7_run_opcode(OPCODE op, uint32_t offset, |
Rudolf Marek | 3fdbccf | 2008-06-30 21:38:30 +0000 | [diff] [blame] | 362 | uint8_t datalength, uint8_t * data, int maxdata) |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 363 | { |
| 364 | int write_cmd = 0; |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 365 | int timeout; |
Peter Stuge | 7e2c079 | 2008-06-29 01:30:41 +0000 | [diff] [blame] | 366 | uint32_t temp32 = 0; |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 367 | uint16_t temp16; |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 368 | uint32_t a; |
Stefan Reinauer | 4311956 | 2008-11-02 19:51:50 +0000 | [diff] [blame] | 369 | uint64_t opmenu; |
| 370 | int opcode_index; |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 371 | |
| 372 | /* Is it a write command? */ |
| 373 | if ((op.spi_type == SPI_OPCODE_TYPE_WRITE_NO_ADDRESS) |
| 374 | || (op.spi_type == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS)) { |
| 375 | write_cmd = 1; |
| 376 | } |
| 377 | |
| 378 | /* Programm Offset in Flash into FADDR */ |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 379 | REGWRITE32(ICH7_REG_SPIA, (offset & 0x00FFFFFF)); /* SPI addresses are 24 BIT only */ |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 380 | |
| 381 | /* Program data into FDATA0 to N */ |
| 382 | if (write_cmd && (datalength != 0)) { |
| 383 | temp32 = 0; |
| 384 | for (a = 0; a < datalength; a++) { |
| 385 | if ((a % 4) == 0) { |
| 386 | temp32 = 0; |
| 387 | } |
| 388 | |
| 389 | temp32 |= ((uint32_t) data[a]) << ((a % 4) * 8); |
| 390 | |
| 391 | if ((a % 4) == 3) { |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 392 | REGWRITE32(ICH7_REG_SPID0 + (a - (a % 4)), |
| 393 | temp32); |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 394 | } |
| 395 | } |
| 396 | if (((a - 1) % 4) != 3) { |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 397 | REGWRITE32(ICH7_REG_SPID0 + |
| 398 | ((a - 1) - ((a - 1) % 4)), temp32); |
| 399 | } |
| 400 | |
| 401 | } |
| 402 | |
| 403 | /* Assemble SPIS */ |
| 404 | temp16 = 0; |
| 405 | /* clear error status registers */ |
| 406 | temp16 |= (SPIS_CDS + SPIS_FCERR); |
| 407 | REGWRITE16(ICH7_REG_SPIS, temp16); |
| 408 | |
| 409 | /* Assemble SPIC */ |
| 410 | temp16 = 0; |
| 411 | |
| 412 | if (datalength != 0) { |
| 413 | temp16 |= SPIC_DS; |
Rudolf Marek | 3fdbccf | 2008-06-30 21:38:30 +0000 | [diff] [blame] | 414 | temp16 |= ((uint32_t) ((datalength - 1) & (maxdata - 1))) << 8; |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 415 | } |
| 416 | |
| 417 | /* Select opcode */ |
Stefan Reinauer | 4311956 | 2008-11-02 19:51:50 +0000 | [diff] [blame] | 418 | opmenu = REGREAD32(ICH7_REG_OPMENU); |
| 419 | opmenu |= ((uint64_t)REGREAD32(ICH7_REG_OPMENU + 4)) << 32; |
| 420 | |
| 421 | for (opcode_index=0; opcode_index<8; opcode_index++) { |
| 422 | if((opmenu & 0xff) == op.opcode) { |
| 423 | break; |
| 424 | } |
| 425 | opmenu >>= 8; |
| 426 | } |
| 427 | if (opcode_index == 8) { |
| 428 | printf_debug("Opcode %x not found.\n", op.opcode); |
| 429 | return 1; |
| 430 | } |
| 431 | temp16 |= ((uint16_t) (opcode_index & 0x07)) << 4; |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 432 | |
| 433 | /* Handle Atomic */ |
| 434 | if (op.atomic != 0) { |
| 435 | /* Select atomic command */ |
| 436 | temp16 |= SPIC_ACS; |
Carl-Daniel Hailfinger | 738fdff | 2008-11-18 00:43:14 +0000 | [diff] [blame] | 437 | /* Select prefix opcode */ |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 438 | if ((op.atomic - 1) == 1) { |
| 439 | /*Select prefix opcode 2 */ |
| 440 | temp16 |= SPIC_SPOP; |
| 441 | } |
| 442 | } |
| 443 | |
| 444 | /* Start */ |
| 445 | temp16 |= SPIC_SCGO; |
| 446 | |
| 447 | /* write it */ |
| 448 | REGWRITE16(ICH7_REG_SPIC, temp16); |
| 449 | |
| 450 | /* wait for cycle complete */ |
| 451 | timeout = 1000 * 60; // 60s is a looong timeout. |
| 452 | while (((REGREAD16(ICH7_REG_SPIS) & SPIS_CDS) == 0) && --timeout) { |
| 453 | myusec_delay(1000); |
| 454 | } |
| 455 | if (!timeout) { |
| 456 | printf_debug("timeout\n"); |
| 457 | } |
| 458 | |
| 459 | if ((REGREAD16(ICH7_REG_SPIS) & SPIS_FCERR) != 0) { |
| 460 | printf_debug("Transaction error!\n"); |
| 461 | return 1; |
| 462 | } |
| 463 | |
| 464 | if ((!write_cmd) && (datalength != 0)) { |
| 465 | for (a = 0; a < datalength; a++) { |
| 466 | if ((a % 4) == 0) { |
| 467 | temp32 = REGREAD32(ICH7_REG_SPID0 + (a)); |
| 468 | } |
| 469 | |
| 470 | data[a] = |
| 471 | (temp32 & (((uint32_t) 0xff) << ((a % 4) * 8))) |
| 472 | >> ((a % 4) * 8); |
| 473 | } |
| 474 | } |
| 475 | |
| 476 | return 0; |
| 477 | } |
| 478 | |
Stefan Reinauer | 4311956 | 2008-11-02 19:51:50 +0000 | [diff] [blame] | 479 | static int ich9_run_opcode(OPCODE op, uint32_t offset, |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 480 | uint8_t datalength, uint8_t * data) |
| 481 | { |
| 482 | int write_cmd = 0; |
Stefan Reinauer | 2cb94e1 | 2008-06-30 23:45:22 +0000 | [diff] [blame] | 483 | int timeout; |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 484 | uint32_t temp32; |
| 485 | uint32_t a; |
Stefan Reinauer | 4311956 | 2008-11-02 19:51:50 +0000 | [diff] [blame] | 486 | uint64_t opmenu; |
| 487 | int opcode_index; |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 488 | |
| 489 | /* Is it a write command? */ |
| 490 | if ((op.spi_type == SPI_OPCODE_TYPE_WRITE_NO_ADDRESS) |
| 491 | || (op.spi_type == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS)) { |
| 492 | write_cmd = 1; |
| 493 | } |
| 494 | |
| 495 | /* Programm Offset in Flash into FADDR */ |
| 496 | REGWRITE32(ICH9_REG_FADDR, (offset & 0x00FFFFFF)); /* SPI addresses are 24 BIT only */ |
| 497 | |
| 498 | /* Program data into FDATA0 to N */ |
| 499 | if (write_cmd && (datalength != 0)) { |
| 500 | temp32 = 0; |
| 501 | for (a = 0; a < datalength; a++) { |
| 502 | if ((a % 4) == 0) { |
| 503 | temp32 = 0; |
| 504 | } |
| 505 | |
| 506 | temp32 |= ((uint32_t) data[a]) << ((a % 4) * 8); |
| 507 | |
| 508 | if ((a % 4) == 3) { |
| 509 | REGWRITE32(ICH9_REG_FDATA0 + (a - (a % 4)), |
| 510 | temp32); |
| 511 | } |
| 512 | } |
| 513 | if (((a - 1) % 4) != 3) { |
| 514 | REGWRITE32(ICH9_REG_FDATA0 + |
| 515 | ((a - 1) - ((a - 1) % 4)), temp32); |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 516 | } |
| 517 | |
| 518 | } |
| 519 | |
| 520 | /* Assemble SSFS + SSFC */ |
| 521 | temp32 = 0; |
| 522 | |
| 523 | /* clear error status registers */ |
| 524 | temp32 |= (SSFS_CDS + SSFS_FCERR); |
| 525 | /* USE 20 MhZ */ |
| 526 | temp32 |= SSFC_SCF_20MHZ; |
| 527 | |
| 528 | if (datalength != 0) { |
| 529 | uint32_t datatemp; |
| 530 | temp32 |= SSFC_DS; |
| 531 | datatemp = ((uint32_t) ((datalength - 1) & 0x3f)) << (8 + 8); |
| 532 | temp32 |= datatemp; |
| 533 | } |
| 534 | |
| 535 | /* Select opcode */ |
Stefan Reinauer | 4311956 | 2008-11-02 19:51:50 +0000 | [diff] [blame] | 536 | opmenu = REGREAD32(ICH9_REG_OPMENU); |
| 537 | opmenu |= ((uint64_t)REGREAD32(ICH9_REG_OPMENU + 4)) << 32; |
| 538 | |
| 539 | for (opcode_index=0; opcode_index<8; opcode_index++) { |
| 540 | if((opmenu & 0xff) == op.opcode) { |
| 541 | break; |
| 542 | } |
| 543 | opmenu >>= 8; |
| 544 | } |
| 545 | if (opcode_index == 8) { |
| 546 | printf_debug("Opcode %x not found.\n", op.opcode); |
| 547 | return 1; |
| 548 | } |
| 549 | temp32 |= ((uint32_t) (opcode_index & 0x07)) << (8 + 4); |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 550 | |
| 551 | /* Handle Atomic */ |
| 552 | if (op.atomic != 0) { |
| 553 | /* Select atomic command */ |
| 554 | temp32 |= SSFC_ACS; |
| 555 | /* Selct prefix opcode */ |
| 556 | if ((op.atomic - 1) == 1) { |
| 557 | /*Select prefix opcode 2 */ |
| 558 | temp32 |= SSFC_SPOP; |
| 559 | } |
| 560 | } |
| 561 | |
| 562 | /* Start */ |
| 563 | temp32 |= SSFC_SCGO; |
| 564 | |
| 565 | /* write it */ |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 566 | REGWRITE32(ICH9_REG_SSFS, temp32); |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 567 | |
| 568 | /*wait for cycle complete */ |
Stefan Reinauer | 2cb94e1 | 2008-06-30 23:45:22 +0000 | [diff] [blame] | 569 | timeout = 1000 * 60; // 60s is a looong timeout. |
| 570 | while (((REGREAD32(ICH9_REG_SSFS) & SSFS_CDS) == 0) && --timeout) { |
| 571 | myusec_delay(1000); |
| 572 | } |
| 573 | if (!timeout) { |
| 574 | printf_debug("timeout\n"); |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 575 | } |
| 576 | |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 577 | if ((REGREAD32(ICH9_REG_SSFS) & SSFS_FCERR) != 0) { |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 578 | printf_debug("Transaction error!\n"); |
| 579 | return 1; |
| 580 | } |
| 581 | |
| 582 | if ((!write_cmd) && (datalength != 0)) { |
| 583 | for (a = 0; a < datalength; a++) { |
| 584 | if ((a % 4) == 0) { |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 585 | temp32 = REGREAD32(ICH9_REG_FDATA0 + (a)); |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 586 | } |
| 587 | |
| 588 | data[a] = |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 589 | (temp32 & (((uint32_t) 0xff) << ((a % 4) * 8))) |
| 590 | >> ((a % 4) * 8); |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 591 | } |
| 592 | } |
| 593 | |
| 594 | return 0; |
| 595 | } |
| 596 | |
Stefan Reinauer | 4311956 | 2008-11-02 19:51:50 +0000 | [diff] [blame] | 597 | static int run_opcode(OPCODE op, uint32_t offset, |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 598 | uint8_t datalength, uint8_t * data) |
| 599 | { |
Stefan Reinauer | 2cb94e1 | 2008-06-30 23:45:22 +0000 | [diff] [blame] | 600 | switch (flashbus) { |
| 601 | case BUS_TYPE_VIA_SPI: |
Stefan Reinauer | 4311956 | 2008-11-02 19:51:50 +0000 | [diff] [blame] | 602 | return ich7_run_opcode(op, offset, datalength, data, 16); |
Stefan Reinauer | 2cb94e1 | 2008-06-30 23:45:22 +0000 | [diff] [blame] | 603 | case BUS_TYPE_ICH7_SPI: |
Stefan Reinauer | 4311956 | 2008-11-02 19:51:50 +0000 | [diff] [blame] | 604 | return ich7_run_opcode(op, offset, datalength, data, 64); |
Stefan Reinauer | 2cb94e1 | 2008-06-30 23:45:22 +0000 | [diff] [blame] | 605 | case BUS_TYPE_ICH9_SPI: |
Stefan Reinauer | 4311956 | 2008-11-02 19:51:50 +0000 | [diff] [blame] | 606 | return ich9_run_opcode(op, offset, datalength, data); |
Stefan Reinauer | 2cb94e1 | 2008-06-30 23:45:22 +0000 | [diff] [blame] | 607 | default: |
| 608 | printf_debug("%s: unsupported chipset\n", __FUNCTION__); |
| 609 | } |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 610 | |
| 611 | /* If we ever get here, something really weird happened */ |
| 612 | return -1; |
| 613 | } |
| 614 | |
Uwe Hermann | 394131e | 2008-10-18 21:14:13 +0000 | [diff] [blame] | 615 | static int ich_spi_read_page(struct flashchip *flash, uint8_t * buf, int offset, |
| 616 | int maxdata) |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 617 | { |
| 618 | int page_size = flash->page_size; |
| 619 | uint32_t remaining = flash->page_size; |
| 620 | int a; |
| 621 | |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 622 | printf_debug("ich_spi_read_page: offset=%d, number=%d, buf=%p\n", |
| 623 | offset, page_size, buf); |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 624 | |
Rudolf Marek | 3fdbccf | 2008-06-30 21:38:30 +0000 | [diff] [blame] | 625 | for (a = 0; a < page_size; a += maxdata) { |
| 626 | if (remaining < maxdata) { |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 627 | |
Carl-Daniel Hailfinger | 738fdff | 2008-11-18 00:43:14 +0000 | [diff] [blame] | 628 | if (spi_nbyte_read(offset + (page_size - remaining), |
| 629 | &buf[page_size - remaining], remaining)) { |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 630 | printf_debug("Error reading"); |
| 631 | return 1; |
| 632 | } |
| 633 | remaining = 0; |
| 634 | } else { |
Carl-Daniel Hailfinger | 738fdff | 2008-11-18 00:43:14 +0000 | [diff] [blame] | 635 | if (spi_nbyte_read(offset + (page_size - remaining), |
| 636 | &buf[page_size - remaining], maxdata)) { |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 637 | printf_debug("Error reading"); |
| 638 | return 1; |
| 639 | } |
Rudolf Marek | 3fdbccf | 2008-06-30 21:38:30 +0000 | [diff] [blame] | 640 | remaining -= maxdata; |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 641 | } |
| 642 | } |
| 643 | |
| 644 | return 0; |
| 645 | } |
| 646 | |
| 647 | static int ich_spi_write_page(struct flashchip *flash, uint8_t * bytes, |
Rudolf Marek | 3fdbccf | 2008-06-30 21:38:30 +0000 | [diff] [blame] | 648 | int offset, int maxdata) |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 649 | { |
| 650 | int page_size = flash->page_size; |
| 651 | uint32_t remaining = page_size; |
| 652 | int a; |
| 653 | |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 654 | printf_debug("ich_spi_write_page: offset=%d, number=%d, buf=%p\n", |
| 655 | offset, page_size, bytes); |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 656 | |
Rudolf Marek | 3fdbccf | 2008-06-30 21:38:30 +0000 | [diff] [blame] | 657 | for (a = 0; a < page_size; a += maxdata) { |
| 658 | if (remaining < maxdata) { |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 659 | if (run_opcode |
Stefan Reinauer | 4311956 | 2008-11-02 19:51:50 +0000 | [diff] [blame] | 660 | (curopcodes->opcode[0], |
Stefan Reinauer | a9424d5 | 2008-06-27 16:28:34 +0000 | [diff] [blame] | 661 | offset + (page_size - remaining), remaining, |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 662 | &bytes[page_size - remaining]) != 0) { |
| 663 | printf_debug("Error writing"); |
| 664 | return 1; |
| 665 | } |
| 666 | remaining = 0; |
| 667 | } else { |
| 668 | if (run_opcode |
Stefan Reinauer | 4311956 | 2008-11-02 19:51:50 +0000 | [diff] [blame] | 669 | (curopcodes->opcode[0], |
Rudolf Marek | 3fdbccf | 2008-06-30 21:38:30 +0000 | [diff] [blame] | 670 | offset + (page_size - remaining), maxdata, |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 671 | &bytes[page_size - remaining]) != 0) { |
| 672 | printf_debug("Error writing"); |
| 673 | return 1; |
| 674 | } |
Rudolf Marek | 3fdbccf | 2008-06-30 21:38:30 +0000 | [diff] [blame] | 675 | remaining -= maxdata; |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 676 | } |
| 677 | } |
| 678 | |
| 679 | return 0; |
| 680 | } |
| 681 | |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 682 | int ich_spi_read(struct flashchip *flash, uint8_t * buf) |
| 683 | { |
| 684 | int i, rc = 0; |
| 685 | int total_size = flash->total_size * 1024; |
| 686 | int page_size = flash->page_size; |
Rudolf Marek | 3fdbccf | 2008-06-30 21:38:30 +0000 | [diff] [blame] | 687 | int maxdata = 64; |
| 688 | |
Stefan Reinauer | 2cb94e1 | 2008-06-30 23:45:22 +0000 | [diff] [blame] | 689 | if (flashbus == BUS_TYPE_VIA_SPI) { |
Rudolf Marek | 3fdbccf | 2008-06-30 21:38:30 +0000 | [diff] [blame] | 690 | maxdata = 16; |
| 691 | } |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 692 | |
| 693 | for (i = 0; (i < total_size / page_size) && (rc == 0); i++) { |
| 694 | rc = ich_spi_read_page(flash, (void *)(buf + i * page_size), |
Rudolf Marek | 3fdbccf | 2008-06-30 21:38:30 +0000 | [diff] [blame] | 695 | i * page_size, maxdata); |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 696 | } |
| 697 | |
| 698 | return rc; |
| 699 | } |
| 700 | |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 701 | int ich_spi_write(struct flashchip *flash, uint8_t * buf) |
| 702 | { |
| 703 | int i, j, rc = 0; |
| 704 | int total_size = flash->total_size * 1024; |
| 705 | int page_size = flash->page_size; |
| 706 | int erase_size = 64 * 1024; |
Rudolf Marek | 3fdbccf | 2008-06-30 21:38:30 +0000 | [diff] [blame] | 707 | int maxdata = 64; |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 708 | |
| 709 | spi_disable_blockprotect(); |
| 710 | |
| 711 | printf("Programming page: \n"); |
| 712 | |
| 713 | for (i = 0; i < total_size / erase_size; i++) { |
Carl-Daniel Hailfinger | 6afb613 | 2008-11-03 00:02:11 +0000 | [diff] [blame] | 714 | /* FIMXE: call the chip-specific spi_block_erase_XX instead. |
| 715 | * For this, we need to add a block erase function to |
| 716 | * struct flashchip. |
| 717 | */ |
| 718 | rc = spi_block_erase_d8(flash, i * erase_size); |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 719 | if (rc) { |
| 720 | printf("Error erasing block at 0x%x\n", i); |
| 721 | break; |
| 722 | } |
Stefan Reinauer | 325b5d4 | 2008-06-27 15:18:20 +0000 | [diff] [blame] | 723 | |
Peter Stuge | 6a21416 | 2008-07-07 05:14:06 +0000 | [diff] [blame] | 724 | if (flashbus == BUS_TYPE_VIA_SPI) |
| 725 | maxdata = 16; |
| 726 | |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 727 | for (j = 0; j < erase_size / page_size; j++) { |
Uwe Hermann | 394131e | 2008-10-18 21:14:13 +0000 | [diff] [blame] | 728 | ich_spi_write_page(flash, |
| 729 | (void *)(buf + (i * erase_size) + (j * page_size)), |
| 730 | (i * erase_size) + (j * page_size), maxdata); |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 731 | } |
| 732 | } |
| 733 | |
| 734 | printf("\n"); |
| 735 | |
| 736 | return rc; |
| 737 | } |
| 738 | |
Stefan Reinauer | 325b5d4 | 2008-06-27 15:18:20 +0000 | [diff] [blame] | 739 | int ich_spi_command(unsigned int writecnt, unsigned int readcnt, |
| 740 | const unsigned char *writearr, unsigned char *readarr) |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 741 | { |
| 742 | int a; |
| 743 | int opcode_index = -1; |
| 744 | const unsigned char cmd = *writearr; |
| 745 | OPCODE *opcode; |
| 746 | uint32_t addr = 0; |
| 747 | uint8_t *data; |
| 748 | int count; |
| 749 | |
| 750 | /* program opcodes if not already done */ |
| 751 | if (curopcodes == NULL) { |
Carl-Daniel Hailfinger | 1069335 | 2008-06-29 10:57:13 +0000 | [diff] [blame] | 752 | printf_debug("Programming OPCODES... "); |
Stefan Reinauer | 325b5d4 | 2008-06-27 15:18:20 +0000 | [diff] [blame] | 753 | curopcodes = &O_ST_M25P; |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 754 | program_opcodes(curopcodes); |
Carl-Daniel Hailfinger | 1069335 | 2008-06-29 10:57:13 +0000 | [diff] [blame] | 755 | printf_debug("done\n"); |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 756 | } |
| 757 | |
| 758 | /* find cmd in opcodes-table */ |
| 759 | for (a = 0; a < 8; a++) { |
| 760 | if ((curopcodes->opcode[a]).opcode == cmd) { |
| 761 | opcode_index = a; |
| 762 | break; |
| 763 | } |
| 764 | } |
| 765 | |
| 766 | /* unknown / not programmed command */ |
| 767 | if (opcode_index == -1) { |
| 768 | printf_debug("Invalid OPCODE 0x%02x\n", cmd); |
| 769 | return 1; |
| 770 | } |
| 771 | |
| 772 | opcode = &(curopcodes->opcode[opcode_index]); |
| 773 | |
| 774 | /* if opcode-type requires an address */ |
| 775 | if (opcode->spi_type == SPI_OPCODE_TYPE_READ_WITH_ADDRESS || |
| 776 | opcode->spi_type == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS) { |
Stefan Reinauer | 325b5d4 | 2008-06-27 15:18:20 +0000 | [diff] [blame] | 777 | addr = (writearr[1] << 16) | |
| 778 | (writearr[2] << 8) | (writearr[3] << 0); |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 779 | } |
Stefan Reinauer | 325b5d4 | 2008-06-27 15:18:20 +0000 | [diff] [blame] | 780 | |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 781 | /* translate read/write array/count */ |
| 782 | if (opcode->spi_type == SPI_OPCODE_TYPE_WRITE_NO_ADDRESS) { |
Stefan Reinauer | 325b5d4 | 2008-06-27 15:18:20 +0000 | [diff] [blame] | 783 | data = (uint8_t *) (writearr + 1); |
| 784 | count = writecnt - 1; |
| 785 | } else if (opcode->spi_type == SPI_OPCODE_TYPE_WRITE_WITH_ADDRESS) { |
| 786 | data = (uint8_t *) (writearr + 4); |
| 787 | count = writecnt - 4; |
| 788 | } else { |
| 789 | data = (uint8_t *) readarr; |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 790 | count = readcnt; |
| 791 | } |
Stefan Reinauer | 325b5d4 | 2008-06-27 15:18:20 +0000 | [diff] [blame] | 792 | |
Stefan Reinauer | 4311956 | 2008-11-02 19:51:50 +0000 | [diff] [blame] | 793 | if (run_opcode(*opcode, addr, count, data) != 0) { |
Dominik Geyer | b46acba | 2008-05-16 12:55:55 +0000 | [diff] [blame] | 794 | printf_debug("run OPCODE 0x%02x failed\n", opcode->opcode); |
| 795 | return 1; |
| 796 | } |
| 797 | |
| 798 | return 0; |
| 799 | } |