Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the flashrom project. |
| 3 | * |
| 4 | * Copyright (C) 2000 Silicon Integrated System Corporation |
| 5 | * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com> |
| 6 | * Copyright (C) 2005-2009 coresystems GmbH |
| 7 | * Copyright (C) 2006-2009 Carl-Daniel Hailfinger |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License as published by |
| 11 | * the Free Software Foundation; either version 2 of the License, or |
| 12 | * (at your option) any later version. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 22 | */ |
| 23 | |
| 24 | #ifndef __PROGRAMMER_H__ |
| 25 | #define __PROGRAMMER_H__ 1 |
| 26 | |
| 27 | enum programmer { |
| 28 | #if CONFIG_INTERNAL == 1 |
| 29 | PROGRAMMER_INTERNAL, |
| 30 | #endif |
| 31 | #if CONFIG_DUMMY == 1 |
| 32 | PROGRAMMER_DUMMY, |
| 33 | #endif |
| 34 | #if CONFIG_NIC3COM == 1 |
| 35 | PROGRAMMER_NIC3COM, |
| 36 | #endif |
| 37 | #if CONFIG_NICREALTEK == 1 |
| 38 | PROGRAMMER_NICREALTEK, |
Idwer Vollering | 004f4b7 | 2010-09-03 18:21:21 +0000 | [diff] [blame] | 39 | #endif |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 40 | #if CONFIG_NICNATSEMI == 1 |
| 41 | PROGRAMMER_NICNATSEMI, |
Idwer Vollering | 004f4b7 | 2010-09-03 18:21:21 +0000 | [diff] [blame] | 42 | #endif |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 43 | #if CONFIG_GFXNVIDIA == 1 |
| 44 | PROGRAMMER_GFXNVIDIA, |
| 45 | #endif |
| 46 | #if CONFIG_DRKAISER == 1 |
| 47 | PROGRAMMER_DRKAISER, |
| 48 | #endif |
| 49 | #if CONFIG_SATASII == 1 |
| 50 | PROGRAMMER_SATASII, |
| 51 | #endif |
| 52 | #if CONFIG_ATAHPT == 1 |
| 53 | PROGRAMMER_ATAHPT, |
| 54 | #endif |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 55 | #if CONFIG_FT2232_SPI == 1 |
| 56 | PROGRAMMER_FT2232_SPI, |
| 57 | #endif |
| 58 | #if CONFIG_SERPROG == 1 |
| 59 | PROGRAMMER_SERPROG, |
| 60 | #endif |
| 61 | #if CONFIG_BUSPIRATE_SPI == 1 |
| 62 | PROGRAMMER_BUSPIRATE_SPI, |
| 63 | #endif |
| 64 | #if CONFIG_DEDIPROG == 1 |
| 65 | PROGRAMMER_DEDIPROG, |
| 66 | #endif |
| 67 | #if CONFIG_RAYER_SPI == 1 |
| 68 | PROGRAMMER_RAYER_SPI, |
| 69 | #endif |
Carl-Daniel Hailfinger | b713d2e | 2011-05-08 00:24:18 +0000 | [diff] [blame] | 70 | #if CONFIG_NICINTEL == 1 |
| 71 | PROGRAMMER_NICINTEL, |
| 72 | #endif |
Idwer Vollering | 004f4b7 | 2010-09-03 18:21:21 +0000 | [diff] [blame] | 73 | #if CONFIG_NICINTEL_SPI == 1 |
| 74 | PROGRAMMER_NICINTEL_SPI, |
| 75 | #endif |
Mark Marshall | 90021f2 | 2010-12-03 14:48:11 +0000 | [diff] [blame] | 76 | #if CONFIG_OGP_SPI == 1 |
| 77 | PROGRAMMER_OGP_SPI, |
| 78 | #endif |
Carl-Daniel Hailfinger | 9a1105c | 2011-02-04 21:37:59 +0000 | [diff] [blame] | 79 | #if CONFIG_SATAMV == 1 |
| 80 | PROGRAMMER_SATAMV, |
| 81 | #endif |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 82 | PROGRAMMER_INVALID /* This must always be the last entry. */ |
| 83 | }; |
| 84 | |
| 85 | extern enum programmer programmer; |
| 86 | |
| 87 | struct programmer_entry { |
| 88 | const char *vendor; |
| 89 | const char *name; |
| 90 | |
| 91 | int (*init) (void); |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 92 | |
| 93 | void * (*map_flash_region) (const char *descr, unsigned long phys_addr, |
| 94 | size_t len); |
| 95 | void (*unmap_flash_region) (void *virt_addr, size_t len); |
| 96 | |
| 97 | void (*chip_writeb) (uint8_t val, chipaddr addr); |
| 98 | void (*chip_writew) (uint16_t val, chipaddr addr); |
| 99 | void (*chip_writel) (uint32_t val, chipaddr addr); |
| 100 | void (*chip_writen) (uint8_t *buf, chipaddr addr, size_t len); |
| 101 | uint8_t (*chip_readb) (const chipaddr addr); |
| 102 | uint16_t (*chip_readw) (const chipaddr addr); |
| 103 | uint32_t (*chip_readl) (const chipaddr addr); |
| 104 | void (*chip_readn) (uint8_t *buf, const chipaddr addr, size_t len); |
| 105 | void (*delay) (int usecs); |
| 106 | }; |
| 107 | |
| 108 | extern const struct programmer_entry programmer_table[]; |
| 109 | |
| 110 | int programmer_init(char *param); |
| 111 | int programmer_shutdown(void); |
| 112 | |
| 113 | enum bitbang_spi_master_type { |
| 114 | BITBANG_SPI_INVALID = 0, /* This must always be the first entry. */ |
| 115 | #if CONFIG_RAYER_SPI == 1 |
| 116 | BITBANG_SPI_MASTER_RAYER, |
| 117 | #endif |
Idwer Vollering | 004f4b7 | 2010-09-03 18:21:21 +0000 | [diff] [blame] | 118 | #if CONFIG_NICINTEL_SPI == 1 |
| 119 | BITBANG_SPI_MASTER_NICINTEL, |
| 120 | #endif |
Carl-Daniel Hailfinger | 2f43616 | 2010-07-28 15:08:35 +0000 | [diff] [blame] | 121 | #if CONFIG_INTERNAL == 1 |
| 122 | #if defined(__i386__) || defined(__x86_64__) |
| 123 | BITBANG_SPI_MASTER_MCP, |
| 124 | #endif |
| 125 | #endif |
Mark Marshall | 90021f2 | 2010-12-03 14:48:11 +0000 | [diff] [blame] | 126 | #if CONFIG_OGP_SPI == 1 |
| 127 | BITBANG_SPI_MASTER_OGP, |
| 128 | #endif |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 129 | }; |
| 130 | |
| 131 | struct bitbang_spi_master { |
| 132 | enum bitbang_spi_master_type type; |
| 133 | |
| 134 | /* Note that CS# is active low, so val=0 means the chip is active. */ |
| 135 | void (*set_cs) (int val); |
| 136 | void (*set_sck) (int val); |
| 137 | void (*set_mosi) (int val); |
| 138 | int (*get_miso) (void); |
Carl-Daniel Hailfinger | 2822888 | 2010-09-15 00:17:37 +0000 | [diff] [blame] | 139 | void (*request_bus) (void); |
| 140 | void (*release_bus) (void); |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 141 | }; |
| 142 | |
| 143 | #if CONFIG_INTERNAL == 1 |
| 144 | struct penable { |
| 145 | uint16_t vendor_id; |
| 146 | uint16_t device_id; |
Stefan Tauner | 7bcacb1 | 2011-05-26 01:35:19 +0000 | [diff] [blame] | 147 | int status; /* OK=0 and NT=1 are defines only. Beware! */ |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 148 | const char *vendor_name; |
| 149 | const char *device_name; |
| 150 | int (*doit) (struct pci_dev *dev, const char *name); |
| 151 | }; |
| 152 | |
| 153 | extern const struct penable chipset_enables[]; |
| 154 | |
Carl-Daniel Hailfinger | 580d29a | 2011-05-05 07:12:40 +0000 | [diff] [blame] | 155 | enum board_match_phase { |
| 156 | P1, |
| 157 | P2, |
| 158 | P3 |
| 159 | }; |
| 160 | |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 161 | struct board_pciid_enable { |
| 162 | /* Any device, but make it sensible, like the ISA bridge. */ |
| 163 | uint16_t first_vendor; |
| 164 | uint16_t first_device; |
| 165 | uint16_t first_card_vendor; |
| 166 | uint16_t first_card_device; |
| 167 | |
| 168 | /* Any device, but make it sensible, like |
| 169 | * the host bridge. May be NULL. |
| 170 | */ |
| 171 | uint16_t second_vendor; |
| 172 | uint16_t second_device; |
| 173 | uint16_t second_card_vendor; |
| 174 | uint16_t second_card_device; |
| 175 | |
Stefan Tauner | 7bcacb1 | 2011-05-26 01:35:19 +0000 | [diff] [blame] | 176 | /* Pattern to match DMI entries. May be NULL. */ |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 177 | const char *dmi_pattern; |
| 178 | |
Stefan Tauner | 7bcacb1 | 2011-05-26 01:35:19 +0000 | [diff] [blame] | 179 | /* The vendor / part name from the coreboot table. May be NULL. */ |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 180 | const char *lb_vendor; |
| 181 | const char *lb_part; |
| 182 | |
Carl-Daniel Hailfinger | 580d29a | 2011-05-05 07:12:40 +0000 | [diff] [blame] | 183 | enum board_match_phase phase; |
| 184 | |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 185 | const char *vendor_name; |
| 186 | const char *board_name; |
| 187 | |
| 188 | int max_rom_decode_parallel; |
| 189 | int status; |
Stefan Tauner | 7bcacb1 | 2011-05-26 01:35:19 +0000 | [diff] [blame] | 190 | int (*enable) (void); /* May be NULL. */ |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 191 | }; |
| 192 | |
| 193 | extern const struct board_pciid_enable board_pciid_enables[]; |
| 194 | |
| 195 | struct board_info { |
| 196 | const char *vendor; |
| 197 | const char *name; |
| 198 | const int working; |
| 199 | #ifdef CONFIG_PRINT_WIKI |
| 200 | const char *url; |
| 201 | const char *note; |
| 202 | #endif |
| 203 | }; |
| 204 | |
| 205 | extern const struct board_info boards_known[]; |
| 206 | extern const struct board_info laptops_known[]; |
| 207 | #endif |
| 208 | |
| 209 | /* udelay.c */ |
| 210 | void myusec_delay(int usecs); |
| 211 | void myusec_calibrate_delay(void); |
| 212 | void internal_delay(int usecs); |
| 213 | |
| 214 | #if NEED_PCI == 1 |
| 215 | /* pcidev.c */ |
| 216 | extern uint32_t io_base_addr; |
| 217 | extern struct pci_access *pacc; |
| 218 | extern struct pci_dev *pcidev_dev; |
| 219 | struct pcidev_status { |
| 220 | uint16_t vendor_id; |
| 221 | uint16_t device_id; |
| 222 | int status; |
| 223 | const char *vendor_name; |
| 224 | const char *device_name; |
| 225 | }; |
Carl-Daniel Hailfinger | 8a19ef1 | 2011-02-15 22:44:27 +0000 | [diff] [blame] | 226 | uintptr_t pcidev_validate(struct pci_dev *dev, int bar, const struct pcidev_status *devs); |
Carl-Daniel Hailfinger | 40446ee | 2011-03-07 01:08:09 +0000 | [diff] [blame] | 227 | uintptr_t pcidev_init(int bar, const struct pcidev_status *devs); |
Carl-Daniel Hailfinger | 2bee8cf | 2010-11-10 15:25:18 +0000 | [diff] [blame] | 228 | /* rpci_write_* are reversible writes. The original PCI config space register |
| 229 | * contents will be restored on shutdown. |
| 230 | */ |
Idwer Vollering | 1a6162e | 2010-12-26 23:55:19 +0000 | [diff] [blame] | 231 | int rpci_write_byte(struct pci_dev *dev, int reg, uint8_t data); |
| 232 | int rpci_write_word(struct pci_dev *dev, int reg, uint16_t data); |
| 233 | int rpci_write_long(struct pci_dev *dev, int reg, uint32_t data); |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 234 | #endif |
| 235 | |
| 236 | /* print.c */ |
Carl-Daniel Hailfinger | b713d2e | 2011-05-08 00:24:18 +0000 | [diff] [blame] | 237 | #if CONFIG_NIC3COM+CONFIG_NICREALTEK+CONFIG_NICNATSEMI+CONFIG_GFXNVIDIA+CONFIG_DRKAISER+CONFIG_SATASII+CONFIG_ATAHPT+CONFIG_NICINTEL+CONFIG_NICINTEL_SPI+CONFIG_OGP_SPI+CONFIG_SATAMV >= 1 |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 238 | void print_supported_pcidevs(const struct pcidev_status *devs); |
| 239 | #endif |
| 240 | |
Carl-Daniel Hailfinger | c422484 | 2011-06-09 20:06:34 +0000 | [diff] [blame] | 241 | #if CONFIG_INTERNAL == 1 |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 242 | /* board_enable.c */ |
| 243 | void w836xx_ext_enter(uint16_t port); |
| 244 | void w836xx_ext_leave(uint16_t port); |
| 245 | int it8705f_write_enable(uint8_t port); |
| 246 | uint8_t sio_read(uint16_t port, uint8_t reg); |
| 247 | void sio_write(uint16_t port, uint8_t reg, uint8_t data); |
| 248 | void sio_mask(uint16_t port, uint8_t reg, uint8_t data, uint8_t mask); |
Carl-Daniel Hailfinger | 580d29a | 2011-05-05 07:12:40 +0000 | [diff] [blame] | 249 | void board_handle_before_superio(void); |
| 250 | void board_handle_before_laptop(void); |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 251 | int board_flash_enable(const char *vendor, const char *part); |
| 252 | |
| 253 | /* chipset_enable.c */ |
| 254 | int chipset_flash_enable(void); |
| 255 | |
| 256 | /* processor_enable.c */ |
| 257 | int processor_flash_enable(void); |
Carl-Daniel Hailfinger | 580d29a | 2011-05-05 07:12:40 +0000 | [diff] [blame] | 258 | #endif |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 259 | |
| 260 | /* physmap.c */ |
| 261 | void *physmap(const char *descr, unsigned long phys_addr, size_t len); |
| 262 | void *physmap_try_ro(const char *descr, unsigned long phys_addr, size_t len); |
| 263 | void physunmap(void *virt_addr, size_t len); |
Carl-Daniel Hailfinger | c422484 | 2011-06-09 20:06:34 +0000 | [diff] [blame] | 264 | #if CONFIG_INTERNAL == 1 |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 265 | int setup_cpu_msr(int cpu); |
| 266 | void cleanup_cpu_msr(void); |
| 267 | |
| 268 | /* cbtable.c */ |
| 269 | void lb_vendor_dev_from_string(char *boardstring); |
| 270 | int coreboot_init(void); |
| 271 | extern char *lb_part, *lb_vendor; |
| 272 | extern int partvendor_from_cbtable; |
| 273 | |
| 274 | /* dmi.c */ |
| 275 | extern int has_dmi_support; |
| 276 | void dmi_init(void); |
| 277 | int dmi_match(const char *pattern); |
| 278 | |
| 279 | /* internal.c */ |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 280 | struct superio { |
| 281 | uint16_t vendor; |
| 282 | uint16_t port; |
| 283 | uint16_t model; |
| 284 | }; |
Carl-Daniel Hailfinger | bfecef6 | 2011-04-27 14:34:08 +0000 | [diff] [blame] | 285 | extern struct superio superios[]; |
| 286 | extern int superio_count; |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 287 | #define SUPERIO_VENDOR_NONE 0x0 |
| 288 | #define SUPERIO_VENDOR_ITE 0x1 |
Carl-Daniel Hailfinger | c422484 | 2011-06-09 20:06:34 +0000 | [diff] [blame] | 289 | #endif |
| 290 | #if NEED_PCI == 1 |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 291 | struct pci_dev *pci_dev_find_filter(struct pci_filter filter); |
| 292 | struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t class); |
| 293 | struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device); |
| 294 | struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device, |
| 295 | uint16_t card_vendor, uint16_t card_device); |
| 296 | #endif |
| 297 | void get_io_perms(void); |
| 298 | void release_io_perms(void); |
| 299 | #if CONFIG_INTERNAL == 1 |
| 300 | extern int is_laptop; |
Carl-Daniel Hailfinger | 580d29a | 2011-05-05 07:12:40 +0000 | [diff] [blame] | 301 | extern int laptop_ok; |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 302 | extern int force_boardenable; |
| 303 | extern int force_boardmismatch; |
| 304 | void probe_superio(void); |
Carl-Daniel Hailfinger | bfecef6 | 2011-04-27 14:34:08 +0000 | [diff] [blame] | 305 | int register_superio(struct superio s); |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 306 | int internal_init(void); |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 307 | void internal_chip_writeb(uint8_t val, chipaddr addr); |
| 308 | void internal_chip_writew(uint16_t val, chipaddr addr); |
| 309 | void internal_chip_writel(uint32_t val, chipaddr addr); |
| 310 | uint8_t internal_chip_readb(const chipaddr addr); |
| 311 | uint16_t internal_chip_readw(const chipaddr addr); |
| 312 | uint32_t internal_chip_readl(const chipaddr addr); |
| 313 | void internal_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); |
| 314 | #endif |
| 315 | |
| 316 | /* hwaccess.c */ |
| 317 | void mmio_writeb(uint8_t val, void *addr); |
| 318 | void mmio_writew(uint16_t val, void *addr); |
| 319 | void mmio_writel(uint32_t val, void *addr); |
| 320 | uint8_t mmio_readb(void *addr); |
| 321 | uint16_t mmio_readw(void *addr); |
| 322 | uint32_t mmio_readl(void *addr); |
| 323 | void mmio_le_writeb(uint8_t val, void *addr); |
| 324 | void mmio_le_writew(uint16_t val, void *addr); |
| 325 | void mmio_le_writel(uint32_t val, void *addr); |
| 326 | uint8_t mmio_le_readb(void *addr); |
| 327 | uint16_t mmio_le_readw(void *addr); |
| 328 | uint32_t mmio_le_readl(void *addr); |
| 329 | #define pci_mmio_writeb mmio_le_writeb |
| 330 | #define pci_mmio_writew mmio_le_writew |
| 331 | #define pci_mmio_writel mmio_le_writel |
| 332 | #define pci_mmio_readb mmio_le_readb |
| 333 | #define pci_mmio_readw mmio_le_readw |
| 334 | #define pci_mmio_readl mmio_le_readl |
Carl-Daniel Hailfinger | 54ce73a | 2011-05-03 21:49:41 +0000 | [diff] [blame] | 335 | void rmmio_writeb(uint8_t val, void *addr); |
| 336 | void rmmio_writew(uint16_t val, void *addr); |
| 337 | void rmmio_writel(uint32_t val, void *addr); |
| 338 | void rmmio_le_writeb(uint8_t val, void *addr); |
| 339 | void rmmio_le_writew(uint16_t val, void *addr); |
| 340 | void rmmio_le_writel(uint32_t val, void *addr); |
| 341 | #define pci_rmmio_writeb rmmio_le_writeb |
| 342 | #define pci_rmmio_writew rmmio_le_writew |
| 343 | #define pci_rmmio_writel rmmio_le_writel |
| 344 | void rmmio_valb(void *addr); |
| 345 | void rmmio_valw(void *addr); |
| 346 | void rmmio_vall(void *addr); |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 347 | |
| 348 | /* programmer.c */ |
| 349 | int noop_shutdown(void); |
| 350 | void *fallback_map(const char *descr, unsigned long phys_addr, size_t len); |
| 351 | void fallback_unmap(void *virt_addr, size_t len); |
| 352 | uint8_t noop_chip_readb(const chipaddr addr); |
| 353 | void noop_chip_writeb(uint8_t val, chipaddr addr); |
| 354 | void fallback_chip_writew(uint16_t val, chipaddr addr); |
| 355 | void fallback_chip_writel(uint32_t val, chipaddr addr); |
| 356 | void fallback_chip_writen(uint8_t *buf, chipaddr addr, size_t len); |
| 357 | uint16_t fallback_chip_readw(const chipaddr addr); |
| 358 | uint32_t fallback_chip_readl(const chipaddr addr); |
| 359 | void fallback_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); |
| 360 | |
| 361 | /* dummyflasher.c */ |
| 362 | #if CONFIG_DUMMY == 1 |
| 363 | int dummy_init(void); |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 364 | void *dummy_map(const char *descr, unsigned long phys_addr, size_t len); |
| 365 | void dummy_unmap(void *virt_addr, size_t len); |
| 366 | void dummy_chip_writeb(uint8_t val, chipaddr addr); |
| 367 | void dummy_chip_writew(uint16_t val, chipaddr addr); |
| 368 | void dummy_chip_writel(uint32_t val, chipaddr addr); |
| 369 | void dummy_chip_writen(uint8_t *buf, chipaddr addr, size_t len); |
| 370 | uint8_t dummy_chip_readb(const chipaddr addr); |
| 371 | uint16_t dummy_chip_readw(const chipaddr addr); |
| 372 | uint32_t dummy_chip_readl(const chipaddr addr); |
| 373 | void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 374 | #endif |
| 375 | |
| 376 | /* nic3com.c */ |
| 377 | #if CONFIG_NIC3COM == 1 |
| 378 | int nic3com_init(void); |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 379 | void nic3com_chip_writeb(uint8_t val, chipaddr addr); |
| 380 | uint8_t nic3com_chip_readb(const chipaddr addr); |
| 381 | extern const struct pcidev_status nics_3com[]; |
| 382 | #endif |
| 383 | |
| 384 | /* gfxnvidia.c */ |
| 385 | #if CONFIG_GFXNVIDIA == 1 |
| 386 | int gfxnvidia_init(void); |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 387 | void gfxnvidia_chip_writeb(uint8_t val, chipaddr addr); |
| 388 | uint8_t gfxnvidia_chip_readb(const chipaddr addr); |
| 389 | extern const struct pcidev_status gfx_nvidia[]; |
| 390 | #endif |
| 391 | |
| 392 | /* drkaiser.c */ |
| 393 | #if CONFIG_DRKAISER == 1 |
| 394 | int drkaiser_init(void); |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 395 | void drkaiser_chip_writeb(uint8_t val, chipaddr addr); |
| 396 | uint8_t drkaiser_chip_readb(const chipaddr addr); |
| 397 | extern const struct pcidev_status drkaiser_pcidev[]; |
| 398 | #endif |
| 399 | |
| 400 | /* nicrealtek.c */ |
| 401 | #if CONFIG_NICREALTEK == 1 |
| 402 | int nicrealtek_init(void); |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 403 | void nicrealtek_chip_writeb(uint8_t val, chipaddr addr); |
| 404 | uint8_t nicrealtek_chip_readb(const chipaddr addr); |
| 405 | extern const struct pcidev_status nics_realtek[]; |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 406 | #endif |
| 407 | |
| 408 | /* nicnatsemi.c */ |
| 409 | #if CONFIG_NICNATSEMI == 1 |
| 410 | int nicnatsemi_init(void); |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 411 | void nicnatsemi_chip_writeb(uint8_t val, chipaddr addr); |
| 412 | uint8_t nicnatsemi_chip_readb(const chipaddr addr); |
| 413 | extern const struct pcidev_status nics_natsemi[]; |
| 414 | #endif |
| 415 | |
Carl-Daniel Hailfinger | b713d2e | 2011-05-08 00:24:18 +0000 | [diff] [blame] | 416 | /* nicintel.c */ |
| 417 | #if CONFIG_NICINTEL == 1 |
| 418 | int nicintel_init(void); |
Carl-Daniel Hailfinger | b713d2e | 2011-05-08 00:24:18 +0000 | [diff] [blame] | 419 | void nicintel_chip_writeb(uint8_t val, chipaddr addr); |
| 420 | uint8_t nicintel_chip_readb(const chipaddr addr); |
| 421 | extern const struct pcidev_status nics_intel[]; |
| 422 | #endif |
| 423 | |
Idwer Vollering | 004f4b7 | 2010-09-03 18:21:21 +0000 | [diff] [blame] | 424 | /* nicintel_spi.c */ |
| 425 | #if CONFIG_NICINTEL_SPI == 1 |
| 426 | int nicintel_spi_init(void); |
Idwer Vollering | 004f4b7 | 2010-09-03 18:21:21 +0000 | [diff] [blame] | 427 | int nicintel_spi_send_command(unsigned int writecnt, unsigned int readcnt, |
| 428 | const unsigned char *writearr, unsigned char *readarr); |
| 429 | void nicintel_spi_chip_writeb(uint8_t val, chipaddr addr); |
| 430 | extern const struct pcidev_status nics_intel_spi[]; |
| 431 | #endif |
| 432 | |
Mark Marshall | 90021f2 | 2010-12-03 14:48:11 +0000 | [diff] [blame] | 433 | /* ogp_spi.c */ |
| 434 | #if CONFIG_OGP_SPI == 1 |
| 435 | int ogp_spi_init(void); |
Mark Marshall | 90021f2 | 2010-12-03 14:48:11 +0000 | [diff] [blame] | 436 | extern const struct pcidev_status ogp_spi[]; |
| 437 | #endif |
| 438 | |
Carl-Daniel Hailfinger | 9a1105c | 2011-02-04 21:37:59 +0000 | [diff] [blame] | 439 | /* satamv.c */ |
| 440 | #if CONFIG_SATAMV == 1 |
| 441 | int satamv_init(void); |
Carl-Daniel Hailfinger | 9a1105c | 2011-02-04 21:37:59 +0000 | [diff] [blame] | 442 | void satamv_chip_writeb(uint8_t val, chipaddr addr); |
| 443 | uint8_t satamv_chip_readb(const chipaddr addr); |
| 444 | extern const struct pcidev_status satas_mv[]; |
| 445 | #endif |
| 446 | |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 447 | /* satasii.c */ |
| 448 | #if CONFIG_SATASII == 1 |
| 449 | int satasii_init(void); |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 450 | void satasii_chip_writeb(uint8_t val, chipaddr addr); |
| 451 | uint8_t satasii_chip_readb(const chipaddr addr); |
| 452 | extern const struct pcidev_status satas_sii[]; |
| 453 | #endif |
| 454 | |
| 455 | /* atahpt.c */ |
| 456 | #if CONFIG_ATAHPT == 1 |
| 457 | int atahpt_init(void); |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 458 | void atahpt_chip_writeb(uint8_t val, chipaddr addr); |
| 459 | uint8_t atahpt_chip_readb(const chipaddr addr); |
| 460 | extern const struct pcidev_status ata_hpt[]; |
| 461 | #endif |
| 462 | |
| 463 | /* ft2232_spi.c */ |
Jörg Fischer | 6529b9f | 2010-07-29 15:54:53 +0000 | [diff] [blame] | 464 | #if CONFIG_FT2232_SPI == 1 |
| 465 | struct usbdev_status { |
Uwe Hermann | 48ec1b1 | 2010-08-08 17:01:18 +0000 | [diff] [blame] | 466 | uint16_t vendor_id; |
| 467 | uint16_t device_id; |
| 468 | int status; |
| 469 | const char *vendor_name; |
| 470 | const char *device_name; |
Jörg Fischer | 6529b9f | 2010-07-29 15:54:53 +0000 | [diff] [blame] | 471 | }; |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 472 | int ft2232_spi_init(void); |
Jörg Fischer | 6529b9f | 2010-07-29 15:54:53 +0000 | [diff] [blame] | 473 | extern const struct usbdev_status devs_ft2232spi[]; |
| 474 | void print_supported_usbdevs(const struct usbdev_status *devs); |
| 475 | #endif |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 476 | |
| 477 | /* rayer_spi.c */ |
| 478 | #if CONFIG_RAYER_SPI == 1 |
| 479 | int rayer_spi_init(void); |
| 480 | #endif |
| 481 | |
| 482 | /* bitbang_spi.c */ |
| 483 | int bitbang_spi_init(const struct bitbang_spi_master *master, int halfperiod); |
Carl-Daniel Hailfinger | 2822888 | 2010-09-15 00:17:37 +0000 | [diff] [blame] | 484 | int bitbang_spi_shutdown(const struct bitbang_spi_master *master); |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 485 | |
| 486 | /* buspirate_spi.c */ |
Carl-Daniel Hailfinger | c422484 | 2011-06-09 20:06:34 +0000 | [diff] [blame] | 487 | #if CONFIG_BUSPIRATE_SPI == 1 |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 488 | int buspirate_spi_init(void); |
Carl-Daniel Hailfinger | c422484 | 2011-06-09 20:06:34 +0000 | [diff] [blame] | 489 | #endif |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 490 | |
| 491 | /* dediprog.c */ |
Carl-Daniel Hailfinger | c422484 | 2011-06-09 20:06:34 +0000 | [diff] [blame] | 492 | #if CONFIG_DEDIPROG == 1 |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 493 | int dediprog_init(void); |
Carl-Daniel Hailfinger | c422484 | 2011-06-09 20:06:34 +0000 | [diff] [blame] | 494 | #endif |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 495 | |
| 496 | /* flashrom.c */ |
| 497 | struct decode_sizes { |
| 498 | uint32_t parallel; |
| 499 | uint32_t lpc; |
| 500 | uint32_t fwh; |
| 501 | uint32_t spi; |
| 502 | }; |
| 503 | extern struct decode_sizes max_rom_decode; |
| 504 | extern int programmer_may_write; |
| 505 | extern unsigned long flashbase; |
Carl-Daniel Hailfinger | 4c82318 | 2011-05-04 00:39:50 +0000 | [diff] [blame] | 506 | void check_chip_supported(const struct flashchip *flash); |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 507 | int check_max_decode(enum chipbustype buses, uint32_t size); |
| 508 | char *extract_programmer_param(char *param_name); |
| 509 | |
| 510 | /* layout.c */ |
| 511 | int show_id(uint8_t *bios, int size, int force); |
| 512 | |
| 513 | /* spi.c */ |
| 514 | enum spi_controller { |
| 515 | SPI_CONTROLLER_NONE, |
| 516 | #if CONFIG_INTERNAL == 1 |
| 517 | #if defined(__i386__) || defined(__x86_64__) |
| 518 | SPI_CONTROLLER_ICH7, |
| 519 | SPI_CONTROLLER_ICH9, |
David Hendricks | 4e74839 | 2011-02-28 23:58:15 +0000 | [diff] [blame] | 520 | SPI_CONTROLLER_IT85XX, |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 521 | SPI_CONTROLLER_IT87XX, |
| 522 | SPI_CONTROLLER_SB600, |
| 523 | SPI_CONTROLLER_VIA, |
| 524 | SPI_CONTROLLER_WBSIO, |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 525 | #endif |
| 526 | #endif |
| 527 | #if CONFIG_FT2232_SPI == 1 |
| 528 | SPI_CONTROLLER_FT2232, |
| 529 | #endif |
| 530 | #if CONFIG_DUMMY == 1 |
| 531 | SPI_CONTROLLER_DUMMY, |
| 532 | #endif |
| 533 | #if CONFIG_BUSPIRATE_SPI == 1 |
| 534 | SPI_CONTROLLER_BUSPIRATE, |
| 535 | #endif |
| 536 | #if CONFIG_DEDIPROG == 1 |
| 537 | SPI_CONTROLLER_DEDIPROG, |
| 538 | #endif |
Michael Karcher | b9dbe48 | 2011-05-11 17:07:07 +0000 | [diff] [blame] | 539 | #if CONFIG_OGP_SPI == 1 || CONFIG_NICINTEL_SPI == 1 || CONFIG_RAYER_SPI == 1 || (CONFIG_INTERNAL == 1 && (defined(__i386__) || defined(__x86_64__))) |
| 540 | SPI_CONTROLLER_BITBANG, |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 541 | #endif |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 542 | }; |
| 543 | extern const int spi_programmer_count; |
Michael Karcher | 6279751 | 2011-05-11 17:07:02 +0000 | [diff] [blame] | 544 | |
| 545 | #define MAX_DATA_UNSPECIFIED 0 |
| 546 | #define MAX_DATA_READ_UNLIMITED 64 * 1024 |
| 547 | #define MAX_DATA_WRITE_UNLIMITED 256 |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 548 | struct spi_programmer { |
Michael Karcher | b9dbe48 | 2011-05-11 17:07:07 +0000 | [diff] [blame] | 549 | enum spi_controller type; |
Michael Karcher | 6279751 | 2011-05-11 17:07:02 +0000 | [diff] [blame] | 550 | int max_data_read; |
| 551 | int max_data_write; |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 552 | int (*command)(unsigned int writecnt, unsigned int readcnt, |
| 553 | const unsigned char *writearr, unsigned char *readarr); |
| 554 | int (*multicommand)(struct spi_command *cmds); |
| 555 | |
| 556 | /* Optimized functions for this programmer */ |
| 557 | int (*read)(struct flashchip *flash, uint8_t *buf, int start, int len); |
| 558 | int (*write_256)(struct flashchip *flash, uint8_t *buf, int start, int len); |
| 559 | }; |
| 560 | |
Michael Karcher | b9dbe48 | 2011-05-11 17:07:07 +0000 | [diff] [blame] | 561 | extern const struct spi_programmer *spi_programmer; |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 562 | int default_spi_send_command(unsigned int writecnt, unsigned int readcnt, |
| 563 | const unsigned char *writearr, unsigned char *readarr); |
| 564 | int default_spi_send_multicommand(struct spi_command *cmds); |
Michael Karcher | 6279751 | 2011-05-11 17:07:02 +0000 | [diff] [blame] | 565 | int default_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len); |
| 566 | int default_spi_write_256(struct flashchip *flash, uint8_t *buf, int start, int len); |
Michael Karcher | b9dbe48 | 2011-05-11 17:07:07 +0000 | [diff] [blame] | 567 | void register_spi_programmer(const struct spi_programmer *programmer); |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 568 | |
| 569 | /* ichspi.c */ |
| 570 | #if CONFIG_INTERNAL == 1 |
| 571 | extern uint32_t ichspi_bbar; |
| 572 | int ich_init_spi(struct pci_dev *dev, uint32_t base, void *rcrb, |
| 573 | int ich_generation); |
| 574 | int via_init_spi(struct pci_dev *dev); |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 575 | |
David Hendricks | 4e74839 | 2011-02-28 23:58:15 +0000 | [diff] [blame] | 576 | /* it85spi.c */ |
Carl-Daniel Hailfinger | bfecef6 | 2011-04-27 14:34:08 +0000 | [diff] [blame] | 577 | int it85xx_spi_init(struct superio s); |
David Hendricks | 4e74839 | 2011-02-28 23:58:15 +0000 | [diff] [blame] | 578 | |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 579 | /* it87spi.c */ |
| 580 | void enter_conf_mode_ite(uint16_t port); |
| 581 | void exit_conf_mode_ite(uint16_t port); |
Carl-Daniel Hailfinger | bfecef6 | 2011-04-27 14:34:08 +0000 | [diff] [blame] | 582 | void probe_superio_ite(void); |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 583 | int init_superio_ite(void); |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 584 | |
Carl-Daniel Hailfinger | c422484 | 2011-06-09 20:06:34 +0000 | [diff] [blame] | 585 | /* mcp6x_spi.c */ |
| 586 | int mcp6x_spi_init(int want_spi); |
| 587 | |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 588 | /* sb600spi.c */ |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 589 | int sb600_probe_spi(struct pci_dev *dev); |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 590 | |
| 591 | /* wbsio_spi.c */ |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 592 | int wbsio_check_for_spi(void); |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 593 | #endif |
| 594 | |
| 595 | /* serprog.c */ |
Carl-Daniel Hailfinger | c422484 | 2011-06-09 20:06:34 +0000 | [diff] [blame] | 596 | #if CONFIG_SERPROG == 1 |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 597 | int serprog_init(void); |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 598 | void serprog_chip_writeb(uint8_t val, chipaddr addr); |
| 599 | uint8_t serprog_chip_readb(const chipaddr addr); |
| 600 | void serprog_chip_readn(uint8_t *buf, const chipaddr addr, size_t len); |
| 601 | void serprog_delay(int delay); |
Carl-Daniel Hailfinger | c422484 | 2011-06-09 20:06:34 +0000 | [diff] [blame] | 602 | #endif |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 603 | |
| 604 | /* serial.c */ |
| 605 | #if _WIN32 |
| 606 | typedef HANDLE fdtype; |
| 607 | #else |
| 608 | typedef int fdtype; |
| 609 | #endif |
| 610 | |
| 611 | void sp_flush_incoming(void); |
| 612 | fdtype sp_openserport(char *dev, unsigned int baud); |
| 613 | void __attribute__((noreturn)) sp_die(char *msg); |
| 614 | extern fdtype sp_fd; |
David Hendricks | 8bb2021 | 2011-06-14 01:35:36 +0000 | [diff] [blame] | 615 | /* expose serialport_shutdown as it's currently used by buspirate */ |
| 616 | int serialport_shutdown(void *data); |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 617 | int serialport_write(unsigned char *buf, unsigned int writecnt); |
| 618 | int serialport_read(unsigned char *buf, unsigned int readcnt); |
| 619 | |
| 620 | #endif /* !__PROGRAMMER_H__ */ |