Support 64-bit MEM BARs wherever possible
Add more sanity checks for BARs and abort if resources are unreachable.
Undecoded resources are reported, but flashrom will proceed anyway just
in case the BIOS screwed up the configuration.
(The empty CardBus handler is intentional, according to the spec no BARs
in PCI config space are used by CardBus.)
Found while working on a driver for the Angelbird PCIe-based SSD which
has 64-bit capable MEM BARs.
Corresponding to flashrom svn r1261.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
diff --git a/programmer.h b/programmer.h
index 1f5fa25..da49096 100644
--- a/programmer.h
+++ b/programmer.h
@@ -219,8 +219,8 @@
const char *vendor_name;
const char *device_name;
};
-uint32_t pcidev_validate(struct pci_dev *dev, uint32_t bar, const struct pcidev_status *devs);
-uint32_t pcidev_init(uint16_t vendor_id, uint32_t bar, const struct pcidev_status *devs);
+uintptr_t pcidev_validate(struct pci_dev *dev, int bar, const struct pcidev_status *devs);
+uintptr_t pcidev_init(uint16_t vendor_id, int bar, const struct pcidev_status *devs);
/* rpci_write_* are reversible writes. The original PCI config space register
* contents will be restored on shutdown.
*/