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Nico Huber7ad2d652016-12-07 15:19:32 +01001--
Nico Huberabb16d92018-05-29 01:44:26 +02002-- Copyright (C) 2015-2018 secunet Security Networks AG
Nico Huber7ad2d652016-12-07 15:19:32 +01003--
4-- This program is free software; you can redistribute it and/or modify
5-- it under the terms of the GNU General Public License as published by
6-- the Free Software Foundation; either version 2 of the License, or
7-- (at your option) any later version.
8--
9-- This program is distributed in the hope that it will be useful,
10-- but WITHOUT ANY WARRANTY; without even the implied warranty of
11-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12-- GNU General Public License for more details.
13--
14
15with HW.Debug;
16with GNAT.Source_Info;
17
Nico Huber7ad2d652016-12-07 15:19:32 +010018with HW.GFX.GMA.DP_Info;
19
20package body HW.GFX.GMA.Transcoder is
21
22 type Default_Transcoder_Array is array (Pipe_Index) of Transcoder_Index;
23 Default_Transcoder : constant Default_Transcoder_Array :=
24 (Primary => Trans_A,
25 Secondary => Trans_B,
26 Tertiary => Trans_C);
27
28 function Get_Idx (Pipe : Pipe_Index; Port : GPU_Port) return Transcoder_Index
29 is
30 begin
31 return
32 (if Config.Has_EDP_Transcoder and then Port = DIGI_A then
33 Trans_EDP
34 else
35 Default_Transcoder (Pipe));
36 end Get_Idx;
37
38 ----------------------------------------------------------------------------
39
40 TRANS_CLK_SEL_PORT_NONE : constant := 0 * 2 ** 29;
41
42 type TRANS_CLK_SEL_PORT_Array is
43 array (Digital_Port) of Word32;
44 TRANS_CLK_SEL_PORT : constant TRANS_CLK_SEL_PORT_Array :=
45 (DIGI_A => 0 * 2 ** 29, -- DDI A is not selectable
46 DIGI_B => 2 * 2 ** 29,
47 DIGI_C => 3 * 2 ** 29,
48 DIGI_D => 4 * 2 ** 29,
49 DIGI_E => 5 * 2 ** 29);
50
51 TRANS_CONF_ENABLE : constant := 1 * 2 ** 31;
52 TRANS_CONF_ENABLED_STATUS : constant := 1 * 2 ** 30;
53 TRANS_CONF_ENABLE_DITHER : constant := 1 * 2 ** 4;
54
55 type BPC_Array is array (BPC_Type) of Word32;
56 TRANS_CONF_BPC : constant BPC_Array :=
57 (6 => 2 * 2 ** 5,
58 8 => 0 * 2 ** 5,
59 10 => 1 * 2 ** 5,
60 12 => 3 * 2 ** 5,
61 others => 0 * 2 ** 5); -- default to 8 BPC
62
63 function BPC_Conf (BPC : BPC_Type; Dither : Boolean) return Word32 is
64 begin
65 return
66 (if Config.Has_Pipeconf_BPC then TRANS_CONF_BPC (BPC) else 0) or
67 (if Dither then TRANS_CONF_ENABLE_DITHER else 0);
68 end BPC_Conf;
69
70 ----------------------------------------------------------------------------
71
72 DDI_FUNC_CTL_ENABLE : constant := 1 * 2 ** 31;
73 DDI_FUNC_CTL_MODE_SELECT_MASK : constant := 7 * 2 ** 24;
74 DDI_FUNC_CTL_MODE_SELECT_HDMI : constant := 0 * 2 ** 24;
75 DDI_FUNC_CTL_MODE_SELECT_DVI : constant := 1 * 2 ** 24;
76 DDI_FUNC_CTL_MODE_SELECT_DP_SST : constant := 2 * 2 ** 24;
77 DDI_FUNC_CTL_MODE_SELECT_DP_MST : constant := 3 * 2 ** 24;
78 DDI_FUNC_CTL_MODE_SELECT_FDI : constant := 4 * 2 ** 24;
Nico Huber7ad2d652016-12-07 15:19:32 +010079
80 type DDI_Select_Array is array (Digital_Port) of Word32;
81 DDI_FUNC_CTL_DDI_SELECT : constant DDI_Select_Array :=
82 (DIGI_A => 0 * 2 ** 28,
83 DIGI_B => 1 * 2 ** 28,
84 DIGI_C => 2 * 2 ** 28,
85 DIGI_D => 3 * 2 ** 28,
86 DIGI_E => 4 * 2 ** 28);
87
88 type DDI_Mode_Array is array (Display_Type) of Word32;
89 DDI_FUNC_CTL_MODE_SELECT : constant DDI_Mode_Array :=
90 (VGA => DDI_FUNC_CTL_MODE_SELECT_FDI,
91 HDMI => DDI_FUNC_CTL_MODE_SELECT_DVI,
92 DP => DDI_FUNC_CTL_MODE_SELECT_DP_SST,
93 others => 0);
94
95 type HV_Sync_Array is array (Boolean) of Word32;
96 DDI_FUNC_CTL_VSYNC : constant HV_Sync_Array :=
97 (False => 0 * 2 ** 17,
98 True => 1 * 2 ** 17);
99 DDI_FUNC_CTL_HSYNC : constant HV_Sync_Array :=
100 (False => 0 * 2 ** 16,
101 True => 1 * 2 ** 16);
102
Nico Huberabb16d92018-05-29 01:44:26 +0200103 DDI_FUNC_CTL_EDP_SELECT_MASK : constant := 7 * 2 ** 12;
104 DDI_FUNC_CTL_EDP_SELECT_ALWAYS_ON : constant := 0 * 2 ** 12;
105 DDI_FUNC_CTL_EDP_SELECT : constant array (Pipe_Index) of Word32 :=
106 (Primary => 4 * 2 ** 12,
107 Secondary => 5 * 2 ** 12,
108 Tertiary => 6 * 2 ** 12);
Nico Huber7ad2d652016-12-07 15:19:32 +0100109
110 type Port_Width_Array is array (DP_Lane_Count) of Word32;
111 DDI_FUNC_CTL_PORT_WIDTH : constant Port_Width_Array :=
112 (DP_Lane_Count_1 => 0 * 2 ** 1,
113 DP_Lane_Count_2 => 1 * 2 ** 1,
114 DP_Lane_Count_4 => 3 * 2 ** 1);
115
116 DDI_FUNC_CTL_BPC : constant BPC_Array :=
117 (6 => 2 * 2 ** 20,
118 8 => 0 * 2 ** 20,
119 10 => 1 * 2 ** 20,
120 12 => 3 * 2 ** 20,
121 others => 0 * 2 ** 20); -- default to 8 BPC
122
123 ----------------------------------------------------------------------------
124
125 TRANS_MSA_MISC_SYNC_CLK : constant := 1 * 2 ** 0;
126 TRANS_MSA_MISC_BPC : constant BPC_Array :=
127 (6 => 0 * 2 ** 5,
128 8 => 1 * 2 ** 5,
129 10 => 2 * 2 ** 5,
130 12 => 3 * 2 ** 5,
131 16 => 4 * 2 ** 5,
132 others => 1 * 2 ** 5); -- default to 8 BPC
133
134 function TRANS_DATA_M_TU (Transfer_Unit : Positive) return Word32 is
135 begin
136 return Shift_Left (Word32 (Transfer_Unit - 1), 25);
137 end TRANS_DATA_M_TU;
138
139 ----------------------------------------------------------------------------
140
141 function Encode (LSW, MSW : Pos16) return Word32
142 is
Nico Huber31a52172017-03-05 14:17:34 +0100143 pragma Warnings (GNAT, Off, """Integer_16"" is already use-visible *",
144 Reason => "Needed for older compiler versions");
Nico Huber7ad2d652016-12-07 15:19:32 +0100145 use type HW.Pos16;
Nico Huber31a52172017-03-05 14:17:34 +0100146 pragma Warnings (GNAT, On, """Integer_16"" is already use-visible *");
Nico Huber7ad2d652016-12-07 15:19:32 +0100147 begin
148 return Shift_Left (Word32 (MSW - 1), 16) or Word32 (LSW - 1);
149 end Encode;
150
151 ----------------------------------------------------------------------------
152
153 procedure Setup_Link
154 (Trans : Transcoder_Regs;
155 Link : DP_Link;
156 Mode : Mode_Type)
157 with
158 Global => (In_Out => Registers.Register_State),
159 Depends => (Registers.Register_State =>+ (Trans, Link, Mode))
160 is
161 Data_M, Link_M : DP_Info.M_Type;
162 Data_N, Link_N : DP_Info.N_Type;
163 begin
164 pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
165
166 DP_Info.Calculate_M_N
167 (Link => Link,
168 Mode => Mode,
169 Data_M => Data_M,
170 Data_N => Data_N,
171 Link_M => Link_M,
172 Link_N => Link_N);
173
174 Registers.Write
175 (Register => Trans.DATA_M1,
176 Value => TRANS_DATA_M_TU (64) or
177 Word32 (Data_M));
178 Registers.Write
179 (Register => Trans.DATA_N1,
180 Value => Word32 (Data_N));
181
182 Registers.Write
183 (Register => Trans.LINK_M1,
184 Value => Word32 (Link_M));
185 Registers.Write
186 (Register => Trans.LINK_N1,
187 Value => Word32 (Link_N));
188
189 if Config.Has_Pipe_MSA_Misc then
190 Registers.Write
191 (Register => Trans.MSA_MISC,
192 Value => TRANS_MSA_MISC_SYNC_CLK or
193 TRANS_MSA_MISC_BPC (Mode.BPC));
194 end if;
195 end Setup_Link;
196
197 ----------------------------------------------------------------------------
198
199 procedure Setup
200 (Pipe : Pipe_Index;
201 Port_Cfg : Port_Config)
202 is
203 use type HW.GFX.GMA.Registers.Registers_Invalid_Index;
204
205 Trans : Transcoder_Regs renames
206 Transcoders (Get_Idx (Pipe, Port_Cfg.Port));
207 M : constant Mode_Type := Port_Cfg.Mode;
208 begin
209 pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
210
211 if Config.Has_Trans_Clk_Sel and then
Arthur Heymans5d08a932018-03-28 17:00:18 +0200212 Trans.CLK_SEL /= Registers.Invalid_Register and then
213 Port_Cfg.Port in Digital_Port
Nico Huber7ad2d652016-12-07 15:19:32 +0100214 then
215 Registers.Write
216 (Register => Trans.CLK_SEL,
217 Value => TRANS_CLK_SEL_PORT (Port_Cfg.Port));
218 end if;
219
220 if Port_Cfg.Is_FDI then
221 Setup_Link (Trans, Port_Cfg.FDI, Port_Cfg.Mode);
222 elsif Port_Cfg.Display = DP then
223 Setup_Link (Trans, Port_Cfg.DP, Port_Cfg.Mode);
224 end if;
225
226 Registers.Write (Trans.HTOTAL, Encode (M.H_Visible, M.H_Total));
227 Registers.Write (Trans.HBLANK, Encode (M.H_Visible, M.H_Total));
228 Registers.Write (Trans.HSYNC, Encode (M.H_Sync_Begin, M.H_Sync_End));
229 Registers.Write (Trans.VTOTAL, Encode (M.V_Visible, M.V_Total));
230 Registers.Write (Trans.VBLANK, Encode (M.V_Visible, M.V_Total));
231 Registers.Write (Trans.VSYNC, Encode (M.V_Sync_Begin, M.V_Sync_End));
232 end Setup;
233
234 ----------------------------------------------------------------------------
235
236 procedure On
237 (Pipe : Pipe_Index;
238 Port_Cfg : Port_Config;
Nico Huberabb16d92018-05-29 01:44:26 +0200239 Dither : Boolean;
240 Scale : Boolean)
Nico Huber7ad2d652016-12-07 15:19:32 +0100241 is
242 Trans : Transcoder_Regs renames
243 Transcoders (Get_Idx (Pipe, Port_Cfg.Port));
Nico Huberabb16d92018-05-29 01:44:26 +0200244 EDP_Select : constant Word32 :=
245 (if Pipe = Primary and not Scale then
246 DDI_FUNC_CTL_EDP_SELECT_ALWAYS_ON
247 else
248 DDI_FUNC_CTL_EDP_SELECT (Pipe));
Nico Huber7ad2d652016-12-07 15:19:32 +0100249 begin
Arthur Heymans5d08a932018-03-28 17:00:18 +0200250 if Config.Has_Pipe_DDI_Func and Port_Cfg.Port in Digital_Port then
Nico Huber7ad2d652016-12-07 15:19:32 +0100251 Registers.Write
252 (Register => Trans.DDI_FUNC_CTL,
253 Value => DDI_FUNC_CTL_ENABLE or
254 DDI_FUNC_CTL_DDI_SELECT (Port_Cfg.Port) or
255 DDI_FUNC_CTL_MODE_SELECT (Port_Cfg.Display) or
256 DDI_FUNC_CTL_BPC (Port_Cfg.Mode.BPC) or
257 DDI_FUNC_CTL_VSYNC (Port_Cfg.Mode.V_Sync_Active_High) or
258 DDI_FUNC_CTL_HSYNC (Port_Cfg.Mode.H_Sync_Active_High) or
Nico Huberabb16d92018-05-29 01:44:26 +0200259 EDP_Select or
Nico Huber7ad2d652016-12-07 15:19:32 +0100260 DDI_FUNC_CTL_PORT_WIDTH (Port_Cfg.DP.Lane_Count));
261 end if;
262
263 Registers.Write
264 (Register => Trans.CONF,
265 Value => TRANS_CONF_ENABLE or
266 (if not Config.Has_Pipeconf_Misc then
267 BPC_Conf (Port_Cfg.Mode.BPC, Dither) else 0));
268 Registers.Posting_Read (Trans.CONF);
269 end On;
270
271 ----------------------------------------------------------------------------
272
273 procedure Trans_Off (Trans : Transcoder_Regs)
274 is
275 Enabled : Boolean;
276 begin
277 Registers.Is_Set_Mask (Trans.CONF, TRANS_CONF_ENABLE, Enabled);
278
279 if Enabled then
280 Registers.Unset_Mask (Trans.CONF, TRANS_CONF_ENABLE);
281 end if;
282
283 -- Workaround for Broadwell:
284 -- Status may be wrong if pipe hasn't been enabled since reset.
285 if not Config.Pipe_Enabled_Workaround or else Enabled then
286 -- synchronously wait until pipe is truly off
287 Registers.Wait_Unset_Mask
288 (Register => Trans.CONF,
289 Mask => TRANS_CONF_ENABLED_STATUS,
290 TOut_MS => 40);
291 end if;
292
293 if Config.Has_Pipe_DDI_Func then
294 Registers.Write (Trans.DDI_FUNC_CTL, 0);
295 end if;
296 end Trans_Off;
297
298 procedure Off (Pipe : Pipe_Index)
299 is
300 DDI_Func_Ctl : Word32;
301 begin
302 if Config.Has_EDP_Transcoder then
303 Registers.Read (Registers.PIPE_EDP_DDI_FUNC_CTL, DDI_Func_Ctl);
304 DDI_Func_Ctl := DDI_Func_Ctl and DDI_FUNC_CTL_EDP_SELECT_MASK;
305
306 if (Pipe = Primary and
307 DDI_Func_Ctl = DDI_FUNC_CTL_EDP_SELECT_ALWAYS_ON) or
Nico Huberabb16d92018-05-29 01:44:26 +0200308 DDI_Func_Ctl = DDI_FUNC_CTL_EDP_SELECT (Pipe)
Nico Huber7ad2d652016-12-07 15:19:32 +0100309 then
310 Trans_Off (Transcoders (Trans_EDP));
311 end if;
312 end if;
313
314 Trans_Off (Transcoders (Default_Transcoder (Pipe)));
315 end Off;
316
317 procedure Clk_Off (Pipe : Pipe_Index)
318 is
319 use type Registers.Registers_Invalid_Index;
320
321 Trans : Transcoder_Regs renames Transcoders (Default_Transcoder (Pipe));
322 begin
323 if Config.Has_Trans_Clk_Sel and then
324 Trans.CLK_SEL /= Registers.Invalid_Register
325 then
326 Registers.Write (Trans.CLK_SEL, TRANS_CLK_SEL_PORT_NONE);
327 end if;
328 end Clk_Off;
329
330end HW.GFX.GMA.Transcoder;