blob: 27edf319f27798e056dc48e5866c5a8f2f41c83d [file] [log] [blame]
Nico Huber7ad2d652016-12-07 15:19:32 +01001--
2-- Copyright (C) 2015-2016 secunet Security Networks AG
3--
4-- This program is free software; you can redistribute it and/or modify
5-- it under the terms of the GNU General Public License as published by
6-- the Free Software Foundation; either version 2 of the License, or
7-- (at your option) any later version.
8--
9-- This program is distributed in the hope that it will be useful,
10-- but WITHOUT ANY WARRANTY; without even the implied warranty of
11-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12-- GNU General Public License for more details.
13--
14
15with HW.Debug;
16with GNAT.Source_Info;
17
18with HW.GFX.GMA.Config;
19with HW.GFX.GMA.DP_Info;
20
21package body HW.GFX.GMA.Transcoder is
22
23 type Default_Transcoder_Array is array (Pipe_Index) of Transcoder_Index;
24 Default_Transcoder : constant Default_Transcoder_Array :=
25 (Primary => Trans_A,
26 Secondary => Trans_B,
27 Tertiary => Trans_C);
28
29 function Get_Idx (Pipe : Pipe_Index; Port : GPU_Port) return Transcoder_Index
30 is
31 begin
32 return
33 (if Config.Has_EDP_Transcoder and then Port = DIGI_A then
34 Trans_EDP
35 else
36 Default_Transcoder (Pipe));
37 end Get_Idx;
38
39 ----------------------------------------------------------------------------
40
41 TRANS_CLK_SEL_PORT_NONE : constant := 0 * 2 ** 29;
42
43 type TRANS_CLK_SEL_PORT_Array is
44 array (Digital_Port) of Word32;
45 TRANS_CLK_SEL_PORT : constant TRANS_CLK_SEL_PORT_Array :=
46 (DIGI_A => 0 * 2 ** 29, -- DDI A is not selectable
47 DIGI_B => 2 * 2 ** 29,
48 DIGI_C => 3 * 2 ** 29,
49 DIGI_D => 4 * 2 ** 29,
50 DIGI_E => 5 * 2 ** 29);
51
52 TRANS_CONF_ENABLE : constant := 1 * 2 ** 31;
53 TRANS_CONF_ENABLED_STATUS : constant := 1 * 2 ** 30;
54 TRANS_CONF_ENABLE_DITHER : constant := 1 * 2 ** 4;
55
56 type BPC_Array is array (BPC_Type) of Word32;
57 TRANS_CONF_BPC : constant BPC_Array :=
58 (6 => 2 * 2 ** 5,
59 8 => 0 * 2 ** 5,
60 10 => 1 * 2 ** 5,
61 12 => 3 * 2 ** 5,
62 others => 0 * 2 ** 5); -- default to 8 BPC
63
64 function BPC_Conf (BPC : BPC_Type; Dither : Boolean) return Word32 is
65 begin
66 return
67 (if Config.Has_Pipeconf_BPC then TRANS_CONF_BPC (BPC) else 0) or
68 (if Dither then TRANS_CONF_ENABLE_DITHER else 0);
69 end BPC_Conf;
70
71 ----------------------------------------------------------------------------
72
73 DDI_FUNC_CTL_ENABLE : constant := 1 * 2 ** 31;
74 DDI_FUNC_CTL_MODE_SELECT_MASK : constant := 7 * 2 ** 24;
75 DDI_FUNC_CTL_MODE_SELECT_HDMI : constant := 0 * 2 ** 24;
76 DDI_FUNC_CTL_MODE_SELECT_DVI : constant := 1 * 2 ** 24;
77 DDI_FUNC_CTL_MODE_SELECT_DP_SST : constant := 2 * 2 ** 24;
78 DDI_FUNC_CTL_MODE_SELECT_DP_MST : constant := 3 * 2 ** 24;
79 DDI_FUNC_CTL_MODE_SELECT_FDI : constant := 4 * 2 ** 24;
80 DDI_FUNC_CTL_EDP_SELECT_MASK : constant := 7 * 2 ** 12;
81 DDI_FUNC_CTL_EDP_SELECT_ALWAYS_ON : constant := 0 * 2 ** 12;
82 DDI_FUNC_CTL_EDP_SELECT_A : constant := 4 * 2 ** 12;
83 DDI_FUNC_CTL_EDP_SELECT_B : constant := 5 * 2 ** 12;
84 DDI_FUNC_CTL_EDP_SELECT_C : constant := 6 * 2 ** 12;
85
86 type DDI_Select_Array is array (Digital_Port) of Word32;
87 DDI_FUNC_CTL_DDI_SELECT : constant DDI_Select_Array :=
88 (DIGI_A => 0 * 2 ** 28,
89 DIGI_B => 1 * 2 ** 28,
90 DIGI_C => 2 * 2 ** 28,
91 DIGI_D => 3 * 2 ** 28,
92 DIGI_E => 4 * 2 ** 28);
93
94 type DDI_Mode_Array is array (Display_Type) of Word32;
95 DDI_FUNC_CTL_MODE_SELECT : constant DDI_Mode_Array :=
96 (VGA => DDI_FUNC_CTL_MODE_SELECT_FDI,
97 HDMI => DDI_FUNC_CTL_MODE_SELECT_DVI,
98 DP => DDI_FUNC_CTL_MODE_SELECT_DP_SST,
99 others => 0);
100
101 type HV_Sync_Array is array (Boolean) of Word32;
102 DDI_FUNC_CTL_VSYNC : constant HV_Sync_Array :=
103 (False => 0 * 2 ** 17,
104 True => 1 * 2 ** 17);
105 DDI_FUNC_CTL_HSYNC : constant HV_Sync_Array :=
106 (False => 0 * 2 ** 16,
107 True => 1 * 2 ** 16);
108
109 type EDP_Select_Array is array (Pipe_Index) of Word32;
110 DDI_FUNC_CTL_EDP_SELECT : constant EDP_Select_Array :=
111 (Primary => DDI_FUNC_CTL_EDP_SELECT_ALWAYS_ON, -- we never use
112 -- panel fitter
113 Secondary => DDI_FUNC_CTL_EDP_SELECT_B,
114 Tertiary => DDI_FUNC_CTL_EDP_SELECT_C);
115 DDI_FUNC_CTL_EDP_SELECT_ONOFF : constant EDP_Select_Array :=
116 (Primary => DDI_FUNC_CTL_EDP_SELECT_A,
117 Secondary => DDI_FUNC_CTL_EDP_SELECT_B,
118 Tertiary => DDI_FUNC_CTL_EDP_SELECT_C);
119
120 type Port_Width_Array is array (DP_Lane_Count) of Word32;
121 DDI_FUNC_CTL_PORT_WIDTH : constant Port_Width_Array :=
122 (DP_Lane_Count_1 => 0 * 2 ** 1,
123 DP_Lane_Count_2 => 1 * 2 ** 1,
124 DP_Lane_Count_4 => 3 * 2 ** 1);
125
126 DDI_FUNC_CTL_BPC : constant BPC_Array :=
127 (6 => 2 * 2 ** 20,
128 8 => 0 * 2 ** 20,
129 10 => 1 * 2 ** 20,
130 12 => 3 * 2 ** 20,
131 others => 0 * 2 ** 20); -- default to 8 BPC
132
133 ----------------------------------------------------------------------------
134
135 TRANS_MSA_MISC_SYNC_CLK : constant := 1 * 2 ** 0;
136 TRANS_MSA_MISC_BPC : constant BPC_Array :=
137 (6 => 0 * 2 ** 5,
138 8 => 1 * 2 ** 5,
139 10 => 2 * 2 ** 5,
140 12 => 3 * 2 ** 5,
141 16 => 4 * 2 ** 5,
142 others => 1 * 2 ** 5); -- default to 8 BPC
143
144 function TRANS_DATA_M_TU (Transfer_Unit : Positive) return Word32 is
145 begin
146 return Shift_Left (Word32 (Transfer_Unit - 1), 25);
147 end TRANS_DATA_M_TU;
148
149 ----------------------------------------------------------------------------
150
151 function Encode (LSW, MSW : Pos16) return Word32
152 is
153 use type HW.Pos16;
154 begin
155 return Shift_Left (Word32 (MSW - 1), 16) or Word32 (LSW - 1);
156 end Encode;
157
158 ----------------------------------------------------------------------------
159
160 procedure Setup_Link
161 (Trans : Transcoder_Regs;
162 Link : DP_Link;
163 Mode : Mode_Type)
164 with
165 Global => (In_Out => Registers.Register_State),
166 Depends => (Registers.Register_State =>+ (Trans, Link, Mode))
167 is
168 Data_M, Link_M : DP_Info.M_Type;
169 Data_N, Link_N : DP_Info.N_Type;
170 begin
171 pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
172
173 DP_Info.Calculate_M_N
174 (Link => Link,
175 Mode => Mode,
176 Data_M => Data_M,
177 Data_N => Data_N,
178 Link_M => Link_M,
179 Link_N => Link_N);
180
181 Registers.Write
182 (Register => Trans.DATA_M1,
183 Value => TRANS_DATA_M_TU (64) or
184 Word32 (Data_M));
185 Registers.Write
186 (Register => Trans.DATA_N1,
187 Value => Word32 (Data_N));
188
189 Registers.Write
190 (Register => Trans.LINK_M1,
191 Value => Word32 (Link_M));
192 Registers.Write
193 (Register => Trans.LINK_N1,
194 Value => Word32 (Link_N));
195
196 if Config.Has_Pipe_MSA_Misc then
197 Registers.Write
198 (Register => Trans.MSA_MISC,
199 Value => TRANS_MSA_MISC_SYNC_CLK or
200 TRANS_MSA_MISC_BPC (Mode.BPC));
201 end if;
202 end Setup_Link;
203
204 ----------------------------------------------------------------------------
205
206 procedure Setup
207 (Pipe : Pipe_Index;
208 Port_Cfg : Port_Config)
209 is
210 use type HW.GFX.GMA.Registers.Registers_Invalid_Index;
211
212 Trans : Transcoder_Regs renames
213 Transcoders (Get_Idx (Pipe, Port_Cfg.Port));
214 M : constant Mode_Type := Port_Cfg.Mode;
215 begin
216 pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
217
218 if Config.Has_Trans_Clk_Sel and then
219 Trans.CLK_SEL /= Registers.Invalid_Register
220 then
221 Registers.Write
222 (Register => Trans.CLK_SEL,
223 Value => TRANS_CLK_SEL_PORT (Port_Cfg.Port));
224 end if;
225
226 if Port_Cfg.Is_FDI then
227 Setup_Link (Trans, Port_Cfg.FDI, Port_Cfg.Mode);
228 elsif Port_Cfg.Display = DP then
229 Setup_Link (Trans, Port_Cfg.DP, Port_Cfg.Mode);
230 end if;
231
232 Registers.Write (Trans.HTOTAL, Encode (M.H_Visible, M.H_Total));
233 Registers.Write (Trans.HBLANK, Encode (M.H_Visible, M.H_Total));
234 Registers.Write (Trans.HSYNC, Encode (M.H_Sync_Begin, M.H_Sync_End));
235 Registers.Write (Trans.VTOTAL, Encode (M.V_Visible, M.V_Total));
236 Registers.Write (Trans.VBLANK, Encode (M.V_Visible, M.V_Total));
237 Registers.Write (Trans.VSYNC, Encode (M.V_Sync_Begin, M.V_Sync_End));
238 end Setup;
239
240 ----------------------------------------------------------------------------
241
242 procedure On
243 (Pipe : Pipe_Index;
244 Port_Cfg : Port_Config;
245 Dither : Boolean)
246 is
247 Trans : Transcoder_Regs renames
248 Transcoders (Get_Idx (Pipe, Port_Cfg.Port));
249 begin
250 if Config.Has_Pipe_DDI_Func then
251 Registers.Write
252 (Register => Trans.DDI_FUNC_CTL,
253 Value => DDI_FUNC_CTL_ENABLE or
254 DDI_FUNC_CTL_DDI_SELECT (Port_Cfg.Port) or
255 DDI_FUNC_CTL_MODE_SELECT (Port_Cfg.Display) or
256 DDI_FUNC_CTL_BPC (Port_Cfg.Mode.BPC) or
257 DDI_FUNC_CTL_VSYNC (Port_Cfg.Mode.V_Sync_Active_High) or
258 DDI_FUNC_CTL_HSYNC (Port_Cfg.Mode.H_Sync_Active_High) or
259 DDI_FUNC_CTL_EDP_SELECT (Pipe) or
260 DDI_FUNC_CTL_PORT_WIDTH (Port_Cfg.DP.Lane_Count));
261 end if;
262
263 Registers.Write
264 (Register => Trans.CONF,
265 Value => TRANS_CONF_ENABLE or
266 (if not Config.Has_Pipeconf_Misc then
267 BPC_Conf (Port_Cfg.Mode.BPC, Dither) else 0));
268 Registers.Posting_Read (Trans.CONF);
269 end On;
270
271 ----------------------------------------------------------------------------
272
273 procedure Trans_Off (Trans : Transcoder_Regs)
274 is
275 Enabled : Boolean;
276 begin
277 Registers.Is_Set_Mask (Trans.CONF, TRANS_CONF_ENABLE, Enabled);
278
279 if Enabled then
280 Registers.Unset_Mask (Trans.CONF, TRANS_CONF_ENABLE);
281 end if;
282
283 -- Workaround for Broadwell:
284 -- Status may be wrong if pipe hasn't been enabled since reset.
285 if not Config.Pipe_Enabled_Workaround or else Enabled then
286 -- synchronously wait until pipe is truly off
287 Registers.Wait_Unset_Mask
288 (Register => Trans.CONF,
289 Mask => TRANS_CONF_ENABLED_STATUS,
290 TOut_MS => 40);
291 end if;
292
293 if Config.Has_Pipe_DDI_Func then
294 Registers.Write (Trans.DDI_FUNC_CTL, 0);
295 end if;
296 end Trans_Off;
297
298 procedure Off (Pipe : Pipe_Index)
299 is
300 DDI_Func_Ctl : Word32;
301 begin
302 if Config.Has_EDP_Transcoder then
303 Registers.Read (Registers.PIPE_EDP_DDI_FUNC_CTL, DDI_Func_Ctl);
304 DDI_Func_Ctl := DDI_Func_Ctl and DDI_FUNC_CTL_EDP_SELECT_MASK;
305
306 if (Pipe = Primary and
307 DDI_Func_Ctl = DDI_FUNC_CTL_EDP_SELECT_ALWAYS_ON) or
308 DDI_Func_Ctl = DDI_FUNC_CTL_EDP_SELECT_ONOFF (Pipe)
309 then
310 Trans_Off (Transcoders (Trans_EDP));
311 end if;
312 end if;
313
314 Trans_Off (Transcoders (Default_Transcoder (Pipe)));
315 end Off;
316
317 procedure Clk_Off (Pipe : Pipe_Index)
318 is
319 use type Registers.Registers_Invalid_Index;
320
321 Trans : Transcoder_Regs renames Transcoders (Default_Transcoder (Pipe));
322 begin
323 if Config.Has_Trans_Clk_Sel and then
324 Trans.CLK_SEL /= Registers.Invalid_Register
325 then
326 Registers.Write (Trans.CLK_SEL, TRANS_CLK_SEL_PORT_NONE);
327 end if;
328 end Clk_Off;
329
330end HW.GFX.GMA.Transcoder;