Gitiles
Code Review Sign In
review.sourcearcade.org / libgfxinit / dcd274b28d49570a7fdeace8806af3d17cfd92dd / . / common / hw-gfx-gma-pipe_setup.ads
blob: 42bd85db3fd86690a232931c4a1bd20e91f72c25 [file] [log] [blame]
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]1--
2-- Copyright (C) 2015-2016 secunet Security Networks AG
3--
4-- This program is free software; you can redistribute it and/or modify
5-- it under the terms of the GNU General Public License as published by
Nico Huber125a29e2016-10-18 00:23:54 +0200[diff] [blame]6-- the Free Software Foundation; either version 2 of the License, or
7-- (at your option) any later version.
Nico Huber83693c82016-10-08 22:17:55 +0200[diff] [blame]8--
9-- This program is distributed in the hope that it will be useful,
10-- but WITHOUT ANY WARRANTY; without even the implied warranty of
11-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12-- GNU General Public License for more details.
13--
14
15with HW.GFX.GMA.Registers;
16
17private package HW.GFX.GMA.Pipe_Setup
18is
19
20 type Controller_Kind is (A, B, C);
21 type Controller_Type is private;
22 type Controller_Array is array (Controller_Kind) of Controller_Type;
23
24 type Pipe_Head is (Head_EDP, Head_A, Head_B, Head_C);
25 type Head_Type is private;
26 type Head_Array is array (Pipe_Head) of Head_Type;
27
28 procedure On
29 (Controller : Controller_Type;
30 Head : Head_Type;
31 Port_Cfg : Port_Config;
32 Framebuffer : Framebuffer_Type);
33
34 procedure Off
35 (Controller : Controller_Type;
36 Head : Head_Type);
37
38 procedure All_Off;
39
40 function Get_Pipe_Hint (Head : Head_Type) return Word32;
41
42 procedure Update_Offset
43 (Controller : Controller_Type;
44 Framebuffer : HW.GFX.Framebuffer_Type);
45
46 Controllers : constant Controller_Array;
47
48 Heads : constant Head_Array;
49
50 function Default_Pipe_Head (Kind : Controller_Kind) return Head_Type;
51
52private
53
54 subtype WM_Levels is Natural range 0 .. 7;
55 type PLANE_WM_Type is array (WM_Levels) of Registers.Registers_Index;
56
57 type Controller_Type is
58 record
59 Kind : Controller_Kind;
60 PIPESRC : Registers.Registers_Index;
61 PIPEMISC : Registers.Registers_Index;
62 PF_CTL_1 : Registers.Registers_Index;
63 PF_WIN_POS : Registers.Registers_Index;
64 PF_WIN_SZ : Registers.Registers_Index;
65 DSPCNTR : Registers.Registers_Index;
66 DSPLINOFF : Registers.Registers_Index;
67 DSPSTRIDE : Registers.Registers_Index;
68 DSPSURF : Registers.Registers_Index;
69 DSPTILEOFF : Registers.Registers_Index;
70 SPCNTR : Registers.Registers_Index;
71 TRANS_CLK_SEL : Registers.Registers_Index;
72 -- Skylake registers (partially aliased)
73 PLANE_CTL : Registers.Registers_Index;
74 PLANE_OFFSET : Registers.Registers_Index;
75 PLANE_POS : Registers.Registers_Index;
76 PLANE_SIZE : Registers.Registers_Index;
77 PLANE_STRIDE : Registers.Registers_Index;
78 PLANE_SURF : Registers.Registers_Index;
79 PS_CTRL_1 : Registers.Registers_Index;
80 PS_CTRL_2 : Registers.Registers_Invalid_Index;
81 PS_WIN_SZ_1 : Registers.Registers_Index;
82 PS_WIN_SZ_2 : Registers.Registers_Invalid_Index;
83 WM_LINETIME : Registers.Registers_Index;
84 PLANE_BUF_CFG : Registers.Registers_Index;
85 PLANE_WM : PLANE_WM_Type;
86 end record;
87
88 type Head_Type is
89 record
90 Head : Pipe_Head;
91 HTOTAL : Registers.Registers_Index;
92 HBLANK : Registers.Registers_Index;
93 HSYNC : Registers.Registers_Index;
94 VTOTAL : Registers.Registers_Index;
95 VBLANK : Registers.Registers_Index;
96 VSYNC : Registers.Registers_Index;
97 PIPECONF : Registers.Registers_Index;
98 PIPE_DATA_M1 : Registers.Registers_Index;
99 PIPE_DATA_N1 : Registers.Registers_Index;
100 PIPE_LINK_M1 : Registers.Registers_Index;
101 PIPE_LINK_N1 : Registers.Registers_Index;
102 PIPE_DDI_FUNC_CTL : Registers.Registers_Index;
103 PIPE_MSA_MISC : Registers.Registers_Index;
104 end record;
105
106 Controllers : constant Controller_Array := Controller_Array'
107 (A => Controller_Type'
108 (Kind => A,
109 PIPESRC => Registers.PIPEASRC,
110 PIPEMISC => Registers.PIPEAMISC,
111 PF_CTL_1 => Registers.PFA_CTL_1,
112 PF_WIN_POS => Registers.PFA_WIN_POS,
113 PF_WIN_SZ => Registers.PFA_WIN_SZ,
114 DSPCNTR => Registers.DSPACNTR,
115 DSPLINOFF => Registers.DSPALINOFF,
116 DSPSTRIDE => Registers.DSPASTRIDE,
117 DSPSURF => Registers.DSPASURF,
118 DSPTILEOFF => Registers.DSPATILEOFF,
119 SPCNTR => Registers.SPACNTR,
120 TRANS_CLK_SEL => Registers.TRANSA_CLK_SEL,
121 PLANE_CTL => Registers.DSPACNTR,
122 PLANE_OFFSET => Registers.DSPATILEOFF,
123 PLANE_POS => Registers.PLANE_POS_1_A,
124 PLANE_SIZE => Registers.PLANE_SIZE_1_A,
125 PLANE_STRIDE => Registers.DSPASTRIDE,
126 PLANE_SURF => Registers.DSPASURF,
127 PS_CTRL_1 => Registers.PS_CTRL_1_A,
128 PS_CTRL_2 => Registers.PS_CTRL_2_A,
129 PS_WIN_SZ_1 => Registers.PS_WIN_SZ_1_A,
130 PS_WIN_SZ_2 => Registers.PS_WIN_SZ_2_A,
131 WM_LINETIME => Registers.WM_LINETIME_A,
132 PLANE_BUF_CFG => Registers.PLANE_BUF_CFG_1_A,
133 PLANE_WM => PLANE_WM_Type'(
134 Registers.PLANE_WM_1_A_0,
135 Registers.PLANE_WM_1_A_1,
136 Registers.PLANE_WM_1_A_2,
137 Registers.PLANE_WM_1_A_3,
138 Registers.PLANE_WM_1_A_4,
139 Registers.PLANE_WM_1_A_5,
140 Registers.PLANE_WM_1_A_6,
141 Registers.PLANE_WM_1_A_7)),
142 B => Controller_Type'
143 (Kind => B,
144 PIPESRC => Registers.PIPEBSRC,
145 PIPEMISC => Registers.PIPEBMISC,
146 PF_CTL_1 => Registers.PFB_CTL_1,
147 PF_WIN_POS => Registers.PFB_WIN_POS,
148 PF_WIN_SZ => Registers.PFB_WIN_SZ,
149 DSPCNTR => Registers.DSPBCNTR,
150 DSPLINOFF => Registers.DSPBLINOFF,
151 DSPSTRIDE => Registers.DSPBSTRIDE,
152 DSPSURF => Registers.DSPBSURF,
153 DSPTILEOFF => Registers.DSPBTILEOFF,
154 SPCNTR => Registers.SPBCNTR,
155 TRANS_CLK_SEL => Registers.TRANSB_CLK_SEL,
156 PLANE_CTL => Registers.DSPBCNTR,
157 PLANE_OFFSET => Registers.DSPBTILEOFF,
158 PLANE_POS => Registers.PLANE_POS_1_B,
159 PLANE_SIZE => Registers.PLANE_SIZE_1_B,
160 PLANE_STRIDE => Registers.DSPBSTRIDE,
161 PLANE_SURF => Registers.DSPBSURF,
162 PS_CTRL_1 => Registers.PS_CTRL_1_B,
163 PS_CTRL_2 => Registers.PS_CTRL_2_B,
164 PS_WIN_SZ_1 => Registers.PS_WIN_SZ_1_B,
165 PS_WIN_SZ_2 => Registers.PS_WIN_SZ_2_B,
166 WM_LINETIME => Registers.WM_LINETIME_B,
167 PLANE_BUF_CFG => Registers.PLANE_BUF_CFG_1_B,
168 PLANE_WM => PLANE_WM_Type'(
169 Registers.PLANE_WM_1_B_0,
170 Registers.PLANE_WM_1_B_1,
171 Registers.PLANE_WM_1_B_2,
172 Registers.PLANE_WM_1_B_3,
173 Registers.PLANE_WM_1_B_4,
174 Registers.PLANE_WM_1_B_5,
175 Registers.PLANE_WM_1_B_6,
176 Registers.PLANE_WM_1_B_7)),
177 C => Controller_Type'
178 (Kind => C,
179 PIPESRC => Registers.PIPECSRC,
180 PIPEMISC => Registers.PIPECMISC,
181 PF_CTL_1 => Registers.PFC_CTL_1,
182 PF_WIN_POS => Registers.PFC_WIN_POS,
183 PF_WIN_SZ => Registers.PFC_WIN_SZ,
184 DSPCNTR => Registers.DSPCCNTR,
185 DSPLINOFF => Registers.DSPCLINOFF,
186 DSPSTRIDE => Registers.DSPCSTRIDE,
187 DSPSURF => Registers.DSPCSURF,
188 DSPTILEOFF => Registers.DSPCTILEOFF,
189 SPCNTR => Registers.SPCCNTR,
190 TRANS_CLK_SEL => Registers.TRANSC_CLK_SEL,
191 PLANE_CTL => Registers.DSPCCNTR,
192 PLANE_OFFSET => Registers.DSPCTILEOFF,
193 PLANE_POS => Registers.PLANE_POS_1_C,
194 PLANE_SIZE => Registers.PLANE_SIZE_1_C,
195 PLANE_STRIDE => Registers.DSPCSTRIDE,
196 PLANE_SURF => Registers.DSPCSURF,
197 PS_CTRL_1 => Registers.PS_CTRL_1_C,
198 PS_CTRL_2 => Registers.Invalid_Register,
199 PS_WIN_SZ_1 => Registers.PS_WIN_SZ_1_C,
200 PS_WIN_SZ_2 => Registers.Invalid_Register,
201 WM_LINETIME => Registers.WM_LINETIME_C,
202 PLANE_BUF_CFG => Registers.PLANE_BUF_CFG_1_C,
203 PLANE_WM => PLANE_WM_Type'(
204 Registers.PLANE_WM_1_C_0,
205 Registers.PLANE_WM_1_C_1,
206 Registers.PLANE_WM_1_C_2,
207 Registers.PLANE_WM_1_C_3,
208 Registers.PLANE_WM_1_C_4,
209 Registers.PLANE_WM_1_C_5,
210 Registers.PLANE_WM_1_C_6,
211 Registers.PLANE_WM_1_C_7)));
212
213 Heads : constant Head_Array := Head_Array'
214 (Head_EDP => Head_Type'
215 (Head => Head_EDP,
216 HTOTAL => Registers.HTOTAL_EDP,
217 HBLANK => Registers.HBLANK_EDP,
218 HSYNC => Registers.HSYNC_EDP,
219 VTOTAL => Registers.VTOTAL_EDP,
220 VBLANK => Registers.VBLANK_EDP,
221 VSYNC => Registers.VSYNC_EDP,
222 PIPECONF => Registers.PIPE_EDP_CONF,
223 PIPE_DATA_M1 => Registers.PIPE_EDP_DATA_M1,
224 PIPE_DATA_N1 => Registers.PIPE_EDP_DATA_N1,
225 PIPE_LINK_M1 => Registers.PIPE_EDP_LINK_M1,
226 PIPE_LINK_N1 => Registers.PIPE_EDP_LINK_N1,
227 PIPE_DDI_FUNC_CTL => Registers.PIPE_EDP_DDI_FUNC_CTL,
228 PIPE_MSA_MISC => Registers.PIPE_EDP_MSA_MISC),
229 Head_A => Head_Type'
230 (Head => Head_A,
231 HTOTAL => Registers.HTOTAL_A,
232 HBLANK => Registers.HBLANK_A,
233 HSYNC => Registers.HSYNC_A,
234 VTOTAL => Registers.VTOTAL_A,
235 VBLANK => Registers.VBLANK_A,
236 VSYNC => Registers.VSYNC_A,
237 PIPECONF => Registers.PIPEACONF,
238 PIPE_DATA_M1 => Registers.PIPEA_DATA_M1,
239 PIPE_DATA_N1 => Registers.PIPEA_DATA_N1,
240 PIPE_LINK_M1 => Registers.PIPEA_LINK_M1,
241 PIPE_LINK_N1 => Registers.PIPEA_LINK_N1,
242 PIPE_DDI_FUNC_CTL => Registers.PIPEA_DDI_FUNC_CTL,
243 PIPE_MSA_MISC => Registers.PIPEA_MSA_MISC),
244 Head_B => Head_Type'
245 (Head => Head_B,
246 HTOTAL => Registers.HTOTAL_B,
247 HBLANK => Registers.HBLANK_B,
248 HSYNC => Registers.HSYNC_B,
249 VTOTAL => Registers.VTOTAL_B,
250 VBLANK => Registers.VBLANK_B,
251 VSYNC => Registers.VSYNC_B,
252 PIPECONF => Registers.PIPEBCONF,
253 PIPE_DATA_M1 => Registers.PIPEB_DATA_M1,
254 PIPE_DATA_N1 => Registers.PIPEB_DATA_N1,
255 PIPE_LINK_M1 => Registers.PIPEB_LINK_M1,
256 PIPE_LINK_N1 => Registers.PIPEB_LINK_N1,
257 PIPE_DDI_FUNC_CTL => Registers.PIPEB_DDI_FUNC_CTL,
258 PIPE_MSA_MISC => Registers.PIPEB_MSA_MISC),
259 Head_C => Head_Type'
260 (Head => Head_C,
261 HTOTAL => Registers.HTOTAL_C,
262 HBLANK => Registers.HBLANK_C,
263 HSYNC => Registers.HSYNC_C,
264 VTOTAL => Registers.VTOTAL_C,
265 VBLANK => Registers.VBLANK_C,
266 VSYNC => Registers.VSYNC_C,
267 PIPECONF => Registers.PIPECCONF,
268 PIPE_DATA_M1 => Registers.PIPEC_DATA_M1,
269 PIPE_DATA_N1 => Registers.PIPEC_DATA_N1,
270 PIPE_LINK_M1 => Registers.PIPEC_LINK_M1,
271 PIPE_LINK_N1 => Registers.PIPEC_LINK_N1,
272 PIPE_DDI_FUNC_CTL => Registers.PIPEC_DDI_FUNC_CTL,
273 PIPE_MSA_MISC => Registers.PIPEC_MSA_MISC));
274
275end HW.GFX.GMA.Pipe_Setup;