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Joseph C. Lehnerc2644a32016-01-16 23:45:25 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2015 Joseph C. Lehner <joseph.c.lehner@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +000015 */
16
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +000017#include <string.h>
18#include <stdlib.h>
19#include "flash.h"
20#include "programmer.h"
21#include "hwaccess.h"
22
23#define MAX_ROM_DECODE (32 * 1024)
24#define ADDR_MASK (MAX_ROM_DECODE - 1)
25
26/*
27 * In the absence of any public docs on the PDC2026x family, this programmer was created through a mix of
28 * reverse-engineering and trial and error.
29 *
30 * The only device tested is an Ultra100 controller, but the logic for programming the other 2026x controllers
31 * is the same, so it should, in theory, work for those as well.
32 *
33 * While the tested Ultra100 controller used a 128 kB MX29F001T chip, A16 and A15 showed continuity to ground,
34 * thus limiting the the programmer on this card to 32 kB. Without other controllers to test this programmer on,
35 * this is currently a hard limit. Note that ROM files for these controllers are 16 kB only.
36 *
37 * Since flashrom does not support accessing flash chips larger than the size limit of the programmer (the
38 * tested Ultra100 uses a 128 kB MX29F001T chip), the chip size is hackishly adjusted in atapromise_limit_chip.
39 */
40
41static uint32_t io_base_addr = 0;
42static uint32_t rom_base_addr = 0;
43
44static uint8_t *atapromise_bar = NULL;
45static size_t rom_size = 0;
46
Thomas Heijligencc853d82021-05-04 15:32:17 +020047static const struct dev_entry ata_promise[] = {
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +000048 {0x105a, 0x4d38, NT, "Promise", "PDC20262 (FastTrak66/Ultra66)"},
49 {0x105a, 0x0d30, NT, "Promise", "PDC20265 (FastTrak100 Lite/Ultra100)"},
50 {0x105a, 0x4d30, OK, "Promise", "PDC20267 (FastTrak100/Ultra100)"},
51 {0},
52};
53
54static void atapromise_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
55static uint8_t atapromise_chip_readb(const struct flashctx *flash, const chipaddr addr);
56
57static const struct par_master par_master_atapromise = {
Thomas Heijligen43040f22022-06-23 14:38:35 +020058 .chip_readb = atapromise_chip_readb,
59 .chip_readw = fallback_chip_readw,
60 .chip_readl = fallback_chip_readl,
61 .chip_readn = fallback_chip_readn,
62 .chip_writeb = atapromise_chip_writeb,
63 .chip_writew = fallback_chip_writew,
64 .chip_writel = fallback_chip_writel,
65 .chip_writen = fallback_chip_writen,
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +000066};
67
Thomas Heijligencc853d82021-05-04 15:32:17 +020068static void *atapromise_map(const char *descr, uintptr_t phys_addr, size_t len)
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +000069{
70 /* In case fallback_map ever returns something other than NULL. */
71 return NULL;
72}
73
74static void atapromise_limit_chip(struct flashchip *chip)
75{
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +000076 unsigned int i, size;
Carl-Daniel Hailfinger1c2d23a2016-02-18 23:11:52 +000077 unsigned int usable_erasers = 0;
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +000078
79 size = chip->total_size * 1024;
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +000080
Carl-Daniel Hailfinger1c2d23a2016-02-18 23:11:52 +000081 /* Chip is small enough or already limited. */
82 if (size <= rom_size)
83 return;
84
85 /* Undefine all block_erasers that don't operate on the whole chip,
86 * and adjust the eraseblock size of those which do.
87 */
88 for (i = 0; i < NUM_ERASEFUNCTIONS; ++i) {
89 if (chip->block_erasers[i].eraseblocks[0].size != size) {
90 chip->block_erasers[i].eraseblocks[0].count = 0;
91 chip->block_erasers[i].block_erase = NULL;
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +000092 } else {
Carl-Daniel Hailfinger1c2d23a2016-02-18 23:11:52 +000093 chip->block_erasers[i].eraseblocks[0].size = rom_size;
94 usable_erasers++;
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +000095 }
96 }
97
Carl-Daniel Hailfinger1c2d23a2016-02-18 23:11:52 +000098 if (usable_erasers) {
99 chip->total_size = rom_size / 1024;
100 if (chip->page_size > rom_size)
101 chip->page_size = rom_size;
102 } else {
103 msg_pdbg("Failed to adjust size of chip \"%s\" (%d kB).\n", chip->name, chip->total_size);
104 }
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +0000105}
106
Thomas Heijligencc853d82021-05-04 15:32:17 +0200107static int atapromise_init(void)
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +0000108{
109 struct pci_dev *dev = NULL;
110
111 if (rget_io_perms())
112 return 1;
113
114 dev = pcidev_init(ata_promise, PCI_BASE_ADDRESS_4);
115 if (!dev)
116 return 1;
117
118 io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_4) & 0xfffe;
119 if (!io_base_addr) {
120 return 1;
121 }
122
123 /* Not exactly sure what this does, because flashing seems to work
124 * well without it. However, PTIFLASH does it, so we do it too.
125 */
126 OUTB(1, io_base_addr + 0x10);
127
128 rom_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_5);
129 if (!rom_base_addr) {
130 msg_pdbg("Failed to read BAR5\n");
131 return 1;
132 }
133
134 rom_size = dev->rom_size > MAX_ROM_DECODE ? MAX_ROM_DECODE : dev->rom_size;
135 atapromise_bar = (uint8_t*)rphysmap("Promise", rom_base_addr, rom_size);
136 if (atapromise_bar == ERROR_PTR) {
137 return 1;
138 }
139
140 max_rom_decode.parallel = rom_size;
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +0000141
142 msg_pwarn("Do not use this device as a generic programmer. It will leave anything outside\n"
143 "the first %zu kB of the flash chip in an undefined state. It works fine for the\n"
Elyes HAOUASe2c90c42018-08-18 09:04:41 +0200144 "purpose of updating the firmware of this device (padding may necessary).\n",
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +0000145 rom_size / 1024);
146
Anastasia Klimchukc1f2a472021-08-27 15:47:46 +1000147 return register_par_master(&par_master_atapromise, BUS_PARALLEL, NULL);
Joseph C. Lehnerc2644a32016-01-16 23:45:25 +0000148}
149
150static void atapromise_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr)
151{
152 uint32_t data;
153
154 atapromise_limit_chip(flash->chip);
155 data = (rom_base_addr + (addr & ADDR_MASK)) << 8 | val;
156 OUTL(data, io_base_addr + 0x14);
157}
158
159static uint8_t atapromise_chip_readb(const struct flashctx *flash, const chipaddr addr)
160{
161 atapromise_limit_chip(flash->chip);
162 return pci_mmio_readb(atapromise_bar + (addr & ADDR_MASK));
163}
164
Thomas Heijligencc853d82021-05-04 15:32:17 +0200165const struct programmer_entry programmer_atapromise = {
166 .name = "atapromise",
167 .type = PCI,
168 .devs.dev = ata_promise,
169 .init = atapromise_init,
170 .map_flash_region = atapromise_map,
171 .unmap_flash_region = fallback_unmap,
172 .delay = internal_delay,
173};