Joseph C. Lehner | c2644a3 | 2016-01-16 23:45:25 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the flashrom project. |
| 3 | * |
| 4 | * Copyright (C) 2015 Joseph C. Lehner <joseph.c.lehner@gmail.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Joseph C. Lehner | c2644a3 | 2016-01-16 23:45:25 +0000 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | #if defined(__i386__) || defined(__x86_64__) |
| 18 | |
| 19 | #include <string.h> |
| 20 | #include <stdlib.h> |
| 21 | #include "flash.h" |
| 22 | #include "programmer.h" |
| 23 | #include "hwaccess.h" |
| 24 | |
| 25 | #define MAX_ROM_DECODE (32 * 1024) |
| 26 | #define ADDR_MASK (MAX_ROM_DECODE - 1) |
| 27 | |
| 28 | /* |
| 29 | * In the absence of any public docs on the PDC2026x family, this programmer was created through a mix of |
| 30 | * reverse-engineering and trial and error. |
| 31 | * |
| 32 | * The only device tested is an Ultra100 controller, but the logic for programming the other 2026x controllers |
| 33 | * is the same, so it should, in theory, work for those as well. |
| 34 | * |
| 35 | * While the tested Ultra100 controller used a 128 kB MX29F001T chip, A16 and A15 showed continuity to ground, |
| 36 | * thus limiting the the programmer on this card to 32 kB. Without other controllers to test this programmer on, |
| 37 | * this is currently a hard limit. Note that ROM files for these controllers are 16 kB only. |
| 38 | * |
| 39 | * Since flashrom does not support accessing flash chips larger than the size limit of the programmer (the |
| 40 | * tested Ultra100 uses a 128 kB MX29F001T chip), the chip size is hackishly adjusted in atapromise_limit_chip. |
| 41 | */ |
| 42 | |
| 43 | static uint32_t io_base_addr = 0; |
| 44 | static uint32_t rom_base_addr = 0; |
| 45 | |
| 46 | static uint8_t *atapromise_bar = NULL; |
| 47 | static size_t rom_size = 0; |
| 48 | |
Thomas Heijligen | cc853d8 | 2021-05-04 15:32:17 +0200 | [diff] [blame] | 49 | static const struct dev_entry ata_promise[] = { |
Joseph C. Lehner | c2644a3 | 2016-01-16 23:45:25 +0000 | [diff] [blame] | 50 | {0x105a, 0x4d38, NT, "Promise", "PDC20262 (FastTrak66/Ultra66)"}, |
| 51 | {0x105a, 0x0d30, NT, "Promise", "PDC20265 (FastTrak100 Lite/Ultra100)"}, |
| 52 | {0x105a, 0x4d30, OK, "Promise", "PDC20267 (FastTrak100/Ultra100)"}, |
| 53 | {0}, |
| 54 | }; |
| 55 | |
| 56 | static void atapromise_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr); |
| 57 | static uint8_t atapromise_chip_readb(const struct flashctx *flash, const chipaddr addr); |
| 58 | |
| 59 | static const struct par_master par_master_atapromise = { |
Thomas Heijligen | 43040f2 | 2022-06-23 14:38:35 +0200 | [diff] [blame] | 60 | .chip_readb = atapromise_chip_readb, |
| 61 | .chip_readw = fallback_chip_readw, |
| 62 | .chip_readl = fallback_chip_readl, |
| 63 | .chip_readn = fallback_chip_readn, |
| 64 | .chip_writeb = atapromise_chip_writeb, |
| 65 | .chip_writew = fallback_chip_writew, |
| 66 | .chip_writel = fallback_chip_writel, |
| 67 | .chip_writen = fallback_chip_writen, |
Joseph C. Lehner | c2644a3 | 2016-01-16 23:45:25 +0000 | [diff] [blame] | 68 | }; |
| 69 | |
Thomas Heijligen | cc853d8 | 2021-05-04 15:32:17 +0200 | [diff] [blame] | 70 | static void *atapromise_map(const char *descr, uintptr_t phys_addr, size_t len) |
Joseph C. Lehner | c2644a3 | 2016-01-16 23:45:25 +0000 | [diff] [blame] | 71 | { |
| 72 | /* In case fallback_map ever returns something other than NULL. */ |
| 73 | return NULL; |
| 74 | } |
| 75 | |
| 76 | static void atapromise_limit_chip(struct flashchip *chip) |
| 77 | { |
Joseph C. Lehner | c2644a3 | 2016-01-16 23:45:25 +0000 | [diff] [blame] | 78 | unsigned int i, size; |
Carl-Daniel Hailfinger | 1c2d23a | 2016-02-18 23:11:52 +0000 | [diff] [blame] | 79 | unsigned int usable_erasers = 0; |
Joseph C. Lehner | c2644a3 | 2016-01-16 23:45:25 +0000 | [diff] [blame] | 80 | |
| 81 | size = chip->total_size * 1024; |
Joseph C. Lehner | c2644a3 | 2016-01-16 23:45:25 +0000 | [diff] [blame] | 82 | |
Carl-Daniel Hailfinger | 1c2d23a | 2016-02-18 23:11:52 +0000 | [diff] [blame] | 83 | /* Chip is small enough or already limited. */ |
| 84 | if (size <= rom_size) |
| 85 | return; |
| 86 | |
| 87 | /* Undefine all block_erasers that don't operate on the whole chip, |
| 88 | * and adjust the eraseblock size of those which do. |
| 89 | */ |
| 90 | for (i = 0; i < NUM_ERASEFUNCTIONS; ++i) { |
| 91 | if (chip->block_erasers[i].eraseblocks[0].size != size) { |
| 92 | chip->block_erasers[i].eraseblocks[0].count = 0; |
| 93 | chip->block_erasers[i].block_erase = NULL; |
Joseph C. Lehner | c2644a3 | 2016-01-16 23:45:25 +0000 | [diff] [blame] | 94 | } else { |
Carl-Daniel Hailfinger | 1c2d23a | 2016-02-18 23:11:52 +0000 | [diff] [blame] | 95 | chip->block_erasers[i].eraseblocks[0].size = rom_size; |
| 96 | usable_erasers++; |
Joseph C. Lehner | c2644a3 | 2016-01-16 23:45:25 +0000 | [diff] [blame] | 97 | } |
| 98 | } |
| 99 | |
Carl-Daniel Hailfinger | 1c2d23a | 2016-02-18 23:11:52 +0000 | [diff] [blame] | 100 | if (usable_erasers) { |
| 101 | chip->total_size = rom_size / 1024; |
| 102 | if (chip->page_size > rom_size) |
| 103 | chip->page_size = rom_size; |
| 104 | } else { |
| 105 | msg_pdbg("Failed to adjust size of chip \"%s\" (%d kB).\n", chip->name, chip->total_size); |
| 106 | } |
Joseph C. Lehner | c2644a3 | 2016-01-16 23:45:25 +0000 | [diff] [blame] | 107 | } |
| 108 | |
Thomas Heijligen | cc853d8 | 2021-05-04 15:32:17 +0200 | [diff] [blame] | 109 | static int atapromise_init(void) |
Joseph C. Lehner | c2644a3 | 2016-01-16 23:45:25 +0000 | [diff] [blame] | 110 | { |
| 111 | struct pci_dev *dev = NULL; |
| 112 | |
| 113 | if (rget_io_perms()) |
| 114 | return 1; |
| 115 | |
| 116 | dev = pcidev_init(ata_promise, PCI_BASE_ADDRESS_4); |
| 117 | if (!dev) |
| 118 | return 1; |
| 119 | |
| 120 | io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_4) & 0xfffe; |
| 121 | if (!io_base_addr) { |
| 122 | return 1; |
| 123 | } |
| 124 | |
| 125 | /* Not exactly sure what this does, because flashing seems to work |
| 126 | * well without it. However, PTIFLASH does it, so we do it too. |
| 127 | */ |
| 128 | OUTB(1, io_base_addr + 0x10); |
| 129 | |
| 130 | rom_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_5); |
| 131 | if (!rom_base_addr) { |
| 132 | msg_pdbg("Failed to read BAR5\n"); |
| 133 | return 1; |
| 134 | } |
| 135 | |
| 136 | rom_size = dev->rom_size > MAX_ROM_DECODE ? MAX_ROM_DECODE : dev->rom_size; |
| 137 | atapromise_bar = (uint8_t*)rphysmap("Promise", rom_base_addr, rom_size); |
| 138 | if (atapromise_bar == ERROR_PTR) { |
| 139 | return 1; |
| 140 | } |
| 141 | |
| 142 | max_rom_decode.parallel = rom_size; |
Joseph C. Lehner | c2644a3 | 2016-01-16 23:45:25 +0000 | [diff] [blame] | 143 | |
| 144 | msg_pwarn("Do not use this device as a generic programmer. It will leave anything outside\n" |
| 145 | "the first %zu kB of the flash chip in an undefined state. It works fine for the\n" |
Elyes HAOUAS | e2c90c4 | 2018-08-18 09:04:41 +0200 | [diff] [blame] | 146 | "purpose of updating the firmware of this device (padding may necessary).\n", |
Joseph C. Lehner | c2644a3 | 2016-01-16 23:45:25 +0000 | [diff] [blame] | 147 | rom_size / 1024); |
| 148 | |
Anastasia Klimchuk | c1f2a47 | 2021-08-27 15:47:46 +1000 | [diff] [blame^] | 149 | return register_par_master(&par_master_atapromise, BUS_PARALLEL, NULL); |
Joseph C. Lehner | c2644a3 | 2016-01-16 23:45:25 +0000 | [diff] [blame] | 150 | } |
| 151 | |
| 152 | static void atapromise_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr) |
| 153 | { |
| 154 | uint32_t data; |
| 155 | |
| 156 | atapromise_limit_chip(flash->chip); |
| 157 | data = (rom_base_addr + (addr & ADDR_MASK)) << 8 | val; |
| 158 | OUTL(data, io_base_addr + 0x14); |
| 159 | } |
| 160 | |
| 161 | static uint8_t atapromise_chip_readb(const struct flashctx *flash, const chipaddr addr) |
| 162 | { |
| 163 | atapromise_limit_chip(flash->chip); |
| 164 | return pci_mmio_readb(atapromise_bar + (addr & ADDR_MASK)); |
| 165 | } |
| 166 | |
Thomas Heijligen | cc853d8 | 2021-05-04 15:32:17 +0200 | [diff] [blame] | 167 | const struct programmer_entry programmer_atapromise = { |
| 168 | .name = "atapromise", |
| 169 | .type = PCI, |
| 170 | .devs.dev = ata_promise, |
| 171 | .init = atapromise_init, |
| 172 | .map_flash_region = atapromise_map, |
| 173 | .unmap_flash_region = fallback_unmap, |
| 174 | .delay = internal_delay, |
| 175 | }; |
| 176 | |
Joseph C. Lehner | c2644a3 | 2016-01-16 23:45:25 +0000 | [diff] [blame] | 177 | #else |
| 178 | #error PCI port I/O access is not supported on this architecture yet. |
| 179 | #endif |