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Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00003 *
Uwe Hermannd22a1d42007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2005 coresystems GmbH <stepan@openbios.org>
Sean Nelson51c83fb2010-01-20 20:55:53 +00006 * Copyright (C) 2009 Sean Nelson <audiohacked@gmail.com>
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00007 *
Uwe Hermannd1107642007-08-29 17:52:32 +00008 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000012 *
Uwe Hermannd1107642007-08-29 17:52:32 +000013 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000017 *
Uwe Hermannd1107642007-08-29 17:52:32 +000018 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000021 */
22
23#include "flash.h"
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000024
25#define AUTO_PG_ERASE1 0x20
26#define AUTO_PG_ERASE2 0xD0
Ollie Lhocf29de82004-03-18 19:40:07 +000027#define AUTO_PGRM 0x10
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000028#define CHIP_ERASE 0x30
29#define RESET 0xFF
30#define READ_ID 0x90
31
Uwe Hermann09e04f72009-05-16 22:36:00 +000032static void protect_28sf040(chipaddr bios)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000033{
Stefan Reinauer9e72aa52009-09-16 08:18:08 +000034 chip_readb(bios + 0x1823);
35 chip_readb(bios + 0x1820);
36 chip_readb(bios + 0x1822);
37 chip_readb(bios + 0x0418);
38 chip_readb(bios + 0x041B);
39 chip_readb(bios + 0x0419);
40 chip_readb(bios + 0x040A);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000041}
42
Uwe Hermann09e04f72009-05-16 22:36:00 +000043static void unprotect_28sf040(chipaddr bios)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000044{
Stefan Reinauer9e72aa52009-09-16 08:18:08 +000045 chip_readb(bios + 0x1823);
46 chip_readb(bios + 0x1820);
47 chip_readb(bios + 0x1822);
48 chip_readb(bios + 0x0418);
49 chip_readb(bios + 0x041B);
50 chip_readb(bios + 0x0419);
51 chip_readb(bios + 0x041A);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000052}
53
Sean Nelson51c83fb2010-01-20 20:55:53 +000054int erase_sector_28sf040(struct flashchip *flash, unsigned int address, unsigned int sector_size)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000055{
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +000056 chipaddr bios = flash->virtual_memory;
57
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000058 chip_writeb(AUTO_PG_ERASE1, bios);
59 chip_writeb(AUTO_PG_ERASE2, bios + address);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000060
61 /* wait for Toggle bit ready */
62 toggle_ready_jedec(bios);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000063
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +000064 if (check_erased_range(flash, address, sector_size)) {
65 fprintf(stderr, "ERASE FAILED!\n");
66 return -1;
67 }
Uwe Hermannffec5f32007-08-23 16:08:21 +000068 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000069}
70
Sean Nelson51c83fb2010-01-20 20:55:53 +000071int write_sector_28sf040(chipaddr bios, uint8_t *src, chipaddr dst,
Uwe Hermann09e04f72009-05-16 22:36:00 +000072 unsigned int page_size)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000073{
74 int i;
75
76 for (i = 0; i < page_size; i++) {
77 /* transfer data from source to destination */
78 if (*src == 0xFF) {
79 dst++, src++;
80 /* If the data is 0xFF, don't program it */
81 continue;
82 }
83 /*issue AUTO PROGRAM command */
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000084 chip_writeb(AUTO_PGRM, dst);
85 chip_writeb(*src++, dst++);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000086
87 /* wait for Toggle bit ready */
88 toggle_ready_jedec(bios);
89 }
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000090
Uwe Hermannffec5f32007-08-23 16:08:21 +000091 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000092}
93
Ollie Lho761bf1b2004-03-20 16:46:10 +000094int probe_28sf040(struct flashchip *flash)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000095{
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000096 chipaddr bios = flash->virtual_memory;
Ed Swierk966dc202007-08-13 04:10:32 +000097 uint8_t id1, id2;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000098
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000099 chip_writeb(RESET, bios);
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +0000100 programmer_delay(10);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000101
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000102 chip_writeb(READ_ID, bios);
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +0000103 programmer_delay(10);
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000104 id1 = chip_readb(bios);
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +0000105 programmer_delay(10);
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000106 id2 = chip_readb(bios + 0x01);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000107
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000108 chip_writeb(RESET, bios);
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +0000109 programmer_delay(10);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000110
Uwe Hermann04aa59a2009-09-02 22:09:00 +0000111 printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000112 if (id1 == flash->manufacture_id && id2 == flash->model_id)
113 return 1;
114
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000115 return 0;
116}
117
Ollie Lho761bf1b2004-03-20 16:46:10 +0000118int erase_28sf040(struct flashchip *flash)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000119{
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000120 chipaddr bios = flash->virtual_memory;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000121
Ollie Lho761bf1b2004-03-20 16:46:10 +0000122 unprotect_28sf040(bios);
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000123 chip_writeb(CHIP_ERASE, bios);
124 chip_writeb(CHIP_ERASE, bios);
Ollie Lho761bf1b2004-03-20 16:46:10 +0000125 protect_28sf040(bios);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000126
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +0000127 programmer_delay(10);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000128 toggle_ready_jedec(bios);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000129
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +0000130 if (check_erased_range(flash, 0, flash->total_size * 1024)) {
131 fprintf(stderr, "ERASE FAILED!\n");
132 return -1;
133 }
Uwe Hermannffec5f32007-08-23 16:08:21 +0000134 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000135}
136
Ollie Lho184a4042005-11-26 21:55:36 +0000137int write_28sf040(struct flashchip *flash, uint8_t *buf)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000138{
139 int i;
Uwe Hermanna7e05482007-05-09 10:17:44 +0000140 int total_size = flash->total_size * 1024;
141 int page_size = flash->page_size;
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000142 chipaddr bios = flash->virtual_memory;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000143
Ollie Lho761bf1b2004-03-20 16:46:10 +0000144 unprotect_28sf040(bios);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000145
Uwe Hermanna502dce2007-10-17 23:55:15 +0000146 printf("Programming page: ");
Ollie Lho761bf1b2004-03-20 16:46:10 +0000147 for (i = 0; i < total_size / page_size; i++) {
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000148 /* erase the page before programming */
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +0000149 if (erase_sector_28sf040(flash, i * page_size, page_size)) {
150 fprintf(stderr, "ERASE FAILED!\n");
151 return -1;
152 }
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000153
154 /* write to the sector */
Ollie Lho761bf1b2004-03-20 16:46:10 +0000155 printf("%04d at address: 0x%08x", i, i * page_size);
156 write_sector_28sf040(bios, buf + i * page_size,
157 bios + i * page_size, page_size);
Ollie Lho8b8897a2004-03-27 00:18:15 +0000158 printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000159 }
160 printf("\n");
161
Ollie Lho761bf1b2004-03-20 16:46:10 +0000162 protect_28sf040(bios);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000163
Uwe Hermannffec5f32007-08-23 16:08:21 +0000164 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000165}
Sean Nelson51c83fb2010-01-20 20:55:53 +0000166
167int erase_chip_28sf040(struct flashchip *flash, unsigned int addr, unsigned int blocklen)
168{
169 if ((addr != 0) || (blocklen != flash->total_size * 1024)) {
170 fprintf(stderr, "%s called with incorrect arguments\n",
171 __func__);
172 return -1;
173 }
174 return erase_28sf040(flash);
175}