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Peter Stugebf196e92009-01-26 03:08:45 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2008 Peter Stuge <peter@stuge.se>
Carl-Daniel Hailfinger5609fa72010-01-07 03:32:17 +00005 * Copyright (C) 2009,2010 Carl-Daniel Hailfinger
Peter Stugebf196e92009-01-26 03:08:45 +00006 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
Carl-Daniel Hailfingercceafa22010-05-26 01:45:41 +000021#if defined(__i386__) || defined(__x86_64__)
22
Peter Stugebf196e92009-01-26 03:08:45 +000023#include <string.h>
24#include "flash.h"
Sean Nelson14ba6682010-02-26 05:48:29 +000025#include "chipdrivers.h"
Peter Stugebf196e92009-01-26 03:08:45 +000026#include "spi.h"
27
28#define WBSIO_PORT1 0x2e
29#define WBSIO_PORT2 0x4e
30
31static uint16_t wbsio_spibase = 0;
32
Uwe Hermann7b2969b2009-04-15 10:52:49 +000033static uint16_t wbsio_get_spibase(uint16_t port)
34{
Peter Stugebf196e92009-01-26 03:08:45 +000035 uint8_t id;
36 uint16_t flashport = 0;
37
38 w836xx_ext_enter(port);
Carl-Daniel Hailfinger24c1a162009-05-25 23:26:50 +000039 id = sio_read(port, 0x20);
Uwe Hermann7b2969b2009-04-15 10:52:49 +000040 if (id != 0xa0) {
Sean Nelsonf7f7a552010-01-09 23:34:45 +000041 msg_perr("\nW83627 not found at 0x%x, id=0x%02x want=0xa0.\n", port, id);
Peter Stugebf196e92009-01-26 03:08:45 +000042 goto done;
43 }
44
Carl-Daniel Hailfinger24c1a162009-05-25 23:26:50 +000045 if (0 == (sio_read(port, 0x24) & 2)) {
Sean Nelsonf7f7a552010-01-09 23:34:45 +000046 msg_perr("\nW83627 found at 0x%x, but SPI pins are not enabled. (CR[0x24] bit 1=0)\n", port);
Peter Stugebf196e92009-01-26 03:08:45 +000047 goto done;
48 }
49
Carl-Daniel Hailfinger24c1a162009-05-25 23:26:50 +000050 sio_write(port, 0x07, 0x06);
51 if (0 == (sio_read(port, 0x30) & 1)) {
Sean Nelsonf7f7a552010-01-09 23:34:45 +000052 msg_perr("\nW83627 found at 0x%x, but SPI is not enabled. (LDN6[0x30] bit 0=0)\n", port);
Peter Stugebf196e92009-01-26 03:08:45 +000053 goto done;
54 }
55
Carl-Daniel Hailfinger24c1a162009-05-25 23:26:50 +000056 flashport = (sio_read(port, 0x62) << 8) | sio_read(port, 0x63);
Peter Stugebf196e92009-01-26 03:08:45 +000057
58done:
59 w836xx_ext_leave(port);
60 return flashport;
61}
62
Uwe Hermann7b2969b2009-04-15 10:52:49 +000063int wbsio_check_for_spi(const char *name)
64{
Peter Stugebf196e92009-01-26 03:08:45 +000065 if (0 == (wbsio_spibase = wbsio_get_spibase(WBSIO_PORT1)))
66 if (0 == (wbsio_spibase = wbsio_get_spibase(WBSIO_PORT2)))
67 return 1;
68
Sean Nelsonf7f7a552010-01-09 23:34:45 +000069 msg_pspew("\nwbsio_spibase = 0x%x\n", wbsio_spibase);
Carl-Daniel Hailfingerb22918c2009-06-01 02:08:58 +000070
71 buses_supported |= CHIP_BUSTYPE_SPI;
Carl-Daniel Hailfinger1dfe0ff2009-05-31 17:57:34 +000072 spi_controller = SPI_CONTROLLER_WBSIO;
Carl-Daniel Hailfingerb22918c2009-06-01 02:08:58 +000073
Peter Stugebf196e92009-01-26 03:08:45 +000074 return 0;
75}
76
77/* W83627DHG has 11 command modes:
78 * 1=1 command only
79 * 2=1 command+1 data write
80 * 3=1 command+2 data read
81 * 4=1 command+3 address
82 * 5=1 command+3 address+1 data write
83 * 6=1 command+3 address+4 data write
84 * 7=1 command+3 address+1 dummy address inserted by wbsio+4 data read
85 * 8=1 command+3 address+1 data read
86 * 9=1 command+3 address+2 data read
87 * a=1 command+3 address+3 data read
88 * b=1 command+3 address+4 data read
89 *
90 * mode[7:4] holds the command mode
91 * mode[3:0] holds SPI address bits [19:16]
92 *
93 * The Winbond SPI master only supports 20 bit addresses on the SPI bus. :\
94 * Would one more byte of RAM in the chip (to get all 24 bits) really make
95 * such a big difference?
96 */
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +000097int wbsio_spi_send_command(unsigned int writecnt, unsigned int readcnt,
Uwe Hermann7b2969b2009-04-15 10:52:49 +000098 const unsigned char *writearr, unsigned char *readarr)
99{
Peter Stugebf196e92009-01-26 03:08:45 +0000100 int i;
101 uint8_t mode = 0;
102
Sean Nelsonf7f7a552010-01-09 23:34:45 +0000103 msg_pspew("%s:", __func__);
Peter Stugebf196e92009-01-26 03:08:45 +0000104
105 if (1 == writecnt && 0 == readcnt) {
106 mode = 0x10;
107 } else if (2 == writecnt && 0 == readcnt) {
108 OUTB(writearr[1], wbsio_spibase + 4);
Sean Nelsonf7f7a552010-01-09 23:34:45 +0000109 msg_pspew(" data=0x%02x", writearr[1]);
Peter Stugebf196e92009-01-26 03:08:45 +0000110 mode = 0x20;
111 } else if (1 == writecnt && 2 == readcnt) {
112 mode = 0x30;
113 } else if (4 == writecnt && 0 == readcnt) {
Sean Nelsonf7f7a552010-01-09 23:34:45 +0000114 msg_pspew(" addr=0x%02x", (writearr[1] & 0x0f));
Peter Stugebf196e92009-01-26 03:08:45 +0000115 for (i = 2; i < writecnt; i++) {
116 OUTB(writearr[i], wbsio_spibase + i);
Sean Nelsonf7f7a552010-01-09 23:34:45 +0000117 msg_pspew("%02x", writearr[i]);
Peter Stugebf196e92009-01-26 03:08:45 +0000118 }
119 mode = 0x40 | (writearr[1] & 0x0f);
120 } else if (5 == writecnt && 0 == readcnt) {
Sean Nelsonf7f7a552010-01-09 23:34:45 +0000121 msg_pspew(" addr=0x%02x", (writearr[1] & 0x0f));
Peter Stugebf196e92009-01-26 03:08:45 +0000122 for (i = 2; i < 4; i++) {
123 OUTB(writearr[i], wbsio_spibase + i);
Sean Nelsonf7f7a552010-01-09 23:34:45 +0000124 msg_pspew("%02x", writearr[i]);
Peter Stugebf196e92009-01-26 03:08:45 +0000125 }
126 OUTB(writearr[i], wbsio_spibase + i);
Sean Nelsonf7f7a552010-01-09 23:34:45 +0000127 msg_pspew(" data=0x%02x", writearr[i]);
Peter Stugebf196e92009-01-26 03:08:45 +0000128 mode = 0x50 | (writearr[1] & 0x0f);
129 } else if (8 == writecnt && 0 == readcnt) {
Sean Nelsonf7f7a552010-01-09 23:34:45 +0000130 msg_pspew(" addr=0x%02x", (writearr[1] & 0x0f));
Peter Stugebf196e92009-01-26 03:08:45 +0000131 for (i = 2; i < 4; i++) {
132 OUTB(writearr[i], wbsio_spibase + i);
Sean Nelsonf7f7a552010-01-09 23:34:45 +0000133 msg_pspew("%02x", writearr[i]);
Peter Stugebf196e92009-01-26 03:08:45 +0000134 }
Sean Nelsonf7f7a552010-01-09 23:34:45 +0000135 msg_pspew(" data=0x");
Peter Stugebf196e92009-01-26 03:08:45 +0000136 for (; i < writecnt; i++) {
137 OUTB(writearr[i], wbsio_spibase + i);
Sean Nelsonf7f7a552010-01-09 23:34:45 +0000138 msg_pspew("%02x", writearr[i]);
Peter Stugebf196e92009-01-26 03:08:45 +0000139 }
140 mode = 0x60 | (writearr[1] & 0x0f);
141 } else if (5 == writecnt && 4 == readcnt) {
142 /* XXX: TODO not supported by flashrom infrastructure!
143 * This mode, 7, discards the fifth byte in writecnt,
144 * but since we can not express that in flashrom, fail
145 * the operation for now.
146 */
147 ;
148 } else if (4 == writecnt && readcnt >= 1 && readcnt <= 4) {
Sean Nelsonf7f7a552010-01-09 23:34:45 +0000149 msg_pspew(" addr=0x%02x", (writearr[1] & 0x0f));
Peter Stugebf196e92009-01-26 03:08:45 +0000150 for (i = 2; i < writecnt; i++) {
151 OUTB(writearr[i], wbsio_spibase + i);
Sean Nelsonf7f7a552010-01-09 23:34:45 +0000152 msg_pspew("%02x", writearr[i]);
Peter Stugebf196e92009-01-26 03:08:45 +0000153 }
154 mode = ((7 + readcnt) << 4) | (writearr[1] & 0x0f);
155 }
Sean Nelsonf7f7a552010-01-09 23:34:45 +0000156 msg_pspew(" cmd=%02x mode=%02x\n", writearr[0], mode);
Peter Stugebf196e92009-01-26 03:08:45 +0000157
158 if (!mode) {
Sean Nelsonf7f7a552010-01-09 23:34:45 +0000159 msg_perr("%s: unsupported command type wr=%d rd=%d\n",
Peter Stugebf196e92009-01-26 03:08:45 +0000160 __func__, writecnt, readcnt);
Carl-Daniel Hailfinger142e30f2009-07-14 10:26:56 +0000161 /* Command type refers to the number of bytes read/written. */
162 return SPI_INVALID_LENGTH;
Peter Stugebf196e92009-01-26 03:08:45 +0000163 }
164
165 OUTB(writearr[0], wbsio_spibase);
166 OUTB(mode, wbsio_spibase + 1);
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +0000167 programmer_delay(10);
Peter Stugebf196e92009-01-26 03:08:45 +0000168
169 if (!readcnt)
170 return 0;
171
Sean Nelsonf7f7a552010-01-09 23:34:45 +0000172 msg_pspew("%s: returning data =", __func__);
Peter Stugebf196e92009-01-26 03:08:45 +0000173 for (i = 0; i < readcnt; i++) {
174 readarr[i] = INB(wbsio_spibase + 4 + i);
Sean Nelsonf7f7a552010-01-09 23:34:45 +0000175 msg_pspew(" 0x%02x", readarr[i]);
Peter Stugebf196e92009-01-26 03:08:45 +0000176 }
Sean Nelsonf7f7a552010-01-09 23:34:45 +0000177 msg_pspew("\n");
Peter Stugebf196e92009-01-26 03:08:45 +0000178 return 0;
179}
180
Carl-Daniel Hailfingercbf563c2009-06-16 08:55:44 +0000181int wbsio_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len)
Uwe Hermann7b2969b2009-04-15 10:52:49 +0000182{
Peter Stugebf196e92009-01-26 03:08:45 +0000183 int size = flash->total_size * 1024;
184
Carl-Daniel Hailfinger38a059d2009-06-13 12:04:03 +0000185 if (size > 1024 * 1024) {
Sean Nelsonf7f7a552010-01-09 23:34:45 +0000186 msg_perr("%s: Winbond saved on 4 register bits so max chip size is 1024 KB!\n", __func__);
Peter Stugebf196e92009-01-26 03:08:45 +0000187 return 1;
188 }
189
Carl-Daniel Hailfinger116081a2009-08-10 02:29:21 +0000190 return read_memmapped(flash, buf, start, len);
Peter Stugebf196e92009-01-26 03:08:45 +0000191}
192
Carl-Daniel Hailfinger96930c32009-05-09 02:30:21 +0000193int wbsio_spi_write_1(struct flashchip *flash, uint8_t *buf)
Uwe Hermann7b2969b2009-04-15 10:52:49 +0000194{
Carl-Daniel Hailfinger116081a2009-08-10 02:29:21 +0000195 int size = flash->total_size * 1024;
Peter Stugebf196e92009-01-26 03:08:45 +0000196
Carl-Daniel Hailfinger116081a2009-08-10 02:29:21 +0000197 if (size > 1024 * 1024) {
Sean Nelsonf7f7a552010-01-09 23:34:45 +0000198 msg_perr("%s: Winbond saved on 4 register bits so max chip size is 1024 KB!\n", __func__);
Peter Stugebf196e92009-01-26 03:08:45 +0000199 return 1;
200 }
201
Carl-Daniel Hailfinger116081a2009-08-10 02:29:21 +0000202 return spi_chip_write_1(flash, buf);
Peter Stugebf196e92009-01-26 03:08:45 +0000203}
Carl-Daniel Hailfingercceafa22010-05-26 01:45:41 +0000204
205#endif