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Rudolf Marek525339c2009-05-17 19:46:43 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2009 Rudolf Marek <r.marek@assembler.cz>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
Uwe Hermanneaefb482009-05-17 22:57:34 +000018 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Rudolf Marek525339c2009-05-17 19:46:43 +000019 */
20
21/* Datasheets can be found on http://www.siliconimage.com. Great thanks! */
22
23#include <stdlib.h>
24#include <string.h>
Rudolf Marek525339c2009-05-17 19:46:43 +000025#include "flash.h"
26
27#define PCI_VENDOR_ID_SII 0x1095
28
29uint8_t *sii_bar;
30uint16_t id;
31
32struct pcidev_status satas_sii[] = {
Uwe Hermanne8ba5382009-05-22 11:37:27 +000033 {0x1095, 0x0680, PCI_OK, "Silicon Image", "PCI0680 Ultra ATA-133 Host Ctrl"},
Uwe Hermanna8b37272009-06-19 15:54:39 +000034 {0x1095, 0x3112, PCI_OK, "Silicon Image", "SiI 3112 [SATALink/SATARaid] SATA Ctrl"},
Uwe Hermanne8ba5382009-05-22 11:37:27 +000035 {0x1095, 0x3114, PCI_OK, "Silicon Image", "SiI 3114 [SATALink/SATARaid] SATA Ctrl"},
36 {0x1095, 0x3124, PCI_NT, "Silicon Image", "SiI 3124 PCI-X SATA Ctrl"},
37 {0x1095, 0x3132, PCI_OK, "Silicon Image", "SiI 3132 SATA Raid II Ctrl"},
38 {0x1095, 0x3512, PCI_NT, "Silicon Image", "SiI 3512 [SATALink/SATARaid] SATA Ctrl"},
Uwe Hermanneaefb482009-05-17 22:57:34 +000039
Rudolf Marek525339c2009-05-17 19:46:43 +000040 {},
41};
42
43int satasii_init(void)
44{
45 uint32_t addr;
46 uint16_t reg_offset;
47
48 get_io_perms();
49
TURBO Jb0912c02009-09-02 23:00:46 +000050 pcidev_init(PCI_VENDOR_ID_SII, PCI_BASE_ADDRESS_0, satas_sii,
51 programmer_param);
Rudolf Marek525339c2009-05-17 19:46:43 +000052 id = pcidev_dev->device_id;
53
54 if ((id == 0x3132) || (id == 0x3124)) {
Uwe Hermanneaefb482009-05-17 22:57:34 +000055 addr = pci_read_long(pcidev_dev, PCI_BASE_ADDRESS_0) & ~0x07;
Rudolf Marek525339c2009-05-17 19:46:43 +000056 reg_offset = 0x70;
57 } else {
Uwe Hermanneaefb482009-05-17 22:57:34 +000058 addr = pci_read_long(pcidev_dev, PCI_BASE_ADDRESS_5) & ~0x07;
Rudolf Marek525339c2009-05-17 19:46:43 +000059 reg_offset = 0x50;
60 }
61
Uwe Hermanneaefb482009-05-17 22:57:34 +000062 sii_bar = physmap("SATA SIL registers", addr, 0x100) + reg_offset;
Rudolf Marek525339c2009-05-17 19:46:43 +000063
Uwe Hermanneaefb482009-05-17 22:57:34 +000064 /* Check if ROM cycle are OK. */
Urja Rannikko211fa972009-05-31 21:35:10 +000065 if ((id != 0x0680) && (!(mmio_readl(sii_bar) & (1 << 26))))
Sean Nelson05ce5422010-01-09 23:50:27 +000066 msg_pinfo("Warning: Flash seems unconnected.\n");
Rudolf Marek525339c2009-05-17 19:46:43 +000067
Carl-Daniel Hailfingerb22918c2009-06-01 02:08:58 +000068 buses_supported = CHIP_BUSTYPE_PARALLEL;
69
Rudolf Marek525339c2009-05-17 19:46:43 +000070 return 0;
71}
72
73int satasii_shutdown(void)
74{
Carl-Daniel Hailfingeref58a9c2009-08-12 13:32:56 +000075 free(programmer_param);
Rudolf Marek525339c2009-05-17 19:46:43 +000076 pci_cleanup(pacc);
Carl-Daniel Hailfingerdb41c592009-08-09 21:50:24 +000077 release_io_perms();
Rudolf Marek525339c2009-05-17 19:46:43 +000078 return 0;
79}
80
Rudolf Marek525339c2009-05-17 19:46:43 +000081void satasii_chip_writeb(uint8_t val, chipaddr addr)
82{
Uwe Hermanneaefb482009-05-17 22:57:34 +000083 uint32_t ctrl_reg, data_reg;
Rudolf Marek525339c2009-05-17 19:46:43 +000084
85 while ((ctrl_reg = mmio_readl(sii_bar)) & (1 << 25)) ;
86
Uwe Hermanneaefb482009-05-17 22:57:34 +000087 /* Mask out unused/reserved bits, set writes and start transaction. */
Rudolf Marek525339c2009-05-17 19:46:43 +000088 ctrl_reg &= 0xfcf80000;
89 ctrl_reg |= (1 << 25) | (0 << 24) | ((uint32_t) addr & 0x7ffff);
90
Uwe Hermanneaefb482009-05-17 22:57:34 +000091 data_reg = (mmio_readl((sii_bar + 4)) & ~0xff) | val;
92 mmio_writel(data_reg, (sii_bar + 4));
Rudolf Marek525339c2009-05-17 19:46:43 +000093 mmio_writel(ctrl_reg, sii_bar);
94
95 while (mmio_readl(sii_bar) & (1 << 25)) ;
Rudolf Marek525339c2009-05-17 19:46:43 +000096}
97
98uint8_t satasii_chip_readb(const chipaddr addr)
99{
100 uint32_t ctrl_reg;
101
102 while ((ctrl_reg = mmio_readl(sii_bar)) & (1 << 25)) ;
103
Uwe Hermanneaefb482009-05-17 22:57:34 +0000104 /* Mask out unused/reserved bits, set reads and start transaction. */
Rudolf Marek525339c2009-05-17 19:46:43 +0000105 ctrl_reg &= 0xfcf80000;
106 ctrl_reg |= (1 << 25) | (1 << 24) | ((uint32_t) addr & 0x7ffff);
107
108 mmio_writel(ctrl_reg, sii_bar);
109
Uwe Hermanneaefb482009-05-17 22:57:34 +0000110 while (mmio_readl(sii_bar) & (1 << 25)) ;
Rudolf Marek525339c2009-05-17 19:46:43 +0000111
112 return (mmio_readl(sii_bar + 4)) & 0xff;
113}