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Ronald G. Minnich1f4d6532004-09-30 16:37:01 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Ronald G. Minnich1f4d6532004-09-30 16:37:01 +00003 *
Uwe Hermannd22a1d42007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
Adam Jurkowski411d7c12009-11-25 15:04:28 +00005 * Copyright (C) 2009 Kontron Modular Computers
Sean Nelson51c83fb2010-01-20 20:55:53 +00006 * Copyright (C) 2009 Sean Nelson <audiohacked@gmail.com>
Ronald G. Minnich1f4d6532004-09-30 16:37:01 +00007 *
Uwe Hermannd1107642007-08-29 17:52:32 +00008 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
Ronald G. Minnich1f4d6532004-09-30 16:37:01 +000012 *
Uwe Hermannd1107642007-08-29 17:52:32 +000013 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
Ronald G. Minnich1f4d6532004-09-30 16:37:01 +000017 *
Uwe Hermannd1107642007-08-29 17:52:32 +000018 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Ronald G. Minnich1f4d6532004-09-30 16:37:01 +000021 */
22
Uwe Hermannd1107642007-08-29 17:52:32 +000023/* Adapted from the Intel FW hub stuff for 82802ax parts. */
24
Ronald G. Minnich1f4d6532004-09-30 16:37:01 +000025#include "flash.h"
Ronald G. Minnich1f4d6532004-09-30 16:37:01 +000026
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +000027static int check_sst_fwhub_block_lock(struct flashctx *flash, int offset)
Carl-Daniel Hailfingerd0fc9462009-05-11 14:01:17 +000028{
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000029 chipaddr registers = flash->virtual_registers;
Carl-Daniel Hailfingerd0fc9462009-05-11 14:01:17 +000030 uint8_t blockstatus;
31
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000032 blockstatus = chip_readb(flash, registers + offset + 2);
Sean Nelsoned479d22010-03-24 23:14:32 +000033 msg_cdbg("Lock status for 0x%06x (size 0x%06x) is %02x, ",
Carl-Daniel Hailfinger5a7cb842012-08-25 01:17:58 +000034 offset, flash->chip->page_size, blockstatus);
Carl-Daniel Hailfingerd0fc9462009-05-11 14:01:17 +000035 switch (blockstatus & 0x3) {
36 case 0x0:
Sean Nelsoned479d22010-03-24 23:14:32 +000037 msg_cdbg("full access\n");
Carl-Daniel Hailfingerd0fc9462009-05-11 14:01:17 +000038 break;
39 case 0x1:
Sean Nelsoned479d22010-03-24 23:14:32 +000040 msg_cdbg("write locked\n");
Carl-Daniel Hailfingerd0fc9462009-05-11 14:01:17 +000041 break;
42 case 0x2:
Sean Nelsoned479d22010-03-24 23:14:32 +000043 msg_cdbg("locked open\n");
Carl-Daniel Hailfingerd0fc9462009-05-11 14:01:17 +000044 break;
45 case 0x3:
Sean Nelsoned479d22010-03-24 23:14:32 +000046 msg_cdbg("write locked down\n");
Carl-Daniel Hailfingerd0fc9462009-05-11 14:01:17 +000047 break;
48 }
49 /* Return content of the write_locked bit */
50 return blockstatus & 0x1;
51}
52
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +000053static int clear_sst_fwhub_block_lock(struct flashctx *flash, int offset)
Carl-Daniel Hailfingerd0fc9462009-05-11 14:01:17 +000054{
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000055 chipaddr registers = flash->virtual_registers;
Carl-Daniel Hailfingerd0fc9462009-05-11 14:01:17 +000056 uint8_t blockstatus;
57
58 blockstatus = check_sst_fwhub_block_lock(flash, offset);
59
60 if (blockstatus) {
Sean Nelsoned479d22010-03-24 23:14:32 +000061 msg_cdbg("Trying to clear lock for 0x%06x... ", offset);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000062 chip_writeb(flash, 0, registers + offset + 2);
Carl-Daniel Hailfingerd0fc9462009-05-11 14:01:17 +000063
64 blockstatus = check_sst_fwhub_block_lock(flash, offset);
Sean Nelsoned479d22010-03-24 23:14:32 +000065 msg_cdbg("%s\n", (blockstatus) ? "failed" : "OK");
Carl-Daniel Hailfingerd0fc9462009-05-11 14:01:17 +000066 }
67
68 return blockstatus;
69}
70
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +000071int printlock_sst_fwhub(struct flashctx *flash)
Ronald G. Minnich1f4d6532004-09-30 16:37:01 +000072{
Carl-Daniel Hailfingerd0fc9462009-05-11 14:01:17 +000073 int i;
74
Carl-Daniel Hailfinger5a7cb842012-08-25 01:17:58 +000075 for (i = 0; i < flash->chip->total_size * 1024; i += flash->chip->page_size)
Carl-Daniel Hailfingerd0fc9462009-05-11 14:01:17 +000076 check_sst_fwhub_block_lock(flash, i);
77
Carl-Daniel Hailfinger81449a22010-03-15 03:48:42 +000078 return 0;
Ronald G. Minnich1f4d6532004-09-30 16:37:01 +000079}
80
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +000081int unlock_sst_fwhub(struct flashctx *flash)
Ronald G. Minnich1f4d6532004-09-30 16:37:01 +000082{
Sean Nelsonccf7a2a2010-03-16 03:09:10 +000083 int i, ret=0;
Ronald G. Minnich1f4d6532004-09-30 16:37:01 +000084
Carl-Daniel Hailfinger5a7cb842012-08-25 01:17:58 +000085 for (i = 0; i < flash->chip->total_size * 1024; i += flash->chip->page_size)
Sean Nelsonccf7a2a2010-03-16 03:09:10 +000086 {
87 if (clear_sst_fwhub_block_lock(flash, i))
88 {
89 msg_cdbg("Warning: Unlock Failed for block 0x%06x\n", i);
90 ret++;
Stefan Reinauerb7c83232008-03-16 19:44:13 +000091 }
92 }
Sean Nelsonccf7a2a2010-03-16 03:09:10 +000093 return ret;
Ronald G. Minnich1f4d6532004-09-30 16:37:01 +000094}
95