Ronald G. Minnich | 1f4d653 | 2004-09-30 16:37:01 +0000 | [diff] [blame] | 1 | /* |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 2 | * This file is part of the flashrom project. |
Ronald G. Minnich | 1f4d653 | 2004-09-30 16:37:01 +0000 | [diff] [blame] | 3 | * |
Uwe Hermann | d22a1d4 | 2007-09-09 20:21:05 +0000 | [diff] [blame] | 4 | * Copyright (C) 2000 Silicon Integrated System Corporation |
Adam Jurkowski | 411d7c1 | 2009-11-25 15:04:28 +0000 | [diff] [blame] | 5 | * Copyright (C) 2009 Kontron Modular Computers |
Sean Nelson | 51c83fb | 2010-01-20 20:55:53 +0000 | [diff] [blame] | 6 | * Copyright (C) 2009 Sean Nelson <audiohacked@gmail.com> |
Ronald G. Minnich | 1f4d653 | 2004-09-30 16:37:01 +0000 | [diff] [blame] | 7 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2 of the License, or |
| 11 | * (at your option) any later version. |
Ronald G. Minnich | 1f4d653 | 2004-09-30 16:37:01 +0000 | [diff] [blame] | 12 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
Ronald G. Minnich | 1f4d653 | 2004-09-30 16:37:01 +0000 | [diff] [blame] | 17 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
Ronald G. Minnich | 1f4d653 | 2004-09-30 16:37:01 +0000 | [diff] [blame] | 21 | */ |
| 22 | |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 23 | /* Adapted from the Intel FW hub stuff for 82802ax parts. */ |
| 24 | |
Ronald G. Minnich | 1f4d653 | 2004-09-30 16:37:01 +0000 | [diff] [blame] | 25 | #include "flash.h" |
Ronald G. Minnich | 1f4d653 | 2004-09-30 16:37:01 +0000 | [diff] [blame] | 26 | |
Carl-Daniel Hailfinger | 63fd902 | 2011-12-14 22:25:15 +0000 | [diff] [blame] | 27 | static int check_sst_fwhub_block_lock(struct flashctx *flash, int offset) |
Carl-Daniel Hailfinger | d0fc946 | 2009-05-11 14:01:17 +0000 | [diff] [blame] | 28 | { |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 29 | chipaddr registers = flash->virtual_registers; |
Carl-Daniel Hailfinger | d0fc946 | 2009-05-11 14:01:17 +0000 | [diff] [blame] | 30 | uint8_t blockstatus; |
| 31 | |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 32 | blockstatus = chip_readb(flash, registers + offset + 2); |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 33 | msg_cdbg("Lock status for 0x%06x (size 0x%06x) is %02x, ", |
Carl-Daniel Hailfinger | 5a7cb84 | 2012-08-25 01:17:58 +0000 | [diff] [blame^] | 34 | offset, flash->chip->page_size, blockstatus); |
Carl-Daniel Hailfinger | d0fc946 | 2009-05-11 14:01:17 +0000 | [diff] [blame] | 35 | switch (blockstatus & 0x3) { |
| 36 | case 0x0: |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 37 | msg_cdbg("full access\n"); |
Carl-Daniel Hailfinger | d0fc946 | 2009-05-11 14:01:17 +0000 | [diff] [blame] | 38 | break; |
| 39 | case 0x1: |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 40 | msg_cdbg("write locked\n"); |
Carl-Daniel Hailfinger | d0fc946 | 2009-05-11 14:01:17 +0000 | [diff] [blame] | 41 | break; |
| 42 | case 0x2: |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 43 | msg_cdbg("locked open\n"); |
Carl-Daniel Hailfinger | d0fc946 | 2009-05-11 14:01:17 +0000 | [diff] [blame] | 44 | break; |
| 45 | case 0x3: |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 46 | msg_cdbg("write locked down\n"); |
Carl-Daniel Hailfinger | d0fc946 | 2009-05-11 14:01:17 +0000 | [diff] [blame] | 47 | break; |
| 48 | } |
| 49 | /* Return content of the write_locked bit */ |
| 50 | return blockstatus & 0x1; |
| 51 | } |
| 52 | |
Carl-Daniel Hailfinger | 63fd902 | 2011-12-14 22:25:15 +0000 | [diff] [blame] | 53 | static int clear_sst_fwhub_block_lock(struct flashctx *flash, int offset) |
Carl-Daniel Hailfinger | d0fc946 | 2009-05-11 14:01:17 +0000 | [diff] [blame] | 54 | { |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 55 | chipaddr registers = flash->virtual_registers; |
Carl-Daniel Hailfinger | d0fc946 | 2009-05-11 14:01:17 +0000 | [diff] [blame] | 56 | uint8_t blockstatus; |
| 57 | |
| 58 | blockstatus = check_sst_fwhub_block_lock(flash, offset); |
| 59 | |
| 60 | if (blockstatus) { |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 61 | msg_cdbg("Trying to clear lock for 0x%06x... ", offset); |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 62 | chip_writeb(flash, 0, registers + offset + 2); |
Carl-Daniel Hailfinger | d0fc946 | 2009-05-11 14:01:17 +0000 | [diff] [blame] | 63 | |
| 64 | blockstatus = check_sst_fwhub_block_lock(flash, offset); |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 65 | msg_cdbg("%s\n", (blockstatus) ? "failed" : "OK"); |
Carl-Daniel Hailfinger | d0fc946 | 2009-05-11 14:01:17 +0000 | [diff] [blame] | 66 | } |
| 67 | |
| 68 | return blockstatus; |
| 69 | } |
| 70 | |
Carl-Daniel Hailfinger | 63fd902 | 2011-12-14 22:25:15 +0000 | [diff] [blame] | 71 | int printlock_sst_fwhub(struct flashctx *flash) |
Ronald G. Minnich | 1f4d653 | 2004-09-30 16:37:01 +0000 | [diff] [blame] | 72 | { |
Carl-Daniel Hailfinger | d0fc946 | 2009-05-11 14:01:17 +0000 | [diff] [blame] | 73 | int i; |
| 74 | |
Carl-Daniel Hailfinger | 5a7cb84 | 2012-08-25 01:17:58 +0000 | [diff] [blame^] | 75 | for (i = 0; i < flash->chip->total_size * 1024; i += flash->chip->page_size) |
Carl-Daniel Hailfinger | d0fc946 | 2009-05-11 14:01:17 +0000 | [diff] [blame] | 76 | check_sst_fwhub_block_lock(flash, i); |
| 77 | |
Carl-Daniel Hailfinger | 81449a2 | 2010-03-15 03:48:42 +0000 | [diff] [blame] | 78 | return 0; |
Ronald G. Minnich | 1f4d653 | 2004-09-30 16:37:01 +0000 | [diff] [blame] | 79 | } |
| 80 | |
Carl-Daniel Hailfinger | 63fd902 | 2011-12-14 22:25:15 +0000 | [diff] [blame] | 81 | int unlock_sst_fwhub(struct flashctx *flash) |
Ronald G. Minnich | 1f4d653 | 2004-09-30 16:37:01 +0000 | [diff] [blame] | 82 | { |
Sean Nelson | ccf7a2a | 2010-03-16 03:09:10 +0000 | [diff] [blame] | 83 | int i, ret=0; |
Ronald G. Minnich | 1f4d653 | 2004-09-30 16:37:01 +0000 | [diff] [blame] | 84 | |
Carl-Daniel Hailfinger | 5a7cb84 | 2012-08-25 01:17:58 +0000 | [diff] [blame^] | 85 | for (i = 0; i < flash->chip->total_size * 1024; i += flash->chip->page_size) |
Sean Nelson | ccf7a2a | 2010-03-16 03:09:10 +0000 | [diff] [blame] | 86 | { |
| 87 | if (clear_sst_fwhub_block_lock(flash, i)) |
| 88 | { |
| 89 | msg_cdbg("Warning: Unlock Failed for block 0x%06x\n", i); |
| 90 | ret++; |
Stefan Reinauer | b7c8323 | 2008-03-16 19:44:13 +0000 | [diff] [blame] | 91 | } |
| 92 | } |
Sean Nelson | ccf7a2a | 2010-03-16 03:09:10 +0000 | [diff] [blame] | 93 | return ret; |
Ronald G. Minnich | 1f4d653 | 2004-09-30 16:37:01 +0000 | [diff] [blame] | 94 | } |
| 95 | |