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Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00003 *
Uwe Hermannd22a1d42007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00005 *
Uwe Hermannd1107642007-08-29 17:52:32 +00006 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000010 *
Uwe Hermannd1107642007-08-29 17:52:32 +000011 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000015 *
Uwe Hermannd1107642007-08-29 17:52:32 +000016 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000019 */
20
21#include "flash.h"
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000022
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +000023static int erase_sector_29f040b(struct flashchip *flash, unsigned long address)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000024{
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +000025 int page_size = flash->page_size;
26 chipaddr bios = flash->virtual_memory;
27
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000028 chip_writeb(0xAA, bios + 0x555);
29 chip_writeb(0x55, bios + 0x2AA);
30 chip_writeb(0x80, bios + 0x555);
31 chip_writeb(0xAA, bios + 0x555);
32 chip_writeb(0x55, bios + 0x2AA);
33 chip_writeb(0x30, bios + address);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000034
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +000035 programmer_delay(2 * 1000 * 1000);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000036
37 /* wait for Toggle bit ready */
38 toggle_ready_jedec(bios + address);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000039
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +000040 if (check_erased_range(flash, address, page_size)) {
41 fprintf(stderr, "ERASE FAILED!\n");
42 return -1;
43 }
Uwe Hermannffec5f32007-08-23 16:08:21 +000044 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000045}
46
Uwe Hermann09e04f72009-05-16 22:36:00 +000047static int write_sector_29f040b(chipaddr bios, uint8_t *src, chipaddr dst,
48 unsigned int page_size)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000049{
50 int i;
51
52 for (i = 0; i < page_size; i++) {
Uwe Hermann0b7afe62007-04-01 19:44:21 +000053 if ((i & 0xfff) == 0xfff)
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000054 printf("0x%08lx", dst - bios);
Ollie Lho761bf1b2004-03-20 16:46:10 +000055
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000056 chip_writeb(0xAA, bios + 0x555);
57 chip_writeb(0x55, bios + 0x2AA);
58 chip_writeb(0xA0, bios + 0x555);
59 chip_writeb(*src++, dst++);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000060
61 /* wait for Toggle bit ready */
62 toggle_ready_jedec(bios);
63
Uwe Hermann0b7afe62007-04-01 19:44:21 +000064 if ((i & 0xfff) == 0xfff)
Stefan Reinauer99349a52006-03-16 16:46:19 +000065 printf("\b\b\b\b\b\b\b\b\b\b");
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000066 }
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000067
Uwe Hermannffec5f32007-08-23 16:08:21 +000068 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000069}
70
Ollie Lho761bf1b2004-03-20 16:46:10 +000071int probe_29f040b(struct flashchip *flash)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000072{
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000073 chipaddr bios = flash->virtual_memory;
Ollie Lho184a4042005-11-26 21:55:36 +000074 uint8_t id1, id2;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000075
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000076 chip_writeb(0xAA, bios + 0x555);
77 chip_writeb(0x55, bios + 0x2AA);
78 chip_writeb(0x90, bios + 0x555);
Ollie Lho761bf1b2004-03-20 16:46:10 +000079
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000080 id1 = chip_readb(bios);
81 id2 = chip_readb(bios + 0x01);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000082
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000083 chip_writeb(0xF0, bios);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000084
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +000085 programmer_delay(10);
Ollie Lho761bf1b2004-03-20 16:46:10 +000086
Uwe Hermann04aa59a2009-09-02 22:09:00 +000087 printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000088 if (id1 == flash->manufacture_id && id2 == flash->model_id)
89 return 1;
90
91 return 0;
92}
93
Ollie Lho761bf1b2004-03-20 16:46:10 +000094int erase_29f040b(struct flashchip *flash)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000095{
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +000096 int total_size = flash->total_size * 1024;
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000097 chipaddr bios = flash->virtual_memory;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000098
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000099 chip_writeb(0xAA, bios + 0x555);
100 chip_writeb(0x55, bios + 0x2AA);
101 chip_writeb(0x80, bios + 0x555);
102 chip_writeb(0xAA, bios + 0x555);
103 chip_writeb(0x55, bios + 0x2AA);
104 chip_writeb(0x10, bios + 0x555);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000105
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +0000106 programmer_delay(10);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000107 toggle_ready_jedec(bios);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000108
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +0000109 if (check_erased_range(flash, 0, total_size)) {
110 fprintf(stderr, "ERASE FAILED!\n");
111 return -1;
112 }
Uwe Hermannffec5f32007-08-23 16:08:21 +0000113 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000114}
115
Ollie Lho184a4042005-11-26 21:55:36 +0000116int write_29f040b(struct flashchip *flash, uint8_t *buf)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000117{
118 int i;
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000119 int total_size = flash->total_size * 1024;
120 int page_size = flash->page_size;
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000121 chipaddr bios = flash->virtual_memory;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000122
Stefan Reinauer99349a52006-03-16 16:46:19 +0000123 printf("Programming page ");
Ollie Lho761bf1b2004-03-20 16:46:10 +0000124 for (i = 0; i < total_size / page_size; i++) {
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000125 /* erase the page before programming */
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +0000126 if (erase_sector_29f040b(flash, i * page_size)) {
127 fprintf(stderr, "ERASE FAILED!\n");
128 return -1;
129 }
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000130
131 /* write to the sector */
Ollie Lho761bf1b2004-03-20 16:46:10 +0000132 printf("%04d at address: ", i);
133 write_sector_29f040b(bios, buf + i * page_size,
134 bios + i * page_size, page_size);
135 printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000136 }
137 printf("\n");
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000138
Uwe Hermannffec5f32007-08-23 16:08:21 +0000139 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000140}