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Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00003 *
Uwe Hermannd22a1d42007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00005 *
Uwe Hermannd1107642007-08-29 17:52:32 +00006 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000010 *
Uwe Hermannd1107642007-08-29 17:52:32 +000011 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000015 *
Uwe Hermannd1107642007-08-29 17:52:32 +000016 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000019 */
20
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000021#include <stdio.h>
Ollie Lho184a4042005-11-26 21:55:36 +000022#include <stdint.h>
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000023#include "flash.h"
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000024
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000025static __inline__ int erase_sector_29f040b(chipaddr bios,
Ollie Lho761bf1b2004-03-20 16:46:10 +000026 unsigned long address)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000027{
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000028 chip_writeb(0xAA, bios + 0x555);
29 chip_writeb(0x55, bios + 0x2AA);
30 chip_writeb(0x80, bios + 0x555);
31 chip_writeb(0xAA, bios + 0x555);
32 chip_writeb(0x55, bios + 0x2AA);
33 chip_writeb(0x30, bios + address);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000034
35 sleep(2);
36
37 /* wait for Toggle bit ready */
38 toggle_ready_jedec(bios + address);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000039
Uwe Hermannffec5f32007-08-23 16:08:21 +000040 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000041}
42
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000043static __inline__ int write_sector_29f040b(chipaddr bios,
Ollie Lho184a4042005-11-26 21:55:36 +000044 uint8_t *src,
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000045 chipaddr dst,
Ollie Lho761bf1b2004-03-20 16:46:10 +000046 unsigned int page_size)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000047{
48 int i;
49
50 for (i = 0; i < page_size; i++) {
Uwe Hermann0b7afe62007-04-01 19:44:21 +000051 if ((i & 0xfff) == 0xfff)
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000052 printf("0x%08lx", dst - bios);
Ollie Lho761bf1b2004-03-20 16:46:10 +000053
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000054 chip_writeb(0xAA, bios + 0x555);
55 chip_writeb(0x55, bios + 0x2AA);
56 chip_writeb(0xA0, bios + 0x555);
57 chip_writeb(*src++, dst++);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000058
59 /* wait for Toggle bit ready */
60 toggle_ready_jedec(bios);
61
Uwe Hermann0b7afe62007-04-01 19:44:21 +000062 if ((i & 0xfff) == 0xfff)
Stefan Reinauer99349a52006-03-16 16:46:19 +000063 printf("\b\b\b\b\b\b\b\b\b\b");
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000064 }
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000065
Uwe Hermannffec5f32007-08-23 16:08:21 +000066 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000067}
68
Ollie Lho761bf1b2004-03-20 16:46:10 +000069int probe_29f040b(struct flashchip *flash)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000070{
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000071 chipaddr bios = flash->virtual_memory;
Ollie Lho184a4042005-11-26 21:55:36 +000072 uint8_t id1, id2;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000073
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000074 chip_writeb(0xAA, bios + 0x555);
75 chip_writeb(0x55, bios + 0x2AA);
76 chip_writeb(0x90, bios + 0x555);
Ollie Lho761bf1b2004-03-20 16:46:10 +000077
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000078 id1 = chip_readb(bios);
79 id2 = chip_readb(bios + 0x01);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000080
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000081 chip_writeb(0xF0, bios);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000082
Ronald G. Minnichef5779d2002-01-29 20:18:02 +000083 myusec_delay(10);
Ollie Lho761bf1b2004-03-20 16:46:10 +000084
Peter Stuge5cafc332009-01-25 23:52:45 +000085 printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000086 if (id1 == flash->manufacture_id && id2 == flash->model_id)
87 return 1;
88
89 return 0;
90}
91
Ollie Lho761bf1b2004-03-20 16:46:10 +000092int erase_29f040b(struct flashchip *flash)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000093{
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000094 chipaddr bios = flash->virtual_memory;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000095
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000096 chip_writeb(0xAA, bios + 0x555);
97 chip_writeb(0x55, bios + 0x2AA);
98 chip_writeb(0x80, bios + 0x555);
99 chip_writeb(0xAA, bios + 0x555);
100 chip_writeb(0x55, bios + 0x2AA);
101 chip_writeb(0x10, bios + 0x555);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000102
Ronald G. Minnichef5779d2002-01-29 20:18:02 +0000103 myusec_delay(10);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000104 toggle_ready_jedec(bios);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000105
Uwe Hermannffec5f32007-08-23 16:08:21 +0000106 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000107}
108
Ollie Lho184a4042005-11-26 21:55:36 +0000109int write_29f040b(struct flashchip *flash, uint8_t *buf)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000110{
111 int i;
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000112 int total_size = flash->total_size * 1024;
113 int page_size = flash->page_size;
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000114 chipaddr bios = flash->virtual_memory;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000115
Stefan Reinauer99349a52006-03-16 16:46:19 +0000116 printf("Programming page ");
Ollie Lho761bf1b2004-03-20 16:46:10 +0000117 for (i = 0; i < total_size / page_size; i++) {
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000118 /* erase the page before programming */
119 erase_sector_29f040b(bios, i * page_size);
120
121 /* write to the sector */
Ollie Lho761bf1b2004-03-20 16:46:10 +0000122 printf("%04d at address: ", i);
123 write_sector_29f040b(bios, buf + i * page_size,
124 bios + i * page_size, page_size);
125 printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000126 }
127 printf("\n");
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000128
Uwe Hermannffec5f32007-08-23 16:08:21 +0000129 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000130}