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Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00003 *
Uwe Hermannd22a1d42007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2005 coresystems GmbH <stepan@openbios.org>
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00006 *
Uwe Hermannd1107642007-08-29 17:52:32 +00007 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000011 *
Uwe Hermannd1107642007-08-29 17:52:32 +000012 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000016 *
Uwe Hermannd1107642007-08-29 17:52:32 +000017 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000020 */
21
22#include "flash.h"
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000023
24#define AUTO_PG_ERASE1 0x20
25#define AUTO_PG_ERASE2 0xD0
Ollie Lhocf29de82004-03-18 19:40:07 +000026#define AUTO_PGRM 0x10
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000027#define CHIP_ERASE 0x30
28#define RESET 0xFF
29#define READ_ID 0x90
30
Uwe Hermann09e04f72009-05-16 22:36:00 +000031static void protect_28sf040(chipaddr bios)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000032{
Stefan Reinauer9e72aa52009-09-16 08:18:08 +000033 chip_readb(bios + 0x1823);
34 chip_readb(bios + 0x1820);
35 chip_readb(bios + 0x1822);
36 chip_readb(bios + 0x0418);
37 chip_readb(bios + 0x041B);
38 chip_readb(bios + 0x0419);
39 chip_readb(bios + 0x040A);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000040}
41
Uwe Hermann09e04f72009-05-16 22:36:00 +000042static void unprotect_28sf040(chipaddr bios)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000043{
Stefan Reinauer9e72aa52009-09-16 08:18:08 +000044 chip_readb(bios + 0x1823);
45 chip_readb(bios + 0x1820);
46 chip_readb(bios + 0x1822);
47 chip_readb(bios + 0x0418);
48 chip_readb(bios + 0x041B);
49 chip_readb(bios + 0x0419);
50 chip_readb(bios + 0x041A);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000051}
52
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +000053static int erase_sector_28sf040(struct flashchip *flash, unsigned long address, int sector_size)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000054{
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +000055 chipaddr bios = flash->virtual_memory;
56
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000057 chip_writeb(AUTO_PG_ERASE1, bios);
58 chip_writeb(AUTO_PG_ERASE2, bios + address);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000059
60 /* wait for Toggle bit ready */
61 toggle_ready_jedec(bios);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000062
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +000063 if (check_erased_range(flash, address, sector_size)) {
64 fprintf(stderr, "ERASE FAILED!\n");
65 return -1;
66 }
Uwe Hermannffec5f32007-08-23 16:08:21 +000067 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000068}
69
Uwe Hermann09e04f72009-05-16 22:36:00 +000070static int write_sector_28sf040(chipaddr bios, uint8_t *src, chipaddr dst,
71 unsigned int page_size)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000072{
73 int i;
74
75 for (i = 0; i < page_size; i++) {
76 /* transfer data from source to destination */
77 if (*src == 0xFF) {
78 dst++, src++;
79 /* If the data is 0xFF, don't program it */
80 continue;
81 }
82 /*issue AUTO PROGRAM command */
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000083 chip_writeb(AUTO_PGRM, dst);
84 chip_writeb(*src++, dst++);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000085
86 /* wait for Toggle bit ready */
87 toggle_ready_jedec(bios);
88 }
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000089
Uwe Hermannffec5f32007-08-23 16:08:21 +000090 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000091}
92
Ollie Lho761bf1b2004-03-20 16:46:10 +000093int probe_28sf040(struct flashchip *flash)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000094{
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000095 chipaddr bios = flash->virtual_memory;
Ed Swierk966dc202007-08-13 04:10:32 +000096 uint8_t id1, id2;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000097
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000098 chip_writeb(RESET, bios);
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +000099 programmer_delay(10);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000100
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000101 chip_writeb(READ_ID, bios);
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +0000102 programmer_delay(10);
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000103 id1 = chip_readb(bios);
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +0000104 programmer_delay(10);
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000105 id2 = chip_readb(bios + 0x01);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000106
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000107 chip_writeb(RESET, bios);
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +0000108 programmer_delay(10);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000109
Uwe Hermann04aa59a2009-09-02 22:09:00 +0000110 printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000111 if (id1 == flash->manufacture_id && id2 == flash->model_id)
112 return 1;
113
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000114 return 0;
115}
116
Ollie Lho761bf1b2004-03-20 16:46:10 +0000117int erase_28sf040(struct flashchip *flash)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000118{
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000119 chipaddr bios = flash->virtual_memory;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000120
Ollie Lho761bf1b2004-03-20 16:46:10 +0000121 unprotect_28sf040(bios);
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000122 chip_writeb(CHIP_ERASE, bios);
123 chip_writeb(CHIP_ERASE, bios);
Ollie Lho761bf1b2004-03-20 16:46:10 +0000124 protect_28sf040(bios);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000125
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +0000126 programmer_delay(10);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000127 toggle_ready_jedec(bios);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000128
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +0000129 if (check_erased_range(flash, 0, flash->total_size * 1024)) {
130 fprintf(stderr, "ERASE FAILED!\n");
131 return -1;
132 }
Uwe Hermannffec5f32007-08-23 16:08:21 +0000133 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000134}
135
Ollie Lho184a4042005-11-26 21:55:36 +0000136int write_28sf040(struct flashchip *flash, uint8_t *buf)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000137{
138 int i;
Uwe Hermanna7e05482007-05-09 10:17:44 +0000139 int total_size = flash->total_size * 1024;
140 int page_size = flash->page_size;
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000141 chipaddr bios = flash->virtual_memory;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000142
Ollie Lho761bf1b2004-03-20 16:46:10 +0000143 unprotect_28sf040(bios);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000144
Uwe Hermanna502dce2007-10-17 23:55:15 +0000145 printf("Programming page: ");
Ollie Lho761bf1b2004-03-20 16:46:10 +0000146 for (i = 0; i < total_size / page_size; i++) {
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000147 /* erase the page before programming */
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +0000148 if (erase_sector_28sf040(flash, i * page_size, page_size)) {
149 fprintf(stderr, "ERASE FAILED!\n");
150 return -1;
151 }
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000152
153 /* write to the sector */
Ollie Lho761bf1b2004-03-20 16:46:10 +0000154 printf("%04d at address: 0x%08x", i, i * page_size);
155 write_sector_28sf040(bios, buf + i * page_size,
156 bios + i * page_size, page_size);
Ollie Lho8b8897a2004-03-27 00:18:15 +0000157 printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000158 }
159 printf("\n");
160
Ollie Lho761bf1b2004-03-20 16:46:10 +0000161 protect_28sf040(bios);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000162
Uwe Hermannffec5f32007-08-23 16:08:21 +0000163 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000164}