Carl-Daniel Hailfinger | c312920 | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the flashrom project. |
| 3 | * |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 4 | * Copyright (C) 2009,2010 Carl-Daniel Hailfinger |
Carl-Daniel Hailfinger | c312920 | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 8 | * the Free Software Foundation; version 2 of the License. |
Carl-Daniel Hailfinger | c312920 | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Carl-Daniel Hailfinger | c312920 | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 14 | */ |
| 15 | |
Sergii Dmytruk | 59151a4 | 2021-11-08 00:05:12 +0200 | [diff] [blame] | 16 | #include <assert.h> |
Carl-Daniel Hailfinger | c312920 | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 17 | #include <string.h> |
| 18 | #include <stdlib.h> |
Carl-Daniel Hailfinger | 1b83be5 | 2012-02-08 23:28:54 +0000 | [diff] [blame] | 19 | #include <stdio.h> |
| 20 | #include <ctype.h> |
Stefan Tauner | 5e695ab | 2012-05-06 17:03:40 +0000 | [diff] [blame] | 21 | #include <errno.h> |
Nico Huber | ab69629 | 2021-06-09 18:10:07 +0200 | [diff] [blame] | 22 | #include <sys/types.h> |
| 23 | #include <sys/stat.h> |
Carl-Daniel Hailfinger | c312920 | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 24 | #include "flash.h" |
Carl-Daniel Hailfinger | 1b0ba89 | 2010-06-20 10:58:32 +0000 | [diff] [blame] | 25 | #include "chipdrivers.h" |
Carl-Daniel Hailfinger | 5b997c3 | 2010-07-27 22:41:39 +0000 | [diff] [blame] | 26 | #include "programmer.h" |
Carl-Daniel Hailfinger | c312920 | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 27 | |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 28 | #include "spi.h" |
Sergii Dmytruk | 2fc70dc | 2021-11-08 01:38:52 +0200 | [diff] [blame] | 29 | #include "writeprotect.h" |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 30 | |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 31 | enum emu_chip { |
| 32 | EMULATE_NONE, |
| 33 | EMULATE_ST_M25P10_RES, |
| 34 | EMULATE_SST_SST25VF040_REMS, |
| 35 | EMULATE_SST_SST25VF032B, |
Stefan Tauner | 0b9df97 | 2012-05-07 22:12:16 +0000 | [diff] [blame] | 36 | EMULATE_MACRONIX_MX25L6436, |
Nico Huber | f9632d8 | 2019-01-20 11:23:49 +0100 | [diff] [blame] | 37 | EMULATE_WINBOND_W25Q128FV, |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 38 | }; |
Stefan Tauner | 0b9df97 | 2012-05-07 22:12:16 +0000 | [diff] [blame] | 39 | |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 40 | struct emu_data { |
| 41 | enum emu_chip emu_chip; |
| 42 | char *emu_persistent_image; |
| 43 | unsigned int emu_chip_size; |
Sergii Dmytruk | 59151a4 | 2021-11-08 00:05:12 +0200 | [diff] [blame] | 44 | /* Note: W25Q128FV doesn't change value of SR2 if it's not provided, but |
| 45 | * even its previous generations do, so don't forget to update |
| 46 | * WRSR code on enabling WRSR_EXT for more chips. */ |
| 47 | bool emu_wrsr_ext; |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 48 | int emu_modified; /* is the image modified since reading it? */ |
Sergii Dmytruk | 59151a4 | 2021-11-08 00:05:12 +0200 | [diff] [blame] | 49 | uint8_t emu_status[3]; |
| 50 | uint8_t emu_status_len; /* number of emulated status registers */ |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 51 | unsigned int emu_max_byteprogram_size; |
| 52 | unsigned int emu_max_aai_size; |
| 53 | unsigned int emu_jedec_se_size; |
| 54 | unsigned int emu_jedec_be_52_size; |
| 55 | unsigned int emu_jedec_be_d8_size; |
| 56 | unsigned int emu_jedec_ce_60_size; |
| 57 | unsigned int emu_jedec_ce_c7_size; |
| 58 | unsigned char spi_blacklist[256]; |
| 59 | unsigned char spi_ignorelist[256]; |
| 60 | unsigned int spi_blacklist_size; |
| 61 | unsigned int spi_ignorelist_size; |
Edward O'Callaghan | 9425022 | 2021-05-20 20:34:02 +1000 | [diff] [blame] | 62 | |
Sergii Dmytruk | 2fc70dc | 2021-11-08 01:38:52 +0200 | [diff] [blame] | 63 | bool hwwp; /* state of hardware write protection */ |
| 64 | /* wp_start == wp_end when write-protection is disabled */ |
| 65 | uint32_t wp_start; |
| 66 | uint32_t wp_end; |
| 67 | |
Edward O'Callaghan | 9425022 | 2021-05-20 20:34:02 +1000 | [diff] [blame] | 68 | uint8_t *flashchip_contents; |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 69 | }; |
| 70 | |
Stefan Tauner | 0b9df97 | 2012-05-07 22:12:16 +0000 | [diff] [blame] | 71 | /* A legit complete SFDP table based on the MX25L6436E (rev. 1.8) datasheet. */ |
Stefan Tauner | 67d163d | 2013-01-15 17:37:48 +0000 | [diff] [blame] | 72 | static const uint8_t sfdp_table[] = { |
Stefan Tauner | 0b9df97 | 2012-05-07 22:12:16 +0000 | [diff] [blame] | 73 | 0x53, 0x46, 0x44, 0x50, // @0x00: SFDP signature |
| 74 | 0x00, 0x01, 0x01, 0xFF, // @0x04: revision 1.0, 2 headers |
| 75 | 0x00, 0x00, 0x01, 0x09, // @0x08: JEDEC SFDP header rev. 1.0, 9 DW long |
| 76 | 0x1C, 0x00, 0x00, 0xFF, // @0x0C: PTP0 = 0x1C (instead of 0x30) |
| 77 | 0xC2, 0x00, 0x01, 0x04, // @0x10: Macronix header rev. 1.0, 4 DW long |
| 78 | 0x48, 0x00, 0x00, 0xFF, // @0x14: PTP1 = 0x48 (instead of 0x60) |
| 79 | 0xFF, 0xFF, 0xFF, 0xFF, // @0x18: hole. |
| 80 | 0xE5, 0x20, 0xC9, 0xFF, // @0x1C: SFDP parameter table start |
| 81 | 0xFF, 0xFF, 0xFF, 0x03, // @0x20 |
| 82 | 0x00, 0xFF, 0x08, 0x6B, // @0x24 |
| 83 | 0x08, 0x3B, 0x00, 0xFF, // @0x28 |
| 84 | 0xEE, 0xFF, 0xFF, 0xFF, // @0x2C |
| 85 | 0xFF, 0xFF, 0x00, 0x00, // @0x30 |
| 86 | 0xFF, 0xFF, 0x00, 0xFF, // @0x34 |
| 87 | 0x0C, 0x20, 0x0F, 0x52, // @0x38 |
| 88 | 0x10, 0xD8, 0x00, 0xFF, // @0x3C: SFDP parameter table end |
| 89 | 0xFF, 0xFF, 0xFF, 0xFF, // @0x40: hole. |
| 90 | 0xFF, 0xFF, 0xFF, 0xFF, // @0x44: hole. |
| 91 | 0x00, 0x36, 0x00, 0x27, // @0x48: Macronix parameter table start |
| 92 | 0xF4, 0x4F, 0xFF, 0xFF, // @0x4C |
| 93 | 0xD9, 0xC8, 0xFF, 0xFF, // @0x50 |
| 94 | 0xFF, 0xFF, 0xFF, 0xFF, // @0x54: Macronix parameter table end |
| 95 | }; |
| 96 | |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 97 | |
Stefan Tauner | c69c9c8 | 2011-11-23 09:13:48 +0000 | [diff] [blame] | 98 | static unsigned int spi_write_256_chunksize = 256; |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 99 | |
Edward O'Callaghan | 5eca427 | 2020-04-12 17:27:53 +1000 | [diff] [blame] | 100 | static int dummy_spi_send_command(const struct flashctx *flash, unsigned int writecnt, unsigned int readcnt, |
Mark Marshall | f20b7be | 2014-05-09 21:16:21 +0000 | [diff] [blame] | 101 | const unsigned char *writearr, unsigned char *readarr); |
| 102 | static int dummy_spi_write_256(struct flashctx *flash, const uint8_t *buf, |
Stefan Tauner | c69c9c8 | 2011-11-23 09:13:48 +0000 | [diff] [blame] | 103 | unsigned int start, unsigned int len); |
Mark Marshall | f20b7be | 2014-05-09 21:16:21 +0000 | [diff] [blame] | 104 | static void dummy_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr); |
| 105 | static void dummy_chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr); |
| 106 | static void dummy_chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr); |
| 107 | static void dummy_chip_writen(const struct flashctx *flash, const uint8_t *buf, chipaddr addr, size_t len); |
| 108 | static uint8_t dummy_chip_readb(const struct flashctx *flash, const chipaddr addr); |
| 109 | static uint16_t dummy_chip_readw(const struct flashctx *flash, const chipaddr addr); |
| 110 | static uint32_t dummy_chip_readl(const struct flashctx *flash, const chipaddr addr); |
| 111 | static void dummy_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len); |
Michael Karcher | b9dbe48 | 2011-05-11 17:07:07 +0000 | [diff] [blame] | 112 | |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 113 | static struct spi_master spi_master_dummyflasher = { |
Nico Huber | 1cf407b | 2017-11-10 20:18:23 +0100 | [diff] [blame] | 114 | .features = SPI_MASTER_4BA, |
Uwe Hermann | 91f4afa | 2011-07-28 08:13:25 +0000 | [diff] [blame] | 115 | .max_data_read = MAX_DATA_READ_UNLIMITED, |
| 116 | .max_data_write = MAX_DATA_UNSPECIFIED, |
| 117 | .command = dummy_spi_send_command, |
| 118 | .multicommand = default_spi_send_multicommand, |
| 119 | .read = default_spi_read, |
| 120 | .write_256 = dummy_spi_write_256, |
Nico Huber | 7bca126 | 2012-06-15 22:28:12 +0000 | [diff] [blame] | 121 | .write_aai = default_spi_write_aai, |
Michael Karcher | b9dbe48 | 2011-05-11 17:07:07 +0000 | [diff] [blame] | 122 | }; |
David Hendricks | 8bb2021 | 2011-06-14 01:35:36 +0000 | [diff] [blame] | 123 | |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 124 | static struct par_master par_master_dummy = { |
Carl-Daniel Hailfinger | eaacd2d | 2011-11-09 23:40:00 +0000 | [diff] [blame] | 125 | .chip_readb = dummy_chip_readb, |
| 126 | .chip_readw = dummy_chip_readw, |
| 127 | .chip_readl = dummy_chip_readl, |
| 128 | .chip_readn = dummy_chip_readn, |
| 129 | .chip_writeb = dummy_chip_writeb, |
| 130 | .chip_writew = dummy_chip_writew, |
| 131 | .chip_writel = dummy_chip_writel, |
| 132 | .chip_writen = dummy_chip_writen, |
| 133 | }; |
| 134 | |
David Hendricks | 8bb2021 | 2011-06-14 01:35:36 +0000 | [diff] [blame] | 135 | static int dummy_shutdown(void *data) |
| 136 | { |
| 137 | msg_pspew("%s\n", __func__); |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 138 | struct emu_data *emu_data = (struct emu_data *)data; |
| 139 | if (emu_data->emu_chip != EMULATE_NONE) { |
| 140 | if (emu_data->emu_persistent_image && emu_data->emu_modified) { |
| 141 | msg_pdbg("Writing %s\n", emu_data->emu_persistent_image); |
Edward O'Callaghan | 9425022 | 2021-05-20 20:34:02 +1000 | [diff] [blame] | 142 | write_buf_to_file(emu_data->flashchip_contents, |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 143 | emu_data->emu_chip_size, |
| 144 | emu_data->emu_persistent_image); |
David Hendricks | 8bb2021 | 2011-06-14 01:35:36 +0000 | [diff] [blame] | 145 | } |
Angel Pons | 02b9ae2 | 2021-05-25 12:46:43 +0200 | [diff] [blame] | 146 | free(emu_data->emu_persistent_image); |
Edward O'Callaghan | 9425022 | 2021-05-20 20:34:02 +1000 | [diff] [blame] | 147 | free(emu_data->flashchip_contents); |
David Hendricks | 8bb2021 | 2011-06-14 01:35:36 +0000 | [diff] [blame] | 148 | } |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 149 | free(data); |
David Hendricks | 8bb2021 | 2011-06-14 01:35:36 +0000 | [diff] [blame] | 150 | return 0; |
| 151 | } |
| 152 | |
Anastasia Klimchuk | 3c55c79 | 2021-05-31 09:42:36 +1000 | [diff] [blame] | 153 | static int init_data(struct emu_data *data, enum chipbustype *dummy_buses_supported) |
Carl-Daniel Hailfinger | c312920 | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 154 | { |
Carl-Daniel Hailfinger | 744132a | 2010-07-06 09:55:48 +0000 | [diff] [blame] | 155 | char *bustext = NULL; |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 156 | char *tmp = NULL; |
Nico Huber | 519be66 | 2018-12-23 20:03:35 +0100 | [diff] [blame] | 157 | unsigned int i; |
Anastasia Klimchuk | 3c55c79 | 2021-05-31 09:42:36 +1000 | [diff] [blame] | 158 | char *endptr; |
Stefan Tauner | 5e695ab | 2012-05-06 17:03:40 +0000 | [diff] [blame] | 159 | char *status = NULL; |
Carl-Daniel Hailfinger | 3504b53 | 2009-06-01 00:02:11 +0000 | [diff] [blame] | 160 | |
Carl-Daniel Hailfinger | 2b6dcb3 | 2010-07-08 10:13:37 +0000 | [diff] [blame] | 161 | bustext = extract_programmer_param("bus"); |
Carl-Daniel Hailfinger | 744132a | 2010-07-06 09:55:48 +0000 | [diff] [blame] | 162 | msg_pdbg("Requested buses are: %s\n", bustext ? bustext : "default"); |
| 163 | if (!bustext) |
| 164 | bustext = strdup("parallel+lpc+fwh+spi"); |
Carl-Daniel Hailfinger | 3504b53 | 2009-06-01 00:02:11 +0000 | [diff] [blame] | 165 | /* Convert the parameters to lowercase. */ |
Carl-Daniel Hailfinger | 744132a | 2010-07-06 09:55:48 +0000 | [diff] [blame] | 166 | tolower_string(bustext); |
Carl-Daniel Hailfinger | 3504b53 | 2009-06-01 00:02:11 +0000 | [diff] [blame] | 167 | |
Anastasia Klimchuk | 3c55c79 | 2021-05-31 09:42:36 +1000 | [diff] [blame] | 168 | *dummy_buses_supported = BUS_NONE; |
Carl-Daniel Hailfinger | 744132a | 2010-07-06 09:55:48 +0000 | [diff] [blame] | 169 | if (strstr(bustext, "parallel")) { |
Anastasia Klimchuk | 3c55c79 | 2021-05-31 09:42:36 +1000 | [diff] [blame] | 170 | *dummy_buses_supported |= BUS_PARALLEL; |
Carl-Daniel Hailfinger | 3ac101c | 2010-01-09 04:32:23 +0000 | [diff] [blame] | 171 | msg_pdbg("Enabling support for %s flash.\n", "parallel"); |
Carl-Daniel Hailfinger | 3504b53 | 2009-06-01 00:02:11 +0000 | [diff] [blame] | 172 | } |
Carl-Daniel Hailfinger | 744132a | 2010-07-06 09:55:48 +0000 | [diff] [blame] | 173 | if (strstr(bustext, "lpc")) { |
Anastasia Klimchuk | 3c55c79 | 2021-05-31 09:42:36 +1000 | [diff] [blame] | 174 | *dummy_buses_supported |= BUS_LPC; |
Carl-Daniel Hailfinger | 3ac101c | 2010-01-09 04:32:23 +0000 | [diff] [blame] | 175 | msg_pdbg("Enabling support for %s flash.\n", "LPC"); |
Carl-Daniel Hailfinger | 3504b53 | 2009-06-01 00:02:11 +0000 | [diff] [blame] | 176 | } |
Carl-Daniel Hailfinger | 744132a | 2010-07-06 09:55:48 +0000 | [diff] [blame] | 177 | if (strstr(bustext, "fwh")) { |
Anastasia Klimchuk | 3c55c79 | 2021-05-31 09:42:36 +1000 | [diff] [blame] | 178 | *dummy_buses_supported |= BUS_FWH; |
Carl-Daniel Hailfinger | 3ac101c | 2010-01-09 04:32:23 +0000 | [diff] [blame] | 179 | msg_pdbg("Enabling support for %s flash.\n", "FWH"); |
Carl-Daniel Hailfinger | 3504b53 | 2009-06-01 00:02:11 +0000 | [diff] [blame] | 180 | } |
Carl-Daniel Hailfinger | 744132a | 2010-07-06 09:55:48 +0000 | [diff] [blame] | 181 | if (strstr(bustext, "spi")) { |
Anastasia Klimchuk | 3c55c79 | 2021-05-31 09:42:36 +1000 | [diff] [blame] | 182 | *dummy_buses_supported |= BUS_SPI; |
Carl-Daniel Hailfinger | 3ac101c | 2010-01-09 04:32:23 +0000 | [diff] [blame] | 183 | msg_pdbg("Enabling support for %s flash.\n", "SPI"); |
Carl-Daniel Hailfinger | 3504b53 | 2009-06-01 00:02:11 +0000 | [diff] [blame] | 184 | } |
Anastasia Klimchuk | 3c55c79 | 2021-05-31 09:42:36 +1000 | [diff] [blame] | 185 | if (*dummy_buses_supported == BUS_NONE) |
Carl-Daniel Hailfinger | 3ac101c | 2010-01-09 04:32:23 +0000 | [diff] [blame] | 186 | msg_pdbg("Support for all flash bus types disabled.\n"); |
Carl-Daniel Hailfinger | 744132a | 2010-07-06 09:55:48 +0000 | [diff] [blame] | 187 | free(bustext); |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 188 | |
| 189 | tmp = extract_programmer_param("spi_write_256_chunksize"); |
| 190 | if (tmp) { |
Edward O'Callaghan | c785f88 | 2021-05-23 22:14:36 +1000 | [diff] [blame] | 191 | spi_write_256_chunksize = strtoul(tmp, &endptr, 0); |
| 192 | if (*endptr != '\0' || spi_write_256_chunksize < 1) { |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 193 | msg_perr("invalid spi_write_256_chunksize\n"); |
Edward O'Callaghan | c785f88 | 2021-05-23 22:14:36 +1000 | [diff] [blame] | 194 | free(tmp); |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 195 | return 1; |
| 196 | } |
Edward O'Callaghan | c785f88 | 2021-05-23 22:14:36 +1000 | [diff] [blame] | 197 | free(tmp); |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 198 | } |
| 199 | |
Carl-Daniel Hailfinger | 1b83be5 | 2012-02-08 23:28:54 +0000 | [diff] [blame] | 200 | tmp = extract_programmer_param("spi_blacklist"); |
| 201 | if (tmp) { |
| 202 | i = strlen(tmp); |
| 203 | if (!strncmp(tmp, "0x", 2)) { |
| 204 | i -= 2; |
| 205 | memmove(tmp, tmp + 2, i + 1); |
| 206 | } |
| 207 | if ((i > 512) || (i % 2)) { |
| 208 | msg_perr("Invalid SPI command blacklist length\n"); |
| 209 | free(tmp); |
| 210 | return 1; |
| 211 | } |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 212 | data->spi_blacklist_size = i / 2; |
| 213 | for (i = 0; i < data->spi_blacklist_size * 2; i++) { |
Carl-Daniel Hailfinger | 1b83be5 | 2012-02-08 23:28:54 +0000 | [diff] [blame] | 214 | if (!isxdigit((unsigned char)tmp[i])) { |
| 215 | msg_perr("Invalid char \"%c\" in SPI command " |
| 216 | "blacklist\n", tmp[i]); |
| 217 | free(tmp); |
| 218 | return 1; |
| 219 | } |
| 220 | } |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 221 | for (i = 0; i < data->spi_blacklist_size; i++) { |
Carl-Daniel Hailfinger | 5b55471 | 2012-02-16 01:43:06 +0000 | [diff] [blame] | 222 | unsigned int tmp2; |
| 223 | /* SCNx8 is apparently not supported by MSVC (and thus |
| 224 | * MinGW), so work around it with an extra variable |
| 225 | */ |
| 226 | sscanf(tmp + i * 2, "%2x", &tmp2); |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 227 | data->spi_blacklist[i] = (uint8_t)tmp2; |
Carl-Daniel Hailfinger | 1b83be5 | 2012-02-08 23:28:54 +0000 | [diff] [blame] | 228 | } |
| 229 | msg_pdbg("SPI blacklist is "); |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 230 | for (i = 0; i < data->spi_blacklist_size; i++) |
| 231 | msg_pdbg("%02x ", data->spi_blacklist[i]); |
| 232 | msg_pdbg(", size %u\n", data->spi_blacklist_size); |
Carl-Daniel Hailfinger | 1b83be5 | 2012-02-08 23:28:54 +0000 | [diff] [blame] | 233 | } |
| 234 | free(tmp); |
| 235 | |
| 236 | tmp = extract_programmer_param("spi_ignorelist"); |
| 237 | if (tmp) { |
| 238 | i = strlen(tmp); |
| 239 | if (!strncmp(tmp, "0x", 2)) { |
| 240 | i -= 2; |
| 241 | memmove(tmp, tmp + 2, i + 1); |
| 242 | } |
| 243 | if ((i > 512) || (i % 2)) { |
| 244 | msg_perr("Invalid SPI command ignorelist length\n"); |
| 245 | free(tmp); |
| 246 | return 1; |
| 247 | } |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 248 | data->spi_ignorelist_size = i / 2; |
| 249 | for (i = 0; i < data->spi_ignorelist_size * 2; i++) { |
Carl-Daniel Hailfinger | 1b83be5 | 2012-02-08 23:28:54 +0000 | [diff] [blame] | 250 | if (!isxdigit((unsigned char)tmp[i])) { |
| 251 | msg_perr("Invalid char \"%c\" in SPI command " |
| 252 | "ignorelist\n", tmp[i]); |
| 253 | free(tmp); |
| 254 | return 1; |
| 255 | } |
| 256 | } |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 257 | for (i = 0; i < data->spi_ignorelist_size; i++) { |
Carl-Daniel Hailfinger | 5b55471 | 2012-02-16 01:43:06 +0000 | [diff] [blame] | 258 | unsigned int tmp2; |
| 259 | /* SCNx8 is apparently not supported by MSVC (and thus |
| 260 | * MinGW), so work around it with an extra variable |
| 261 | */ |
| 262 | sscanf(tmp + i * 2, "%2x", &tmp2); |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 263 | data->spi_ignorelist[i] = (uint8_t)tmp2; |
Carl-Daniel Hailfinger | 1b83be5 | 2012-02-08 23:28:54 +0000 | [diff] [blame] | 264 | } |
| 265 | msg_pdbg("SPI ignorelist is "); |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 266 | for (i = 0; i < data->spi_ignorelist_size; i++) |
| 267 | msg_pdbg("%02x ", data->spi_ignorelist[i]); |
| 268 | msg_pdbg(", size %u\n", data->spi_ignorelist_size); |
Carl-Daniel Hailfinger | 1b83be5 | 2012-02-08 23:28:54 +0000 | [diff] [blame] | 269 | } |
| 270 | free(tmp); |
| 271 | |
Sergii Dmytruk | 2fc70dc | 2021-11-08 01:38:52 +0200 | [diff] [blame] | 272 | tmp = extract_programmer_param("hwwp"); |
| 273 | if (tmp) { |
| 274 | if (!strcmp(tmp, "yes")) { |
| 275 | msg_pdbg("Emulated chip will have hardware WP enabled\n"); |
| 276 | data->hwwp = true; |
| 277 | } else if (!strcmp(tmp, "no")) { |
| 278 | msg_pdbg("Emulated chip will have hardware WP disabled\n"); |
| 279 | } else { |
| 280 | msg_perr("hwwp can be \"yes\" or \"no\"\n"); |
| 281 | free(tmp); |
| 282 | return 1; |
| 283 | } |
| 284 | free(tmp); |
| 285 | } |
| 286 | |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 287 | tmp = extract_programmer_param("emulate"); |
| 288 | if (!tmp) { |
| 289 | msg_pdbg("Not emulating any flash chip.\n"); |
| 290 | /* Nothing else to do. */ |
Anastasia Klimchuk | 3c55c79 | 2021-05-31 09:42:36 +1000 | [diff] [blame] | 291 | return 0; |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 292 | } |
Anastasia Klimchuk | 3c55c79 | 2021-05-31 09:42:36 +1000 | [diff] [blame] | 293 | |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 294 | if (!strcmp(tmp, "M25P10.RES")) { |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 295 | data->emu_chip = EMULATE_ST_M25P10_RES; |
| 296 | data->emu_chip_size = 128 * 1024; |
| 297 | data->emu_max_byteprogram_size = 128; |
| 298 | data->emu_max_aai_size = 0; |
Sergii Dmytruk | 59151a4 | 2021-11-08 00:05:12 +0200 | [diff] [blame] | 299 | data->emu_status_len = 1; |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 300 | data->emu_jedec_se_size = 0; |
| 301 | data->emu_jedec_be_52_size = 0; |
| 302 | data->emu_jedec_be_d8_size = 32 * 1024; |
| 303 | data->emu_jedec_ce_60_size = 0; |
| 304 | data->emu_jedec_ce_c7_size = data->emu_chip_size; |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 305 | msg_pdbg("Emulating ST M25P10.RES SPI flash chip (RES, page " |
| 306 | "write)\n"); |
| 307 | } |
| 308 | if (!strcmp(tmp, "SST25VF040.REMS")) { |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 309 | data->emu_chip = EMULATE_SST_SST25VF040_REMS; |
| 310 | data->emu_chip_size = 512 * 1024; |
| 311 | data->emu_max_byteprogram_size = 1; |
| 312 | data->emu_max_aai_size = 0; |
Sergii Dmytruk | 59151a4 | 2021-11-08 00:05:12 +0200 | [diff] [blame] | 313 | data->emu_status_len = 1; |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 314 | data->emu_jedec_se_size = 4 * 1024; |
| 315 | data->emu_jedec_be_52_size = 32 * 1024; |
| 316 | data->emu_jedec_be_d8_size = 0; |
| 317 | data->emu_jedec_ce_60_size = data->emu_chip_size; |
| 318 | data->emu_jedec_ce_c7_size = 0; |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 319 | msg_pdbg("Emulating SST SST25VF040.REMS SPI flash chip (REMS, " |
| 320 | "byte write)\n"); |
| 321 | } |
| 322 | if (!strcmp(tmp, "SST25VF032B")) { |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 323 | data->emu_chip = EMULATE_SST_SST25VF032B; |
| 324 | data->emu_chip_size = 4 * 1024 * 1024; |
| 325 | data->emu_max_byteprogram_size = 1; |
| 326 | data->emu_max_aai_size = 2; |
Sergii Dmytruk | 59151a4 | 2021-11-08 00:05:12 +0200 | [diff] [blame] | 327 | data->emu_status_len = 1; |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 328 | data->emu_jedec_se_size = 4 * 1024; |
| 329 | data->emu_jedec_be_52_size = 32 * 1024; |
| 330 | data->emu_jedec_be_d8_size = 64 * 1024; |
| 331 | data->emu_jedec_ce_60_size = data->emu_chip_size; |
| 332 | data->emu_jedec_ce_c7_size = data->emu_chip_size; |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 333 | msg_pdbg("Emulating SST SST25VF032B SPI flash chip (RDID, AAI " |
| 334 | "write)\n"); |
| 335 | } |
Stefan Tauner | 0b9df97 | 2012-05-07 22:12:16 +0000 | [diff] [blame] | 336 | if (!strcmp(tmp, "MX25L6436")) { |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 337 | data->emu_chip = EMULATE_MACRONIX_MX25L6436; |
| 338 | data->emu_chip_size = 8 * 1024 * 1024; |
| 339 | data->emu_max_byteprogram_size = 256; |
| 340 | data->emu_max_aai_size = 0; |
Sergii Dmytruk | 59151a4 | 2021-11-08 00:05:12 +0200 | [diff] [blame] | 341 | data->emu_status_len = 1; |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 342 | data->emu_jedec_se_size = 4 * 1024; |
| 343 | data->emu_jedec_be_52_size = 32 * 1024; |
| 344 | data->emu_jedec_be_d8_size = 64 * 1024; |
| 345 | data->emu_jedec_ce_60_size = data->emu_chip_size; |
| 346 | data->emu_jedec_ce_c7_size = data->emu_chip_size; |
Stefan Tauner | 0b9df97 | 2012-05-07 22:12:16 +0000 | [diff] [blame] | 347 | msg_pdbg("Emulating Macronix MX25L6436 SPI flash chip (RDID, " |
| 348 | "SFDP)\n"); |
| 349 | } |
Nico Huber | f9632d8 | 2019-01-20 11:23:49 +0100 | [diff] [blame] | 350 | if (!strcmp(tmp, "W25Q128FV")) { |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 351 | data->emu_chip = EMULATE_WINBOND_W25Q128FV; |
Sergii Dmytruk | 27835ea | 2021-11-08 00:06:33 +0200 | [diff] [blame] | 352 | data->emu_wrsr_ext = true; |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 353 | data->emu_chip_size = 16 * 1024 * 1024; |
| 354 | data->emu_max_byteprogram_size = 256; |
| 355 | data->emu_max_aai_size = 0; |
Sergii Dmytruk | 27835ea | 2021-11-08 00:06:33 +0200 | [diff] [blame] | 356 | data->emu_status_len = 3; |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 357 | data->emu_jedec_se_size = 4 * 1024; |
| 358 | data->emu_jedec_be_52_size = 32 * 1024; |
| 359 | data->emu_jedec_be_d8_size = 64 * 1024; |
| 360 | data->emu_jedec_ce_60_size = data->emu_chip_size; |
| 361 | data->emu_jedec_ce_c7_size = data->emu_chip_size; |
Nico Huber | f9632d8 | 2019-01-20 11:23:49 +0100 | [diff] [blame] | 362 | msg_pdbg("Emulating Winbond W25Q128FV SPI flash chip (RDID)\n"); |
| 363 | } |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 364 | if (data->emu_chip == EMULATE_NONE) { |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 365 | msg_perr("Invalid chip specified for emulation: %s\n", tmp); |
| 366 | free(tmp); |
| 367 | return 1; |
| 368 | } |
| 369 | free(tmp); |
David Hendricks | 8bb2021 | 2011-06-14 01:35:36 +0000 | [diff] [blame] | 370 | |
Stefan Tauner | 5e695ab | 2012-05-06 17:03:40 +0000 | [diff] [blame] | 371 | status = extract_programmer_param("spi_status"); |
| 372 | if (status) { |
Sergii Dmytruk | 59151a4 | 2021-11-08 00:05:12 +0200 | [diff] [blame] | 373 | unsigned int emu_status; |
| 374 | |
Stefan Tauner | 5e695ab | 2012-05-06 17:03:40 +0000 | [diff] [blame] | 375 | errno = 0; |
Sergii Dmytruk | 59151a4 | 2021-11-08 00:05:12 +0200 | [diff] [blame] | 376 | emu_status = strtoul(status, &endptr, 0); |
Stefan Tauner | 5e695ab | 2012-05-06 17:03:40 +0000 | [diff] [blame] | 377 | if (errno != 0 || status == endptr) { |
Angel Pons | c248464 | 2021-05-25 13:03:24 +0200 | [diff] [blame] | 378 | free(status); |
Stefan Tauner | 5e695ab | 2012-05-06 17:03:40 +0000 | [diff] [blame] | 379 | msg_perr("Error: initial status register specified, " |
| 380 | "but the value could not be converted.\n"); |
| 381 | return 1; |
| 382 | } |
Angel Pons | c248464 | 2021-05-25 13:03:24 +0200 | [diff] [blame] | 383 | free(status); |
Sergii Dmytruk | 59151a4 | 2021-11-08 00:05:12 +0200 | [diff] [blame] | 384 | |
| 385 | data->emu_status[0] = emu_status; |
| 386 | data->emu_status[1] = emu_status >> 8; |
| 387 | data->emu_status[2] = emu_status >> 16; |
| 388 | |
| 389 | if (data->emu_status_len == 3) { |
| 390 | msg_pdbg("Initial status registers:\n" |
| 391 | "\tSR1 is set to 0x%02x\n" |
| 392 | "\tSR2 is set to 0x%02x\n" |
| 393 | "\tSR3 is set to 0x%02x\n", |
| 394 | data->emu_status[0], data->emu_status[1], data->emu_status[2]); |
| 395 | } else if (data->emu_status_len == 2) { |
| 396 | msg_pdbg("Initial status registers:\n" |
| 397 | "\tSR1 is set to 0x%02x\n" |
| 398 | "\tSR2 is set to 0x%02x\n", |
| 399 | data->emu_status[0], data->emu_status[1]); |
| 400 | } else { |
| 401 | msg_pdbg("Initial status register is set to 0x%02x.\n", |
| 402 | data->emu_status[0]); |
| 403 | } |
Stefan Tauner | 5e695ab | 2012-05-06 17:03:40 +0000 | [diff] [blame] | 404 | } |
Stefan Tauner | 5e695ab | 2012-05-06 17:03:40 +0000 | [diff] [blame] | 405 | |
Angel Pons | 328898a | 2021-05-25 12:56:18 +0200 | [diff] [blame] | 406 | data->flashchip_contents = malloc(data->emu_chip_size); |
| 407 | if (!data->flashchip_contents) { |
| 408 | msg_perr("Out of memory!\n"); |
| 409 | return 1; |
| 410 | } |
| 411 | |
Anastasia Klimchuk | 3c55c79 | 2021-05-31 09:42:36 +1000 | [diff] [blame] | 412 | |
| 413 | return 0; |
| 414 | } |
| 415 | |
Thomas Heijligen | cc853d8 | 2021-05-04 15:32:17 +0200 | [diff] [blame] | 416 | static int dummy_init(void) |
Anastasia Klimchuk | 3c55c79 | 2021-05-31 09:42:36 +1000 | [diff] [blame] | 417 | { |
Anastasia Klimchuk | 3c55c79 | 2021-05-31 09:42:36 +1000 | [diff] [blame] | 418 | struct stat image_stat; |
Anastasia Klimchuk | 3c55c79 | 2021-05-31 09:42:36 +1000 | [diff] [blame] | 419 | |
| 420 | struct emu_data *data = calloc(1, sizeof(struct emu_data)); |
| 421 | if (!data) { |
| 422 | msg_perr("Out of memory!\n"); |
| 423 | return 1; |
| 424 | } |
| 425 | data->emu_chip = EMULATE_NONE; |
| 426 | spi_master_dummyflasher.data = data; |
| 427 | par_master_dummy.data = data; |
| 428 | |
| 429 | msg_pspew("%s\n", __func__); |
| 430 | |
| 431 | enum chipbustype dummy_buses_supported; |
| 432 | if (init_data(data, &dummy_buses_supported)) { |
| 433 | free(data); |
| 434 | return 1; |
| 435 | } |
| 436 | |
Anastasia Klimchuk | 3c55c79 | 2021-05-31 09:42:36 +1000 | [diff] [blame] | 437 | if (data->emu_chip == EMULATE_NONE) { |
| 438 | msg_pdbg("Not emulating any flash chip.\n"); |
| 439 | /* Nothing else to do. */ |
| 440 | goto dummy_init_out; |
| 441 | } |
| 442 | |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 443 | msg_pdbg("Filling fake flash chip with 0xff, size %i\n", data->emu_chip_size); |
Edward O'Callaghan | 9425022 | 2021-05-20 20:34:02 +1000 | [diff] [blame] | 444 | memset(data->flashchip_contents, 0xff, data->emu_chip_size); |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 445 | |
Stefan Tauner | c2eec2c | 2014-05-03 21:33:01 +0000 | [diff] [blame] | 446 | /* Will be freed by shutdown function if necessary. */ |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 447 | data->emu_persistent_image = extract_programmer_param("image"); |
| 448 | if (!data->emu_persistent_image) { |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 449 | /* Nothing else to do. */ |
David Hendricks | 8bb2021 | 2011-06-14 01:35:36 +0000 | [diff] [blame] | 450 | goto dummy_init_out; |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 451 | } |
Stefan Tauner | c2eec2c | 2014-05-03 21:33:01 +0000 | [diff] [blame] | 452 | /* We will silently (in default verbosity) ignore the file if it does not exist (yet) or the size does |
| 453 | * not match the emulated chip. */ |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 454 | if (!stat(data->emu_persistent_image, &image_stat)) { |
Stefan Tauner | 23e10b8 | 2016-01-23 16:16:49 +0000 | [diff] [blame] | 455 | msg_pdbg("Found persistent image %s, %jd B ", |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 456 | data->emu_persistent_image, (intmax_t)image_stat.st_size); |
| 457 | if ((uintmax_t)image_stat.st_size == data->emu_chip_size) { |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 458 | msg_pdbg("matches.\n"); |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 459 | msg_pdbg("Reading %s\n", data->emu_persistent_image); |
Edward O'Callaghan | 9425022 | 2021-05-20 20:34:02 +1000 | [diff] [blame] | 460 | if (read_buf_from_file(data->flashchip_contents, data->emu_chip_size, |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 461 | data->emu_persistent_image)) { |
| 462 | msg_perr("Unable to read %s\n", data->emu_persistent_image); |
Angel Pons | 02b9ae2 | 2021-05-25 12:46:43 +0200 | [diff] [blame] | 463 | free(data->emu_persistent_image); |
Edward O'Callaghan | 9425022 | 2021-05-20 20:34:02 +1000 | [diff] [blame] | 464 | free(data->flashchip_contents); |
Anastasia Klimchuk | 3c55c79 | 2021-05-31 09:42:36 +1000 | [diff] [blame] | 465 | free(data); |
Jacob Garber | ca598da | 2019-08-12 10:44:17 -0600 | [diff] [blame] | 466 | return 1; |
| 467 | } |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 468 | } else { |
| 469 | msg_pdbg("doesn't match.\n"); |
| 470 | } |
| 471 | } |
Carl-Daniel Hailfinger | c312920 | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 472 | |
David Hendricks | 8bb2021 | 2011-06-14 01:35:36 +0000 | [diff] [blame] | 473 | dummy_init_out: |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 474 | if (register_shutdown(dummy_shutdown, data)) { |
Angel Pons | 02b9ae2 | 2021-05-25 12:46:43 +0200 | [diff] [blame] | 475 | free(data->emu_persistent_image); |
Edward O'Callaghan | 9425022 | 2021-05-20 20:34:02 +1000 | [diff] [blame] | 476 | free(data->flashchip_contents); |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 477 | free(data); |
David Hendricks | 8bb2021 | 2011-06-14 01:35:36 +0000 | [diff] [blame] | 478 | return 1; |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 479 | } |
Edward O'Callaghan | 3fa321d | 2021-05-17 20:01:27 +1000 | [diff] [blame] | 480 | if (dummy_buses_supported & BUS_NONSPI) |
Carl-Daniel Hailfinger | a5bcbce | 2014-07-19 22:03:29 +0000 | [diff] [blame] | 481 | register_par_master(&par_master_dummy, |
Edward O'Callaghan | 3fa321d | 2021-05-17 20:01:27 +1000 | [diff] [blame] | 482 | dummy_buses_supported & BUS_NONSPI); |
Carl-Daniel Hailfinger | eaacd2d | 2011-11-09 23:40:00 +0000 | [diff] [blame] | 483 | if (dummy_buses_supported & BUS_SPI) |
Carl-Daniel Hailfinger | a5bcbce | 2014-07-19 22:03:29 +0000 | [diff] [blame] | 484 | register_spi_master(&spi_master_dummyflasher); |
Carl-Daniel Hailfinger | eaacd2d | 2011-11-09 23:40:00 +0000 | [diff] [blame] | 485 | |
Carl-Daniel Hailfinger | c312920 | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 486 | return 0; |
| 487 | } |
| 488 | |
Thomas Heijligen | cc853d8 | 2021-05-04 15:32:17 +0200 | [diff] [blame] | 489 | static void *dummy_map(const char *descr, uintptr_t phys_addr, size_t len) |
Carl-Daniel Hailfinger | 1455b2b | 2009-05-11 14:13:25 +0000 | [diff] [blame] | 490 | { |
Stefan Tauner | c2eec2c | 2014-05-03 21:33:01 +0000 | [diff] [blame] | 491 | msg_pspew("%s: Mapping %s, 0x%zx bytes at 0x%0*" PRIxPTR "\n", |
Stefan Tauner | 0554ca5 | 2013-07-25 22:54:25 +0000 | [diff] [blame] | 492 | __func__, descr, len, PRIxPTR_WIDTH, phys_addr); |
Carl-Daniel Hailfinger | 1455b2b | 2009-05-11 14:13:25 +0000 | [diff] [blame] | 493 | return (void *)phys_addr; |
| 494 | } |
| 495 | |
Thomas Heijligen | cc853d8 | 2021-05-04 15:32:17 +0200 | [diff] [blame] | 496 | static void dummy_unmap(void *virt_addr, size_t len) |
Carl-Daniel Hailfinger | 1455b2b | 2009-05-11 14:13:25 +0000 | [diff] [blame] | 497 | { |
Stefan Tauner | 0554ca5 | 2013-07-25 22:54:25 +0000 | [diff] [blame] | 498 | msg_pspew("%s: Unmapping 0x%zx bytes at %p\n", __func__, len, virt_addr); |
Carl-Daniel Hailfinger | 1455b2b | 2009-05-11 14:13:25 +0000 | [diff] [blame] | 499 | } |
| 500 | |
Mark Marshall | f20b7be | 2014-05-09 21:16:21 +0000 | [diff] [blame] | 501 | static void dummy_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr) |
Carl-Daniel Hailfinger | c312920 | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 502 | { |
Stefan Tauner | c233375 | 2013-07-13 23:31:37 +0000 | [diff] [blame] | 503 | msg_pspew("%s: addr=0x%" PRIxPTR ", val=0x%02x\n", __func__, addr, val); |
Carl-Daniel Hailfinger | c312920 | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 504 | } |
| 505 | |
Mark Marshall | f20b7be | 2014-05-09 21:16:21 +0000 | [diff] [blame] | 506 | static void dummy_chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr) |
Carl-Daniel Hailfinger | c312920 | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 507 | { |
Stefan Tauner | c233375 | 2013-07-13 23:31:37 +0000 | [diff] [blame] | 508 | msg_pspew("%s: addr=0x%" PRIxPTR ", val=0x%04x\n", __func__, addr, val); |
Carl-Daniel Hailfinger | c312920 | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 509 | } |
| 510 | |
Mark Marshall | f20b7be | 2014-05-09 21:16:21 +0000 | [diff] [blame] | 511 | static void dummy_chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr) |
Carl-Daniel Hailfinger | c312920 | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 512 | { |
Stefan Tauner | c233375 | 2013-07-13 23:31:37 +0000 | [diff] [blame] | 513 | msg_pspew("%s: addr=0x%" PRIxPTR ", val=0x%08x\n", __func__, addr, val); |
Carl-Daniel Hailfinger | c312920 | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 514 | } |
| 515 | |
Mark Marshall | f20b7be | 2014-05-09 21:16:21 +0000 | [diff] [blame] | 516 | static void dummy_chip_writen(const struct flashctx *flash, const uint8_t *buf, chipaddr addr, size_t len) |
Carl-Daniel Hailfinger | 0bd2a2b | 2009-06-05 18:32:07 +0000 | [diff] [blame] | 517 | { |
| 518 | size_t i; |
Stefan Tauner | 0554ca5 | 2013-07-25 22:54:25 +0000 | [diff] [blame] | 519 | msg_pspew("%s: addr=0x%" PRIxPTR ", len=0x%zx, writing data (hex):", __func__, addr, len); |
Carl-Daniel Hailfinger | 0bd2a2b | 2009-06-05 18:32:07 +0000 | [diff] [blame] | 520 | for (i = 0; i < len; i++) { |
| 521 | if ((i % 16) == 0) |
Carl-Daniel Hailfinger | 3ac101c | 2010-01-09 04:32:23 +0000 | [diff] [blame] | 522 | msg_pspew("\n"); |
| 523 | msg_pspew("%02x ", buf[i]); |
Carl-Daniel Hailfinger | 0bd2a2b | 2009-06-05 18:32:07 +0000 | [diff] [blame] | 524 | } |
| 525 | } |
| 526 | |
Mark Marshall | f20b7be | 2014-05-09 21:16:21 +0000 | [diff] [blame] | 527 | static uint8_t dummy_chip_readb(const struct flashctx *flash, const chipaddr addr) |
Carl-Daniel Hailfinger | c312920 | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 528 | { |
Stefan Tauner | c233375 | 2013-07-13 23:31:37 +0000 | [diff] [blame] | 529 | msg_pspew("%s: addr=0x%" PRIxPTR ", returning 0xff\n", __func__, addr); |
Carl-Daniel Hailfinger | c312920 | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 530 | return 0xff; |
| 531 | } |
| 532 | |
Mark Marshall | f20b7be | 2014-05-09 21:16:21 +0000 | [diff] [blame] | 533 | static uint16_t dummy_chip_readw(const struct flashctx *flash, const chipaddr addr) |
Carl-Daniel Hailfinger | c312920 | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 534 | { |
Stefan Tauner | c233375 | 2013-07-13 23:31:37 +0000 | [diff] [blame] | 535 | msg_pspew("%s: addr=0x%" PRIxPTR ", returning 0xffff\n", __func__, addr); |
Carl-Daniel Hailfinger | c312920 | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 536 | return 0xffff; |
| 537 | } |
| 538 | |
Mark Marshall | f20b7be | 2014-05-09 21:16:21 +0000 | [diff] [blame] | 539 | static uint32_t dummy_chip_readl(const struct flashctx *flash, const chipaddr addr) |
Carl-Daniel Hailfinger | c312920 | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 540 | { |
Stefan Tauner | c233375 | 2013-07-13 23:31:37 +0000 | [diff] [blame] | 541 | msg_pspew("%s: addr=0x%" PRIxPTR ", returning 0xffffffff\n", __func__, addr); |
Carl-Daniel Hailfinger | c312920 | 2009-05-09 00:54:55 +0000 | [diff] [blame] | 542 | return 0xffffffff; |
| 543 | } |
| 544 | |
Mark Marshall | f20b7be | 2014-05-09 21:16:21 +0000 | [diff] [blame] | 545 | static void dummy_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len) |
Carl-Daniel Hailfinger | 0bd2a2b | 2009-06-05 18:32:07 +0000 | [diff] [blame] | 546 | { |
Stefan Tauner | 0554ca5 | 2013-07-25 22:54:25 +0000 | [diff] [blame] | 547 | msg_pspew("%s: addr=0x%" PRIxPTR ", len=0x%zx, returning array of 0xff\n", __func__, addr, len); |
Carl-Daniel Hailfinger | 0bd2a2b | 2009-06-05 18:32:07 +0000 | [diff] [blame] | 548 | memset(buf, 0xff, len); |
| 549 | return; |
| 550 | } |
| 551 | |
Sergii Dmytruk | 27835ea | 2021-11-08 00:06:33 +0200 | [diff] [blame] | 552 | static uint8_t get_reg_ro_bit_mask(const struct emu_data *data, enum flash_reg reg) |
Sergii Dmytruk | 59151a4 | 2021-11-08 00:05:12 +0200 | [diff] [blame] | 553 | { |
| 554 | /* Whoever adds a new register must not forget to update this function |
| 555 | or at least shouldn't use it incorrectly. */ |
| 556 | assert(reg == STATUS1 || reg == STATUS2 || reg == STATUS3); |
| 557 | |
Sergii Dmytruk | 27835ea | 2021-11-08 00:06:33 +0200 | [diff] [blame] | 558 | uint8_t ro_bits = reg == STATUS1 ? SPI_SR_WIP : 0; |
| 559 | |
| 560 | if (data->emu_chip == EMULATE_WINBOND_W25Q128FV) { |
Sergii Dmytruk | 2fc70dc | 2021-11-08 01:38:52 +0200 | [diff] [blame] | 561 | const bool srp0 = (data->emu_status[0] >> 7); |
| 562 | const bool srp1 = (data->emu_status[1] & 1); |
| 563 | |
| 564 | const bool wp_active = (srp1 || (srp0 && data->hwwp)); |
| 565 | |
| 566 | if (wp_active) { |
| 567 | ro_bits = 0xff; |
| 568 | } else if (reg == STATUS2) { |
Sergii Dmytruk | 27835ea | 2021-11-08 00:06:33 +0200 | [diff] [blame] | 569 | /* SUS (bit_7) and (R) (bit_2). */ |
| 570 | ro_bits = 0x84; |
| 571 | /* Once any of the lock bits (LB[1..3]) are set, they |
| 572 | can't be unset. */ |
| 573 | ro_bits |= data->emu_status[1] & (1 << 3); |
| 574 | ro_bits |= data->emu_status[1] & (1 << 4); |
| 575 | ro_bits |= data->emu_status[1] & (1 << 5); |
| 576 | } else if (reg == STATUS3) { |
| 577 | /* Four reserved bits. */ |
| 578 | ro_bits = 0x1b; |
| 579 | } |
| 580 | } |
| 581 | |
| 582 | return ro_bits; |
Sergii Dmytruk | 59151a4 | 2021-11-08 00:05:12 +0200 | [diff] [blame] | 583 | } |
| 584 | |
Sergii Dmytruk | 2fc70dc | 2021-11-08 01:38:52 +0200 | [diff] [blame] | 585 | static void update_write_protection(struct emu_data *data) |
| 586 | { |
| 587 | if (data->emu_chip != EMULATE_WINBOND_W25Q128FV) |
| 588 | return; |
| 589 | |
| 590 | const struct wp_bits bits = { |
| 591 | .srp = data->emu_status[0] >> 7, |
| 592 | .srl = data->emu_status[1] & 1, |
| 593 | |
| 594 | .bp_bit_count = 3, |
| 595 | .bp = |
| 596 | { |
| 597 | (data->emu_status[0] >> 2) & 1, |
| 598 | (data->emu_status[0] >> 3) & 1, |
| 599 | (data->emu_status[0] >> 4) & 1 |
| 600 | }, |
| 601 | |
| 602 | .tb_bit_present = true, |
| 603 | .tb = (data->emu_status[0] >> 5) & 1, |
| 604 | |
| 605 | .sec_bit_present = true, |
| 606 | .sec = (data->emu_status[0] >> 6) & 1, |
| 607 | |
| 608 | .cmp_bit_present = true, |
| 609 | .cmp = (data->emu_status[1] >> 6) & 1, |
| 610 | }; |
| 611 | |
| 612 | size_t start; |
| 613 | size_t len; |
| 614 | decode_range_spi25(&start, &len, &bits, data->emu_chip_size); |
| 615 | |
| 616 | data->wp_start = start; |
| 617 | data->wp_end = start + len; |
| 618 | } |
| 619 | |
| 620 | /* Checks whether range intersects a write-protected area of the flash if one is |
| 621 | * defined. */ |
| 622 | static bool is_write_protected(const struct emu_data *data, uint32_t start, uint32_t len) |
| 623 | { |
| 624 | if (len == 0) |
| 625 | return false; |
| 626 | |
| 627 | const uint32_t last = start + len - 1; |
| 628 | return (start < data->wp_end && last >= data->wp_start); |
| 629 | } |
| 630 | |
| 631 | /* Returns non-zero on error. */ |
| 632 | static int write_flash_data(struct emu_data *data, uint32_t start, uint32_t len, const uint8_t *buf) |
| 633 | { |
| 634 | if (is_write_protected(data, start, len)) { |
| 635 | msg_perr("At least part of the write range is write protected!\n"); |
| 636 | return 1; |
| 637 | } |
| 638 | |
| 639 | memcpy(data->flashchip_contents + start, buf, len); |
| 640 | data->emu_modified = 1; |
| 641 | return 0; |
| 642 | } |
| 643 | |
| 644 | /* Returns non-zero on error. */ |
| 645 | static int erase_flash_data(struct emu_data *data, uint32_t start, uint32_t len) |
| 646 | { |
| 647 | if (is_write_protected(data, start, len)) { |
| 648 | msg_perr("At least part of the erase range is write protected!\n"); |
| 649 | return 1; |
| 650 | } |
| 651 | |
| 652 | memset(data->flashchip_contents + start, 0xff, len); |
| 653 | data->emu_modified = 1; |
| 654 | return 0; |
| 655 | } |
| 656 | |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 657 | static int emulate_spi_chip_response(unsigned int writecnt, |
| 658 | unsigned int readcnt, |
| 659 | const unsigned char *writearr, |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 660 | unsigned char *readarr, |
| 661 | struct emu_data *data) |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 662 | { |
Stefan Tauner | 0b9df97 | 2012-05-07 22:12:16 +0000 | [diff] [blame] | 663 | unsigned int offs, i, toread; |
Sergii Dmytruk | 59151a4 | 2021-11-08 00:05:12 +0200 | [diff] [blame] | 664 | uint8_t ro_bits; |
| 665 | bool wrsr_ext; |
Stefan Tauner | c69c9c8 | 2011-11-23 09:13:48 +0000 | [diff] [blame] | 666 | static int unsigned aai_offs; |
Carl-Daniel Hailfinger | af2cac0 | 2012-08-30 21:41:00 +0000 | [diff] [blame] | 667 | const unsigned char sst25vf040_rems_response[2] = {0xbf, 0x44}; |
| 668 | const unsigned char sst25vf032b_rems_response[2] = {0xbf, 0x4a}; |
| 669 | const unsigned char mx25l6436_rems_response[2] = {0xc2, 0x16}; |
Nico Huber | f9632d8 | 2019-01-20 11:23:49 +0100 | [diff] [blame] | 670 | const unsigned char w25q128fv_rems_response[2] = {0xef, 0x17}; |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 671 | |
| 672 | if (writecnt == 0) { |
| 673 | msg_perr("No command sent to the chip!\n"); |
| 674 | return 1; |
| 675 | } |
Paul Menzel | ac427b2 | 2012-02-16 21:07:07 +0000 | [diff] [blame] | 676 | /* spi_blacklist has precedence over spi_ignorelist. */ |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 677 | for (i = 0; i < data->spi_blacklist_size; i++) { |
| 678 | if (writearr[0] == data->spi_blacklist[i]) { |
Carl-Daniel Hailfinger | 1b83be5 | 2012-02-08 23:28:54 +0000 | [diff] [blame] | 679 | msg_pdbg("Refusing blacklisted SPI command 0x%02x\n", |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 680 | data->spi_blacklist[i]); |
Carl-Daniel Hailfinger | 1b83be5 | 2012-02-08 23:28:54 +0000 | [diff] [blame] | 681 | return SPI_INVALID_OPCODE; |
| 682 | } |
| 683 | } |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 684 | for (i = 0; i < data->spi_ignorelist_size; i++) { |
| 685 | if (writearr[0] == data->spi_ignorelist[i]) { |
Carl-Daniel Hailfinger | 1b83be5 | 2012-02-08 23:28:54 +0000 | [diff] [blame] | 686 | msg_cdbg("Ignoring ignorelisted SPI command 0x%02x\n", |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 687 | data->spi_ignorelist[i]); |
Carl-Daniel Hailfinger | 1b83be5 | 2012-02-08 23:28:54 +0000 | [diff] [blame] | 688 | /* Return success because the command does not fail, |
| 689 | * it is simply ignored. |
| 690 | */ |
| 691 | return 0; |
| 692 | } |
| 693 | } |
Stefan Tauner | 5e695ab | 2012-05-06 17:03:40 +0000 | [diff] [blame] | 694 | |
Sergii Dmytruk | 59151a4 | 2021-11-08 00:05:12 +0200 | [diff] [blame] | 695 | if (data->emu_max_aai_size && (data->emu_status[0] & SPI_SR_AAI)) { |
Stefan Tauner | 5e695ab | 2012-05-06 17:03:40 +0000 | [diff] [blame] | 696 | if (writearr[0] != JEDEC_AAI_WORD_PROGRAM && |
| 697 | writearr[0] != JEDEC_WRDI && |
| 698 | writearr[0] != JEDEC_RDSR) { |
| 699 | msg_perr("Forbidden opcode (0x%02x) attempted during " |
| 700 | "AAI sequence!\n", writearr[0]); |
| 701 | return 0; |
| 702 | } |
| 703 | } |
| 704 | |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 705 | switch (writearr[0]) { |
| 706 | case JEDEC_RES: |
Carl-Daniel Hailfinger | af2cac0 | 2012-08-30 21:41:00 +0000 | [diff] [blame] | 707 | if (writecnt < JEDEC_RES_OUTSIZE) |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 708 | break; |
Carl-Daniel Hailfinger | af2cac0 | 2012-08-30 21:41:00 +0000 | [diff] [blame] | 709 | /* offs calculation is only needed for SST chips which treat RES like REMS. */ |
| 710 | offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; |
| 711 | offs += writecnt - JEDEC_REMS_OUTSIZE; |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 712 | switch (data->emu_chip) { |
Carl-Daniel Hailfinger | af2cac0 | 2012-08-30 21:41:00 +0000 | [diff] [blame] | 713 | case EMULATE_ST_M25P10_RES: |
| 714 | if (readcnt > 0) |
| 715 | memset(readarr, 0x10, readcnt); |
| 716 | break; |
| 717 | case EMULATE_SST_SST25VF040_REMS: |
| 718 | for (i = 0; i < readcnt; i++) |
| 719 | readarr[i] = sst25vf040_rems_response[(offs + i) % 2]; |
| 720 | break; |
| 721 | case EMULATE_SST_SST25VF032B: |
| 722 | for (i = 0; i < readcnt; i++) |
| 723 | readarr[i] = sst25vf032b_rems_response[(offs + i) % 2]; |
| 724 | break; |
| 725 | case EMULATE_MACRONIX_MX25L6436: |
| 726 | if (readcnt > 0) |
| 727 | memset(readarr, 0x16, readcnt); |
| 728 | break; |
Nico Huber | f9632d8 | 2019-01-20 11:23:49 +0100 | [diff] [blame] | 729 | case EMULATE_WINBOND_W25Q128FV: |
| 730 | if (readcnt > 0) |
| 731 | memset(readarr, 0x17, readcnt); |
| 732 | break; |
Carl-Daniel Hailfinger | af2cac0 | 2012-08-30 21:41:00 +0000 | [diff] [blame] | 733 | default: /* ignore */ |
| 734 | break; |
| 735 | } |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 736 | break; |
| 737 | case JEDEC_REMS: |
Carl-Daniel Hailfinger | af2cac0 | 2012-08-30 21:41:00 +0000 | [diff] [blame] | 738 | /* REMS response has wraparound and uses an address parameter. */ |
| 739 | if (writecnt < JEDEC_REMS_OUTSIZE) |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 740 | break; |
Carl-Daniel Hailfinger | af2cac0 | 2012-08-30 21:41:00 +0000 | [diff] [blame] | 741 | offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; |
| 742 | offs += writecnt - JEDEC_REMS_OUTSIZE; |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 743 | switch (data->emu_chip) { |
Carl-Daniel Hailfinger | af2cac0 | 2012-08-30 21:41:00 +0000 | [diff] [blame] | 744 | case EMULATE_SST_SST25VF040_REMS: |
| 745 | for (i = 0; i < readcnt; i++) |
| 746 | readarr[i] = sst25vf040_rems_response[(offs + i) % 2]; |
| 747 | break; |
| 748 | case EMULATE_SST_SST25VF032B: |
| 749 | for (i = 0; i < readcnt; i++) |
| 750 | readarr[i] = sst25vf032b_rems_response[(offs + i) % 2]; |
| 751 | break; |
| 752 | case EMULATE_MACRONIX_MX25L6436: |
| 753 | for (i = 0; i < readcnt; i++) |
| 754 | readarr[i] = mx25l6436_rems_response[(offs + i) % 2]; |
| 755 | break; |
Nico Huber | f9632d8 | 2019-01-20 11:23:49 +0100 | [diff] [blame] | 756 | case EMULATE_WINBOND_W25Q128FV: |
| 757 | for (i = 0; i < readcnt; i++) |
| 758 | readarr[i] = w25q128fv_rems_response[(offs + i) % 2]; |
| 759 | break; |
Carl-Daniel Hailfinger | af2cac0 | 2012-08-30 21:41:00 +0000 | [diff] [blame] | 760 | default: /* ignore */ |
| 761 | break; |
| 762 | } |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 763 | break; |
| 764 | case JEDEC_RDID: |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 765 | switch (data->emu_chip) { |
Stefan Tauner | 0b9df97 | 2012-05-07 22:12:16 +0000 | [diff] [blame] | 766 | case EMULATE_SST_SST25VF032B: |
| 767 | if (readcnt > 0) |
| 768 | readarr[0] = 0xbf; |
| 769 | if (readcnt > 1) |
| 770 | readarr[1] = 0x25; |
| 771 | if (readcnt > 2) |
| 772 | readarr[2] = 0x4a; |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 773 | break; |
Stefan Tauner | 0b9df97 | 2012-05-07 22:12:16 +0000 | [diff] [blame] | 774 | case EMULATE_MACRONIX_MX25L6436: |
| 775 | if (readcnt > 0) |
| 776 | readarr[0] = 0xc2; |
| 777 | if (readcnt > 1) |
| 778 | readarr[1] = 0x20; |
| 779 | if (readcnt > 2) |
| 780 | readarr[2] = 0x17; |
| 781 | break; |
Nico Huber | f9632d8 | 2019-01-20 11:23:49 +0100 | [diff] [blame] | 782 | case EMULATE_WINBOND_W25Q128FV: |
| 783 | if (readcnt > 0) |
| 784 | readarr[0] = 0xef; |
| 785 | if (readcnt > 1) |
| 786 | readarr[1] = 0x40; |
| 787 | if (readcnt > 2) |
| 788 | readarr[2] = 0x18; |
| 789 | break; |
Stefan Tauner | 0b9df97 | 2012-05-07 22:12:16 +0000 | [diff] [blame] | 790 | default: /* ignore */ |
| 791 | break; |
| 792 | } |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 793 | break; |
Stefan Tauner | 0b9df97 | 2012-05-07 22:12:16 +0000 | [diff] [blame] | 794 | case JEDEC_RDSR: |
Sergii Dmytruk | 59151a4 | 2021-11-08 00:05:12 +0200 | [diff] [blame] | 795 | memset(readarr, data->emu_status[0], readcnt); |
| 796 | break; |
| 797 | case JEDEC_RDSR2: |
| 798 | if (data->emu_status_len >= 2) |
| 799 | memset(readarr, data->emu_status[1], readcnt); |
| 800 | break; |
| 801 | case JEDEC_RDSR3: |
| 802 | if (data->emu_status_len >= 3) |
| 803 | memset(readarr, data->emu_status[2], readcnt); |
Stefan Tauner | 5e695ab | 2012-05-06 17:03:40 +0000 | [diff] [blame] | 804 | break; |
Stefan Tauner | 5e695ab | 2012-05-06 17:03:40 +0000 | [diff] [blame] | 805 | /* FIXME: this should be chip-specific. */ |
| 806 | case JEDEC_EWSR: |
| 807 | case JEDEC_WREN: |
Sergii Dmytruk | 59151a4 | 2021-11-08 00:05:12 +0200 | [diff] [blame] | 808 | data->emu_status[0] |= SPI_SR_WEL; |
Stefan Tauner | 5e695ab | 2012-05-06 17:03:40 +0000 | [diff] [blame] | 809 | break; |
| 810 | case JEDEC_WRSR: |
Sergii Dmytruk | 59151a4 | 2021-11-08 00:05:12 +0200 | [diff] [blame] | 811 | if (!(data->emu_status[0] & SPI_SR_WEL)) { |
Stefan Tauner | 5e695ab | 2012-05-06 17:03:40 +0000 | [diff] [blame] | 812 | msg_perr("WRSR attempted, but WEL is 0!\n"); |
| 813 | break; |
| 814 | } |
Sergii Dmytruk | 59151a4 | 2021-11-08 00:05:12 +0200 | [diff] [blame] | 815 | |
| 816 | wrsr_ext = (writecnt == 3 && data->emu_wrsr_ext); |
| 817 | |
Stefan Tauner | 5e695ab | 2012-05-06 17:03:40 +0000 | [diff] [blame] | 818 | /* FIXME: add some reasonable simulation of the busy flag */ |
Sergii Dmytruk | 59151a4 | 2021-11-08 00:05:12 +0200 | [diff] [blame] | 819 | |
Sergii Dmytruk | 27835ea | 2021-11-08 00:06:33 +0200 | [diff] [blame] | 820 | ro_bits = get_reg_ro_bit_mask(data, STATUS1); |
Sergii Dmytruk | 59151a4 | 2021-11-08 00:05:12 +0200 | [diff] [blame] | 821 | data->emu_status[0] &= ro_bits; |
| 822 | data->emu_status[0] |= writearr[1] & ~ro_bits; |
| 823 | if (wrsr_ext) { |
Sergii Dmytruk | 27835ea | 2021-11-08 00:06:33 +0200 | [diff] [blame] | 824 | ro_bits = get_reg_ro_bit_mask(data, STATUS2); |
Sergii Dmytruk | 59151a4 | 2021-11-08 00:05:12 +0200 | [diff] [blame] | 825 | data->emu_status[1] &= ro_bits; |
| 826 | data->emu_status[1] |= writearr[2] & ~ro_bits; |
| 827 | } |
| 828 | |
| 829 | if (wrsr_ext) |
| 830 | msg_pdbg2("WRSR wrote 0x%02x%02x.\n", data->emu_status[1], data->emu_status[0]); |
| 831 | else |
| 832 | msg_pdbg2("WRSR wrote 0x%02x.\n", data->emu_status[0]); |
Sergii Dmytruk | 2fc70dc | 2021-11-08 01:38:52 +0200 | [diff] [blame] | 833 | |
| 834 | update_write_protection(data); |
Sergii Dmytruk | 59151a4 | 2021-11-08 00:05:12 +0200 | [diff] [blame] | 835 | break; |
| 836 | case JEDEC_WRSR2: |
| 837 | if (data->emu_status_len < 2) |
| 838 | break; |
| 839 | if (!(data->emu_status[0] & SPI_SR_WEL)) { |
| 840 | msg_perr("WRSR2 attempted, but WEL is 0!\n"); |
| 841 | break; |
| 842 | } |
| 843 | |
Sergii Dmytruk | 27835ea | 2021-11-08 00:06:33 +0200 | [diff] [blame] | 844 | ro_bits = get_reg_ro_bit_mask(data, STATUS2); |
Sergii Dmytruk | 59151a4 | 2021-11-08 00:05:12 +0200 | [diff] [blame] | 845 | data->emu_status[1] &= ro_bits; |
| 846 | data->emu_status[1] |= (writearr[1] & ~ro_bits); |
| 847 | |
| 848 | msg_pdbg2("WRSR2 wrote 0x%02x.\n", data->emu_status[1]); |
Sergii Dmytruk | 2fc70dc | 2021-11-08 01:38:52 +0200 | [diff] [blame] | 849 | |
| 850 | update_write_protection(data); |
Sergii Dmytruk | 59151a4 | 2021-11-08 00:05:12 +0200 | [diff] [blame] | 851 | break; |
| 852 | case JEDEC_WRSR3: |
| 853 | if (data->emu_status_len < 3) |
| 854 | break; |
| 855 | if (!(data->emu_status[0] & SPI_SR_WEL)) { |
| 856 | msg_perr("WRSR3 attempted, but WEL is 0!\n"); |
| 857 | break; |
| 858 | } |
| 859 | |
Sergii Dmytruk | 27835ea | 2021-11-08 00:06:33 +0200 | [diff] [blame] | 860 | ro_bits = get_reg_ro_bit_mask(data, STATUS3); |
Sergii Dmytruk | 59151a4 | 2021-11-08 00:05:12 +0200 | [diff] [blame] | 861 | data->emu_status[2] &= ro_bits; |
| 862 | data->emu_status[2] |= (writearr[1] & ~ro_bits); |
| 863 | |
| 864 | msg_pdbg2("WRSR3 wrote 0x%02x.\n", data->emu_status[2]); |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 865 | break; |
| 866 | case JEDEC_READ: |
| 867 | offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; |
| 868 | /* Truncate to emu_chip_size. */ |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 869 | offs %= data->emu_chip_size; |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 870 | if (readcnt > 0) |
Edward O'Callaghan | 9425022 | 2021-05-20 20:34:02 +1000 | [diff] [blame] | 871 | memcpy(readarr, data->flashchip_contents + offs, readcnt); |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 872 | break; |
| 873 | case JEDEC_BYTE_PROGRAM: |
| 874 | offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; |
| 875 | /* Truncate to emu_chip_size. */ |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 876 | offs %= data->emu_chip_size; |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 877 | if (writecnt < 5) { |
| 878 | msg_perr("BYTE PROGRAM size too short!\n"); |
| 879 | return 1; |
| 880 | } |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 881 | if (writecnt - 4 > data->emu_max_byteprogram_size) { |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 882 | msg_perr("Max BYTE PROGRAM size exceeded!\n"); |
| 883 | return 1; |
| 884 | } |
Sergii Dmytruk | 2fc70dc | 2021-11-08 01:38:52 +0200 | [diff] [blame] | 885 | if (write_flash_data(data, offs, writecnt - 4, writearr + 4)) { |
| 886 | msg_perr("Failed to program flash!\n"); |
| 887 | return 1; |
| 888 | } |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 889 | break; |
| 890 | case JEDEC_AAI_WORD_PROGRAM: |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 891 | if (!data->emu_max_aai_size) |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 892 | break; |
Sergii Dmytruk | 59151a4 | 2021-11-08 00:05:12 +0200 | [diff] [blame] | 893 | if (!(data->emu_status[0] & SPI_SR_AAI)) { |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 894 | if (writecnt < JEDEC_AAI_WORD_PROGRAM_OUTSIZE) { |
| 895 | msg_perr("Initial AAI WORD PROGRAM size too " |
| 896 | "short!\n"); |
| 897 | return 1; |
| 898 | } |
| 899 | if (writecnt > JEDEC_AAI_WORD_PROGRAM_OUTSIZE) { |
| 900 | msg_perr("Initial AAI WORD PROGRAM size too " |
| 901 | "long!\n"); |
| 902 | return 1; |
| 903 | } |
Sergii Dmytruk | 59151a4 | 2021-11-08 00:05:12 +0200 | [diff] [blame] | 904 | data->emu_status[0] |= SPI_SR_AAI; |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 905 | aai_offs = writearr[1] << 16 | writearr[2] << 8 | |
| 906 | writearr[3]; |
| 907 | /* Truncate to emu_chip_size. */ |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 908 | aai_offs %= data->emu_chip_size; |
Sergii Dmytruk | 2fc70dc | 2021-11-08 01:38:52 +0200 | [diff] [blame] | 909 | if (write_flash_data(data, aai_offs, 2, writearr + 4)) { |
| 910 | msg_perr("Failed to program flash!\n"); |
| 911 | return 1; |
| 912 | } |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 913 | aai_offs += 2; |
| 914 | } else { |
| 915 | if (writecnt < JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE) { |
| 916 | msg_perr("Continuation AAI WORD PROGRAM size " |
| 917 | "too short!\n"); |
| 918 | return 1; |
| 919 | } |
| 920 | if (writecnt > JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE) { |
| 921 | msg_perr("Continuation AAI WORD PROGRAM size " |
| 922 | "too long!\n"); |
| 923 | return 1; |
| 924 | } |
Sergii Dmytruk | 2fc70dc | 2021-11-08 01:38:52 +0200 | [diff] [blame] | 925 | if (write_flash_data(data, aai_offs, 2, writearr + 1)) { |
| 926 | msg_perr("Failed to program flash!\n"); |
| 927 | return 1; |
| 928 | } |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 929 | aai_offs += 2; |
| 930 | } |
| 931 | break; |
| 932 | case JEDEC_WRDI: |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 933 | if (data->emu_max_aai_size) |
Sergii Dmytruk | 59151a4 | 2021-11-08 00:05:12 +0200 | [diff] [blame] | 934 | data->emu_status[0] &= ~SPI_SR_AAI; |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 935 | break; |
| 936 | case JEDEC_SE: |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 937 | if (!data->emu_jedec_se_size) |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 938 | break; |
| 939 | if (writecnt != JEDEC_SE_OUTSIZE) { |
| 940 | msg_perr("SECTOR ERASE 0x20 outsize invalid!\n"); |
| 941 | return 1; |
| 942 | } |
| 943 | if (readcnt != JEDEC_SE_INSIZE) { |
| 944 | msg_perr("SECTOR ERASE 0x20 insize invalid!\n"); |
| 945 | return 1; |
| 946 | } |
| 947 | offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 948 | if (offs & (data->emu_jedec_se_size - 1)) |
Carl-Daniel Hailfinger | 146b77d | 2011-02-04 22:52:04 +0000 | [diff] [blame] | 949 | msg_pdbg("Unaligned SECTOR ERASE 0x20: 0x%x\n", offs); |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 950 | offs &= ~(data->emu_jedec_se_size - 1); |
Sergii Dmytruk | 2fc70dc | 2021-11-08 01:38:52 +0200 | [diff] [blame] | 951 | if (erase_flash_data(data, offs, data->emu_jedec_se_size)) { |
| 952 | msg_perr("Failed to erase flash!\n"); |
| 953 | return 1; |
| 954 | } |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 955 | break; |
| 956 | case JEDEC_BE_52: |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 957 | if (!data->emu_jedec_be_52_size) |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 958 | break; |
| 959 | if (writecnt != JEDEC_BE_52_OUTSIZE) { |
| 960 | msg_perr("BLOCK ERASE 0x52 outsize invalid!\n"); |
| 961 | return 1; |
| 962 | } |
| 963 | if (readcnt != JEDEC_BE_52_INSIZE) { |
| 964 | msg_perr("BLOCK ERASE 0x52 insize invalid!\n"); |
| 965 | return 1; |
| 966 | } |
| 967 | offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 968 | if (offs & (data->emu_jedec_be_52_size - 1)) |
Carl-Daniel Hailfinger | 146b77d | 2011-02-04 22:52:04 +0000 | [diff] [blame] | 969 | msg_pdbg("Unaligned BLOCK ERASE 0x52: 0x%x\n", offs); |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 970 | offs &= ~(data->emu_jedec_be_52_size - 1); |
Sergii Dmytruk | 2fc70dc | 2021-11-08 01:38:52 +0200 | [diff] [blame] | 971 | if (erase_flash_data(data, offs, data->emu_jedec_be_52_size)) { |
| 972 | msg_perr("Failed to erase flash!\n"); |
| 973 | return 1; |
| 974 | } |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 975 | break; |
| 976 | case JEDEC_BE_D8: |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 977 | if (!data->emu_jedec_be_d8_size) |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 978 | break; |
| 979 | if (writecnt != JEDEC_BE_D8_OUTSIZE) { |
| 980 | msg_perr("BLOCK ERASE 0xd8 outsize invalid!\n"); |
| 981 | return 1; |
| 982 | } |
| 983 | if (readcnt != JEDEC_BE_D8_INSIZE) { |
| 984 | msg_perr("BLOCK ERASE 0xd8 insize invalid!\n"); |
| 985 | return 1; |
| 986 | } |
| 987 | offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 988 | if (offs & (data->emu_jedec_be_d8_size - 1)) |
Carl-Daniel Hailfinger | 146b77d | 2011-02-04 22:52:04 +0000 | [diff] [blame] | 989 | msg_pdbg("Unaligned BLOCK ERASE 0xd8: 0x%x\n", offs); |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 990 | offs &= ~(data->emu_jedec_be_d8_size - 1); |
Sergii Dmytruk | 2fc70dc | 2021-11-08 01:38:52 +0200 | [diff] [blame] | 991 | if (erase_flash_data(data, offs, data->emu_jedec_be_d8_size)) { |
| 992 | msg_perr("Failed to erase flash!\n"); |
| 993 | return 1; |
| 994 | } |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 995 | break; |
| 996 | case JEDEC_CE_60: |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 997 | if (!data->emu_jedec_ce_60_size) |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 998 | break; |
| 999 | if (writecnt != JEDEC_CE_60_OUTSIZE) { |
| 1000 | msg_perr("CHIP ERASE 0x60 outsize invalid!\n"); |
| 1001 | return 1; |
| 1002 | } |
| 1003 | if (readcnt != JEDEC_CE_60_INSIZE) { |
| 1004 | msg_perr("CHIP ERASE 0x60 insize invalid!\n"); |
| 1005 | return 1; |
| 1006 | } |
Carl-Daniel Hailfinger | 146b77d | 2011-02-04 22:52:04 +0000 | [diff] [blame] | 1007 | /* JEDEC_CE_60_OUTSIZE is 1 (no address) -> no offset. */ |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 1008 | /* emu_jedec_ce_60_size is emu_chip_size. */ |
Sergii Dmytruk | 2fc70dc | 2021-11-08 01:38:52 +0200 | [diff] [blame] | 1009 | if (erase_flash_data(data, 0, data->emu_jedec_ce_60_size)) { |
| 1010 | msg_perr("Failed to erase flash!\n"); |
| 1011 | return 1; |
| 1012 | } |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 1013 | break; |
| 1014 | case JEDEC_CE_C7: |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 1015 | if (!data->emu_jedec_ce_c7_size) |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 1016 | break; |
| 1017 | if (writecnt != JEDEC_CE_C7_OUTSIZE) { |
| 1018 | msg_perr("CHIP ERASE 0xc7 outsize invalid!\n"); |
| 1019 | return 1; |
| 1020 | } |
| 1021 | if (readcnt != JEDEC_CE_C7_INSIZE) { |
| 1022 | msg_perr("CHIP ERASE 0xc7 insize invalid!\n"); |
| 1023 | return 1; |
| 1024 | } |
Carl-Daniel Hailfinger | 146b77d | 2011-02-04 22:52:04 +0000 | [diff] [blame] | 1025 | /* JEDEC_CE_C7_OUTSIZE is 1 (no address) -> no offset. */ |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 1026 | /* emu_jedec_ce_c7_size is emu_chip_size. */ |
Sergii Dmytruk | 2fc70dc | 2021-11-08 01:38:52 +0200 | [diff] [blame] | 1027 | if (erase_flash_data(data, 0, data->emu_jedec_ce_c7_size)) { |
| 1028 | msg_perr("Failed to erase flash!\n"); |
| 1029 | return 1; |
| 1030 | } |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 1031 | break; |
Stefan Tauner | 0b9df97 | 2012-05-07 22:12:16 +0000 | [diff] [blame] | 1032 | case JEDEC_SFDP: |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 1033 | if (data->emu_chip != EMULATE_MACRONIX_MX25L6436) |
Stefan Tauner | 0b9df97 | 2012-05-07 22:12:16 +0000 | [diff] [blame] | 1034 | break; |
| 1035 | if (writecnt < 4) |
| 1036 | break; |
| 1037 | offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3]; |
| 1038 | |
| 1039 | /* SFDP expects one dummy byte after the address. */ |
| 1040 | if (writecnt == 4) { |
| 1041 | /* The dummy byte was not written, make sure it is read instead. |
| 1042 | * Shifting and shortening the read array does achieve this goal. |
| 1043 | */ |
| 1044 | readarr++; |
| 1045 | readcnt--; |
| 1046 | } else { |
| 1047 | /* The response is shifted if more than 5 bytes are written, because SFDP data is |
| 1048 | * already shifted out by the chip while those superfluous bytes are written. */ |
| 1049 | offs += writecnt - 5; |
| 1050 | } |
| 1051 | |
| 1052 | /* The SFDP spec implies that the start address of an SFDP read may be truncated to fit in the |
| 1053 | * SFDP table address space, i.e. the start address may be wrapped around at SFDP table size. |
| 1054 | * This is a reasonable implementation choice in hardware because it saves a few gates. */ |
| 1055 | if (offs >= sizeof(sfdp_table)) { |
| 1056 | msg_pdbg("Wrapping the start address around the SFDP table boundary (using 0x%x " |
| 1057 | "instead of 0x%x).\n", (unsigned int)(offs % sizeof(sfdp_table)), offs); |
| 1058 | offs %= sizeof(sfdp_table); |
| 1059 | } |
| 1060 | toread = min(sizeof(sfdp_table) - offs, readcnt); |
| 1061 | memcpy(readarr, sfdp_table + offs, toread); |
| 1062 | if (toread < readcnt) |
| 1063 | msg_pdbg("Crossing the SFDP table boundary in a single " |
| 1064 | "continuous chunk produces undefined results " |
| 1065 | "after that point.\n"); |
| 1066 | break; |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 1067 | default: |
| 1068 | /* No special response. */ |
| 1069 | break; |
| 1070 | } |
Stefan Tauner | 5e695ab | 2012-05-06 17:03:40 +0000 | [diff] [blame] | 1071 | if (writearr[0] != JEDEC_WREN && writearr[0] != JEDEC_EWSR) |
Sergii Dmytruk | 59151a4 | 2021-11-08 00:05:12 +0200 | [diff] [blame] | 1072 | data->emu_status[0] &= ~SPI_SR_WEL; |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 1073 | return 0; |
| 1074 | } |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 1075 | |
Edward O'Callaghan | 5eca427 | 2020-04-12 17:27:53 +1000 | [diff] [blame] | 1076 | static int dummy_spi_send_command(const struct flashctx *flash, unsigned int writecnt, |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame] | 1077 | unsigned int readcnt, |
| 1078 | const unsigned char *writearr, |
| 1079 | unsigned char *readarr) |
Carl-Daniel Hailfinger | bfe2e0c | 2009-05-14 12:59:36 +0000 | [diff] [blame] | 1080 | { |
Nico Huber | 519be66 | 2018-12-23 20:03:35 +0100 | [diff] [blame] | 1081 | unsigned int i; |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 1082 | struct emu_data *emu_data = flash->mst->spi.data; |
| 1083 | if (!emu_data) { |
| 1084 | msg_perr("No data in flash context!\n"); |
| 1085 | return 1; |
| 1086 | } |
Carl-Daniel Hailfinger | bfe2e0c | 2009-05-14 12:59:36 +0000 | [diff] [blame] | 1087 | |
Carl-Daniel Hailfinger | 3ac101c | 2010-01-09 04:32:23 +0000 | [diff] [blame] | 1088 | msg_pspew("%s:", __func__); |
Carl-Daniel Hailfinger | bfe2e0c | 2009-05-14 12:59:36 +0000 | [diff] [blame] | 1089 | |
Carl-Daniel Hailfinger | 3ac101c | 2010-01-09 04:32:23 +0000 | [diff] [blame] | 1090 | msg_pspew(" writing %u bytes:", writecnt); |
Carl-Daniel Hailfinger | bfe2e0c | 2009-05-14 12:59:36 +0000 | [diff] [blame] | 1091 | for (i = 0; i < writecnt; i++) |
Carl-Daniel Hailfinger | 3ac101c | 2010-01-09 04:32:23 +0000 | [diff] [blame] | 1092 | msg_pspew(" 0x%02x", writearr[i]); |
Carl-Daniel Hailfinger | bfe2e0c | 2009-05-14 12:59:36 +0000 | [diff] [blame] | 1093 | |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 1094 | /* Response for unknown commands and missing chip is 0xff. */ |
| 1095 | memset(readarr, 0xff, readcnt); |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 1096 | switch (emu_data->emu_chip) { |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 1097 | case EMULATE_ST_M25P10_RES: |
| 1098 | case EMULATE_SST_SST25VF040_REMS: |
| 1099 | case EMULATE_SST_SST25VF032B: |
Stefan Tauner | 0b9df97 | 2012-05-07 22:12:16 +0000 | [diff] [blame] | 1100 | case EMULATE_MACRONIX_MX25L6436: |
Nico Huber | f9632d8 | 2019-01-20 11:23:49 +0100 | [diff] [blame] | 1101 | case EMULATE_WINBOND_W25Q128FV: |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 1102 | if (emulate_spi_chip_response(writecnt, readcnt, writearr, |
Lachlan Bishop | c753c40 | 2020-09-10 14:57:05 +1000 | [diff] [blame] | 1103 | readarr, emu_data)) { |
Carl-Daniel Hailfinger | 1b83be5 | 2012-02-08 23:28:54 +0000 | [diff] [blame] | 1104 | msg_pdbg("Invalid command sent to flash chip!\n"); |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 1105 | return 1; |
| 1106 | } |
| 1107 | break; |
| 1108 | default: |
| 1109 | break; |
| 1110 | } |
Carl-Daniel Hailfinger | 3ac101c | 2010-01-09 04:32:23 +0000 | [diff] [blame] | 1111 | msg_pspew(" reading %u bytes:", readcnt); |
Uwe Hermann | 91f4afa | 2011-07-28 08:13:25 +0000 | [diff] [blame] | 1112 | for (i = 0; i < readcnt; i++) |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 1113 | msg_pspew(" 0x%02x", readarr[i]); |
Carl-Daniel Hailfinger | 3ac101c | 2010-01-09 04:32:23 +0000 | [diff] [blame] | 1114 | msg_pspew("\n"); |
Carl-Daniel Hailfinger | bfe2e0c | 2009-05-14 12:59:36 +0000 | [diff] [blame] | 1115 | return 0; |
| 1116 | } |
Carl-Daniel Hailfinger | 1b0ba89 | 2010-06-20 10:58:32 +0000 | [diff] [blame] | 1117 | |
Mark Marshall | f20b7be | 2014-05-09 21:16:21 +0000 | [diff] [blame] | 1118 | static int dummy_spi_write_256(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len) |
Carl-Daniel Hailfinger | 9a795d8 | 2010-07-14 16:19:05 +0000 | [diff] [blame] | 1119 | { |
Carl-Daniel Hailfinger | f68aa8a | 2010-11-01 22:07:04 +0000 | [diff] [blame] | 1120 | return spi_write_chunked(flash, buf, start, len, |
| 1121 | spi_write_256_chunksize); |
Carl-Daniel Hailfinger | 9a795d8 | 2010-07-14 16:19:05 +0000 | [diff] [blame] | 1122 | } |
Thomas Heijligen | cc853d8 | 2021-05-04 15:32:17 +0200 | [diff] [blame] | 1123 | |
| 1124 | const struct programmer_entry programmer_dummy = { |
| 1125 | .name = "dummy", |
| 1126 | .type = OTHER, |
| 1127 | /* FIXME */ |
| 1128 | .devs.note = "Dummy device, does nothing and logs all accesses\n", |
| 1129 | .init = dummy_init, |
| 1130 | .map_flash_region = dummy_map, |
| 1131 | .unmap_flash_region = dummy_unmap, |
| 1132 | .delay = internal_delay, |
| 1133 | }; |