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Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +00001/*
2 * This file is part of the flashrom project.
3 *
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +00004 * Copyright (C) 2009,2010 Carl-Daniel Hailfinger
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +00005 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +00008 * the Free Software Foundation; version 2 of the License.
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +00009 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +000020#include <string.h>
21#include <stdlib.h>
Carl-Daniel Hailfinger1b83be52012-02-08 23:28:54 +000022#include <stdio.h>
23#include <ctype.h>
Stefan Tauner5e695ab2012-05-06 17:03:40 +000024#include <errno.h>
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +000025#include "flash.h"
Carl-Daniel Hailfinger1b0ba892010-06-20 10:58:32 +000026#include "chipdrivers.h"
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000027#include "programmer.h"
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +000028
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +000029/* Remove the #define below if you don't want SPI flash chip emulation. */
30#define EMULATE_SPI_CHIP 1
31
32#if EMULATE_SPI_CHIP
33#define EMULATE_CHIP 1
34#include "spi.h"
35#endif
36
37#if EMULATE_CHIP
38#include <sys/types.h>
39#include <sys/stat.h>
40#endif
41
42#if EMULATE_CHIP
43static uint8_t *flashchip_contents = NULL;
44enum emu_chip {
45 EMULATE_NONE,
46 EMULATE_ST_M25P10_RES,
47 EMULATE_SST_SST25VF040_REMS,
48 EMULATE_SST_SST25VF032B,
49};
50static enum emu_chip emu_chip = EMULATE_NONE;
51static char *emu_persistent_image = NULL;
Stefan Taunerc69c9c82011-11-23 09:13:48 +000052static unsigned int emu_chip_size = 0;
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +000053#if EMULATE_SPI_CHIP
Stefan Taunerc69c9c82011-11-23 09:13:48 +000054static unsigned int emu_max_byteprogram_size = 0;
55static unsigned int emu_max_aai_size = 0;
56static unsigned int emu_jedec_se_size = 0;
57static unsigned int emu_jedec_be_52_size = 0;
58static unsigned int emu_jedec_be_d8_size = 0;
59static unsigned int emu_jedec_ce_60_size = 0;
60static unsigned int emu_jedec_ce_c7_size = 0;
Carl-Daniel Hailfinger1b83be52012-02-08 23:28:54 +000061unsigned char spi_blacklist[256];
62unsigned char spi_ignorelist[256];
63int spi_blacklist_size = 0;
64int spi_ignorelist_size = 0;
Stefan Tauner5e695ab2012-05-06 17:03:40 +000065static uint8_t emu_status = 0;
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +000066#endif
67#endif
68
Stefan Taunerc69c9c82011-11-23 09:13:48 +000069static unsigned int spi_write_256_chunksize = 256;
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +000070
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000071static int dummy_spi_send_command(struct flashctx *flash, unsigned int writecnt,
72 unsigned int readcnt,
73 const unsigned char *writearr,
74 unsigned char *readarr);
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +000075static int dummy_spi_write_256(struct flashctx *flash, uint8_t *buf,
Stefan Taunerc69c9c82011-11-23 09:13:48 +000076 unsigned int start, unsigned int len);
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000077static void dummy_chip_writeb(const struct flashctx *flash, uint8_t val,
78 chipaddr addr);
79static void dummy_chip_writew(const struct flashctx *flash, uint16_t val,
80 chipaddr addr);
81static void dummy_chip_writel(const struct flashctx *flash, uint32_t val,
82 chipaddr addr);
83static void dummy_chip_writen(const struct flashctx *flash, uint8_t *buf,
84 chipaddr addr, size_t len);
85static uint8_t dummy_chip_readb(const struct flashctx *flash,
86 const chipaddr addr);
87static uint16_t dummy_chip_readw(const struct flashctx *flash,
88 const chipaddr addr);
89static uint32_t dummy_chip_readl(const struct flashctx *flash,
90 const chipaddr addr);
91static void dummy_chip_readn(const struct flashctx *flash, uint8_t *buf,
92 const chipaddr addr, size_t len);
Michael Karcherb9dbe482011-05-11 17:07:07 +000093
94static const struct spi_programmer spi_programmer_dummyflasher = {
Uwe Hermann91f4afa2011-07-28 08:13:25 +000095 .type = SPI_CONTROLLER_DUMMY,
96 .max_data_read = MAX_DATA_READ_UNLIMITED,
97 .max_data_write = MAX_DATA_UNSPECIFIED,
98 .command = dummy_spi_send_command,
99 .multicommand = default_spi_send_multicommand,
100 .read = default_spi_read,
101 .write_256 = dummy_spi_write_256,
Michael Karcherb9dbe482011-05-11 17:07:07 +0000102};
David Hendricks8bb20212011-06-14 01:35:36 +0000103
Carl-Daniel Hailfingereaacd2d2011-11-09 23:40:00 +0000104static const struct par_programmer par_programmer_dummy = {
105 .chip_readb = dummy_chip_readb,
106 .chip_readw = dummy_chip_readw,
107 .chip_readl = dummy_chip_readl,
108 .chip_readn = dummy_chip_readn,
109 .chip_writeb = dummy_chip_writeb,
110 .chip_writew = dummy_chip_writew,
111 .chip_writel = dummy_chip_writel,
112 .chip_writen = dummy_chip_writen,
113};
114
115enum chipbustype dummy_buses_supported = BUS_NONE;
116
David Hendricks8bb20212011-06-14 01:35:36 +0000117static int dummy_shutdown(void *data)
118{
119 msg_pspew("%s\n", __func__);
120#if EMULATE_CHIP
121 if (emu_chip != EMULATE_NONE) {
122 if (emu_persistent_image) {
123 msg_pdbg("Writing %s\n", emu_persistent_image);
124 write_buf_to_file(flashchip_contents, emu_chip_size,
125 emu_persistent_image);
126 }
127 free(flashchip_contents);
128 }
129#endif
130 return 0;
131}
132
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +0000133int dummy_init(void)
134{
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000135 char *bustext = NULL;
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +0000136 char *tmp = NULL;
Carl-Daniel Hailfinger1b83be52012-02-08 23:28:54 +0000137 int i;
Stefan Tauner5e695ab2012-05-06 17:03:40 +0000138#if EMULATE_SPI_CHIP
139 char *status = NULL;
140#endif
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +0000141#if EMULATE_CHIP
142 struct stat image_stat;
143#endif
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000144
Carl-Daniel Hailfinger3ac101c2010-01-09 04:32:23 +0000145 msg_pspew("%s\n", __func__);
Carl-Daniel Hailfinger3504b532009-06-01 00:02:11 +0000146
Carl-Daniel Hailfinger2b6dcb32010-07-08 10:13:37 +0000147 bustext = extract_programmer_param("bus");
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000148 msg_pdbg("Requested buses are: %s\n", bustext ? bustext : "default");
149 if (!bustext)
150 bustext = strdup("parallel+lpc+fwh+spi");
Carl-Daniel Hailfinger3504b532009-06-01 00:02:11 +0000151 /* Convert the parameters to lowercase. */
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000152 tolower_string(bustext);
Carl-Daniel Hailfinger3504b532009-06-01 00:02:11 +0000153
Carl-Daniel Hailfingereaacd2d2011-11-09 23:40:00 +0000154 dummy_buses_supported = BUS_NONE;
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000155 if (strstr(bustext, "parallel")) {
Carl-Daniel Hailfingereaacd2d2011-11-09 23:40:00 +0000156 dummy_buses_supported |= BUS_PARALLEL;
Carl-Daniel Hailfinger3ac101c2010-01-09 04:32:23 +0000157 msg_pdbg("Enabling support for %s flash.\n", "parallel");
Carl-Daniel Hailfinger3504b532009-06-01 00:02:11 +0000158 }
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000159 if (strstr(bustext, "lpc")) {
Carl-Daniel Hailfingereaacd2d2011-11-09 23:40:00 +0000160 dummy_buses_supported |= BUS_LPC;
Carl-Daniel Hailfinger3ac101c2010-01-09 04:32:23 +0000161 msg_pdbg("Enabling support for %s flash.\n", "LPC");
Carl-Daniel Hailfinger3504b532009-06-01 00:02:11 +0000162 }
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000163 if (strstr(bustext, "fwh")) {
Carl-Daniel Hailfingereaacd2d2011-11-09 23:40:00 +0000164 dummy_buses_supported |= BUS_FWH;
Carl-Daniel Hailfinger3ac101c2010-01-09 04:32:23 +0000165 msg_pdbg("Enabling support for %s flash.\n", "FWH");
Carl-Daniel Hailfinger3504b532009-06-01 00:02:11 +0000166 }
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000167 if (strstr(bustext, "spi")) {
Carl-Daniel Hailfingereaacd2d2011-11-09 23:40:00 +0000168 dummy_buses_supported |= BUS_SPI;
Carl-Daniel Hailfinger3ac101c2010-01-09 04:32:23 +0000169 msg_pdbg("Enabling support for %s flash.\n", "SPI");
Carl-Daniel Hailfinger3504b532009-06-01 00:02:11 +0000170 }
Carl-Daniel Hailfingereaacd2d2011-11-09 23:40:00 +0000171 if (dummy_buses_supported == BUS_NONE)
Carl-Daniel Hailfinger3ac101c2010-01-09 04:32:23 +0000172 msg_pdbg("Support for all flash bus types disabled.\n");
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +0000173 free(bustext);
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +0000174
175 tmp = extract_programmer_param("spi_write_256_chunksize");
176 if (tmp) {
177 spi_write_256_chunksize = atoi(tmp);
178 free(tmp);
179 if (spi_write_256_chunksize < 1) {
180 msg_perr("invalid spi_write_256_chunksize\n");
181 return 1;
182 }
183 }
184
Carl-Daniel Hailfinger1b83be52012-02-08 23:28:54 +0000185 tmp = extract_programmer_param("spi_blacklist");
186 if (tmp) {
187 i = strlen(tmp);
188 if (!strncmp(tmp, "0x", 2)) {
189 i -= 2;
190 memmove(tmp, tmp + 2, i + 1);
191 }
192 if ((i > 512) || (i % 2)) {
193 msg_perr("Invalid SPI command blacklist length\n");
194 free(tmp);
195 return 1;
196 }
197 spi_blacklist_size = i / 2;
198 for (i = 0; i < spi_blacklist_size * 2; i++) {
199 if (!isxdigit((unsigned char)tmp[i])) {
200 msg_perr("Invalid char \"%c\" in SPI command "
201 "blacklist\n", tmp[i]);
202 free(tmp);
203 return 1;
204 }
205 }
206 for (i = 0; i < spi_blacklist_size; i++) {
Carl-Daniel Hailfinger5b554712012-02-16 01:43:06 +0000207 unsigned int tmp2;
208 /* SCNx8 is apparently not supported by MSVC (and thus
209 * MinGW), so work around it with an extra variable
210 */
211 sscanf(tmp + i * 2, "%2x", &tmp2);
212 spi_blacklist[i] = (uint8_t)tmp2;
Carl-Daniel Hailfinger1b83be52012-02-08 23:28:54 +0000213 }
214 msg_pdbg("SPI blacklist is ");
215 for (i = 0; i < spi_blacklist_size; i++)
216 msg_pdbg("%02x ", spi_blacklist[i]);
217 msg_pdbg(", size %i\n", spi_blacklist_size);
218 }
219 free(tmp);
220
221 tmp = extract_programmer_param("spi_ignorelist");
222 if (tmp) {
223 i = strlen(tmp);
224 if (!strncmp(tmp, "0x", 2)) {
225 i -= 2;
226 memmove(tmp, tmp + 2, i + 1);
227 }
228 if ((i > 512) || (i % 2)) {
229 msg_perr("Invalid SPI command ignorelist length\n");
230 free(tmp);
231 return 1;
232 }
233 spi_ignorelist_size = i / 2;
234 for (i = 0; i < spi_ignorelist_size * 2; i++) {
235 if (!isxdigit((unsigned char)tmp[i])) {
236 msg_perr("Invalid char \"%c\" in SPI command "
237 "ignorelist\n", tmp[i]);
238 free(tmp);
239 return 1;
240 }
241 }
242 for (i = 0; i < spi_ignorelist_size; i++) {
Carl-Daniel Hailfinger5b554712012-02-16 01:43:06 +0000243 unsigned int tmp2;
244 /* SCNx8 is apparently not supported by MSVC (and thus
245 * MinGW), so work around it with an extra variable
246 */
247 sscanf(tmp + i * 2, "%2x", &tmp2);
248 spi_ignorelist[i] = (uint8_t)tmp2;
Carl-Daniel Hailfinger1b83be52012-02-08 23:28:54 +0000249 }
250 msg_pdbg("SPI ignorelist is ");
251 for (i = 0; i < spi_ignorelist_size; i++)
252 msg_pdbg("%02x ", spi_ignorelist[i]);
253 msg_pdbg(", size %i\n", spi_ignorelist_size);
254 }
255 free(tmp);
256
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +0000257#if EMULATE_CHIP
258 tmp = extract_programmer_param("emulate");
259 if (!tmp) {
260 msg_pdbg("Not emulating any flash chip.\n");
261 /* Nothing else to do. */
David Hendricks8bb20212011-06-14 01:35:36 +0000262 goto dummy_init_out;
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +0000263 }
264#if EMULATE_SPI_CHIP
265 if (!strcmp(tmp, "M25P10.RES")) {
266 emu_chip = EMULATE_ST_M25P10_RES;
267 emu_chip_size = 128 * 1024;
268 emu_max_byteprogram_size = 128;
269 emu_max_aai_size = 0;
270 emu_jedec_se_size = 0;
271 emu_jedec_be_52_size = 0;
272 emu_jedec_be_d8_size = 32 * 1024;
273 emu_jedec_ce_60_size = 0;
274 emu_jedec_ce_c7_size = emu_chip_size;
275 msg_pdbg("Emulating ST M25P10.RES SPI flash chip (RES, page "
276 "write)\n");
277 }
278 if (!strcmp(tmp, "SST25VF040.REMS")) {
279 emu_chip = EMULATE_SST_SST25VF040_REMS;
280 emu_chip_size = 512 * 1024;
281 emu_max_byteprogram_size = 1;
282 emu_max_aai_size = 0;
283 emu_jedec_se_size = 4 * 1024;
284 emu_jedec_be_52_size = 32 * 1024;
285 emu_jedec_be_d8_size = 0;
286 emu_jedec_ce_60_size = emu_chip_size;
287 emu_jedec_ce_c7_size = 0;
288 msg_pdbg("Emulating SST SST25VF040.REMS SPI flash chip (REMS, "
289 "byte write)\n");
290 }
291 if (!strcmp(tmp, "SST25VF032B")) {
292 emu_chip = EMULATE_SST_SST25VF032B;
293 emu_chip_size = 4 * 1024 * 1024;
294 emu_max_byteprogram_size = 1;
295 emu_max_aai_size = 2;
296 emu_jedec_se_size = 4 * 1024;
297 emu_jedec_be_52_size = 32 * 1024;
298 emu_jedec_be_d8_size = 64 * 1024;
299 emu_jedec_ce_60_size = emu_chip_size;
300 emu_jedec_ce_c7_size = emu_chip_size;
301 msg_pdbg("Emulating SST SST25VF032B SPI flash chip (RDID, AAI "
302 "write)\n");
303 }
304#endif
305 if (emu_chip == EMULATE_NONE) {
306 msg_perr("Invalid chip specified for emulation: %s\n", tmp);
307 free(tmp);
308 return 1;
309 }
310 free(tmp);
311 flashchip_contents = malloc(emu_chip_size);
312 if (!flashchip_contents) {
313 msg_perr("Out of memory!\n");
314 return 1;
315 }
David Hendricks8bb20212011-06-14 01:35:36 +0000316
Stefan Tauner5e695ab2012-05-06 17:03:40 +0000317#ifdef EMULATE_SPI_CHIP
318 status = extract_programmer_param("spi_status");
319 if (status) {
320 char *endptr;
321 errno = 0;
322 emu_status = strtoul(status, &endptr, 0);
323 free(status);
324 if (errno != 0 || status == endptr) {
325 msg_perr("Error: initial status register specified, "
326 "but the value could not be converted.\n");
327 return 1;
328 }
329 msg_pdbg("Initial status register is set to 0x%02x.\n",
330 emu_status);
331 }
332#endif
333
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +0000334 msg_pdbg("Filling fake flash chip with 0xff, size %i\n", emu_chip_size);
335 memset(flashchip_contents, 0xff, emu_chip_size);
336
337 emu_persistent_image = extract_programmer_param("image");
338 if (!emu_persistent_image) {
339 /* Nothing else to do. */
David Hendricks8bb20212011-06-14 01:35:36 +0000340 goto dummy_init_out;
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +0000341 }
342 if (!stat(emu_persistent_image, &image_stat)) {
343 msg_pdbg("Found persistent image %s, size %li ",
344 emu_persistent_image, (long)image_stat.st_size);
345 if (image_stat.st_size == emu_chip_size) {
346 msg_pdbg("matches.\n");
347 msg_pdbg("Reading %s\n", emu_persistent_image);
348 read_buf_from_file(flashchip_contents, emu_chip_size,
349 emu_persistent_image);
350 } else {
351 msg_pdbg("doesn't match.\n");
352 }
353 }
354#endif
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +0000355
David Hendricks8bb20212011-06-14 01:35:36 +0000356dummy_init_out:
357 if (register_shutdown(dummy_shutdown, NULL)) {
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +0000358 free(flashchip_contents);
David Hendricks8bb20212011-06-14 01:35:36 +0000359 return 1;
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +0000360 }
Carl-Daniel Hailfingereaacd2d2011-11-09 23:40:00 +0000361 if (dummy_buses_supported & (BUS_PARALLEL | BUS_LPC | BUS_FWH))
362 register_par_programmer(&par_programmer_dummy,
363 dummy_buses_supported &
364 (BUS_PARALLEL | BUS_LPC |
365 BUS_FWH));
366 if (dummy_buses_supported & BUS_SPI)
367 register_spi_programmer(&spi_programmer_dummyflasher);
368
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +0000369 return 0;
370}
371
Carl-Daniel Hailfinger1455b2b2009-05-11 14:13:25 +0000372void *dummy_map(const char *descr, unsigned long phys_addr, size_t len)
373{
Carl-Daniel Hailfinger3ac101c2010-01-09 04:32:23 +0000374 msg_pspew("%s: Mapping %s, 0x%lx bytes at 0x%08lx\n",
375 __func__, descr, (unsigned long)len, phys_addr);
Carl-Daniel Hailfinger1455b2b2009-05-11 14:13:25 +0000376 return (void *)phys_addr;
377}
378
379void dummy_unmap(void *virt_addr, size_t len)
380{
Carl-Daniel Hailfinger3ac101c2010-01-09 04:32:23 +0000381 msg_pspew("%s: Unmapping 0x%lx bytes at %p\n",
382 __func__, (unsigned long)len, virt_addr);
Carl-Daniel Hailfinger1455b2b2009-05-11 14:13:25 +0000383}
384
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000385static void dummy_chip_writeb(const struct flashctx *flash, uint8_t val,
386 chipaddr addr)
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +0000387{
Carl-Daniel Hailfinger3ac101c2010-01-09 04:32:23 +0000388 msg_pspew("%s: addr=0x%lx, val=0x%02x\n", __func__, addr, val);
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +0000389}
390
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000391static void dummy_chip_writew(const struct flashctx *flash, uint16_t val,
392 chipaddr addr)
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +0000393{
Carl-Daniel Hailfinger3ac101c2010-01-09 04:32:23 +0000394 msg_pspew("%s: addr=0x%lx, val=0x%04x\n", __func__, addr, val);
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +0000395}
396
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000397static void dummy_chip_writel(const struct flashctx *flash, uint32_t val,
398 chipaddr addr)
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +0000399{
Carl-Daniel Hailfinger3ac101c2010-01-09 04:32:23 +0000400 msg_pspew("%s: addr=0x%lx, val=0x%08x\n", __func__, addr, val);
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +0000401}
402
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000403static void dummy_chip_writen(const struct flashctx *flash, uint8_t *buf,
404 chipaddr addr, size_t len)
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000405{
406 size_t i;
Carl-Daniel Hailfinger3ac101c2010-01-09 04:32:23 +0000407 msg_pspew("%s: addr=0x%lx, len=0x%08lx, writing data (hex):",
408 __func__, addr, (unsigned long)len);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000409 for (i = 0; i < len; i++) {
410 if ((i % 16) == 0)
Carl-Daniel Hailfinger3ac101c2010-01-09 04:32:23 +0000411 msg_pspew("\n");
412 msg_pspew("%02x ", buf[i]);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000413 }
414}
415
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000416static uint8_t dummy_chip_readb(const struct flashctx *flash,
417 const chipaddr addr)
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +0000418{
Carl-Daniel Hailfinger3ac101c2010-01-09 04:32:23 +0000419 msg_pspew("%s: addr=0x%lx, returning 0xff\n", __func__, addr);
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +0000420 return 0xff;
421}
422
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000423static uint16_t dummy_chip_readw(const struct flashctx *flash,
424 const chipaddr addr)
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +0000425{
Carl-Daniel Hailfinger3ac101c2010-01-09 04:32:23 +0000426 msg_pspew("%s: addr=0x%lx, returning 0xffff\n", __func__, addr);
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +0000427 return 0xffff;
428}
429
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000430static uint32_t dummy_chip_readl(const struct flashctx *flash,
431 const chipaddr addr)
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +0000432{
Carl-Daniel Hailfinger3ac101c2010-01-09 04:32:23 +0000433 msg_pspew("%s: addr=0x%lx, returning 0xffffffff\n", __func__, addr);
Carl-Daniel Hailfingerc3129202009-05-09 00:54:55 +0000434 return 0xffffffff;
435}
436
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000437static void dummy_chip_readn(const struct flashctx *flash, uint8_t *buf,
438 const chipaddr addr, size_t len)
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000439{
Carl-Daniel Hailfinger3ac101c2010-01-09 04:32:23 +0000440 msg_pspew("%s: addr=0x%lx, len=0x%lx, returning array of 0xff\n",
441 __func__, addr, (unsigned long)len);
Carl-Daniel Hailfinger0bd2a2b2009-06-05 18:32:07 +0000442 memset(buf, 0xff, len);
443 return;
444}
445
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +0000446#if EMULATE_SPI_CHIP
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000447static int emulate_spi_chip_response(unsigned int writecnt,
448 unsigned int readcnt,
449 const unsigned char *writearr,
450 unsigned char *readarr)
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +0000451{
Carl-Daniel Hailfinger1b83be52012-02-08 23:28:54 +0000452 unsigned int offs, i;
Stefan Taunerc69c9c82011-11-23 09:13:48 +0000453 static int unsigned aai_offs;
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +0000454
455 if (writecnt == 0) {
456 msg_perr("No command sent to the chip!\n");
457 return 1;
458 }
Paul Menzelac427b22012-02-16 21:07:07 +0000459 /* spi_blacklist has precedence over spi_ignorelist. */
Carl-Daniel Hailfinger1b83be52012-02-08 23:28:54 +0000460 for (i = 0; i < spi_blacklist_size; i++) {
461 if (writearr[0] == spi_blacklist[i]) {
462 msg_pdbg("Refusing blacklisted SPI command 0x%02x\n",
463 spi_blacklist[i]);
464 return SPI_INVALID_OPCODE;
465 }
466 }
467 for (i = 0; i < spi_ignorelist_size; i++) {
468 if (writearr[0] == spi_ignorelist[i]) {
469 msg_cdbg("Ignoring ignorelisted SPI command 0x%02x\n",
470 spi_ignorelist[i]);
471 /* Return success because the command does not fail,
472 * it is simply ignored.
473 */
474 return 0;
475 }
476 }
Stefan Tauner5e695ab2012-05-06 17:03:40 +0000477
478 if (emu_max_aai_size && (emu_status & SPI_SR_AAI)) {
479 if (writearr[0] != JEDEC_AAI_WORD_PROGRAM &&
480 writearr[0] != JEDEC_WRDI &&
481 writearr[0] != JEDEC_RDSR) {
482 msg_perr("Forbidden opcode (0x%02x) attempted during "
483 "AAI sequence!\n", writearr[0]);
484 return 0;
485 }
486 }
487
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +0000488 switch (writearr[0]) {
489 case JEDEC_RES:
490 if (emu_chip != EMULATE_ST_M25P10_RES)
491 break;
492 /* Respond with ST_M25P10_RES. */
493 if (readcnt > 0)
494 readarr[0] = 0x10;
495 break;
496 case JEDEC_REMS:
497 if (emu_chip != EMULATE_SST_SST25VF040_REMS)
498 break;
499 /* Respond with SST_SST25VF040_REMS. */
500 if (readcnt > 0)
501 readarr[0] = 0xbf;
502 if (readcnt > 1)
503 readarr[1] = 0x44;
504 break;
505 case JEDEC_RDID:
506 if (emu_chip != EMULATE_SST_SST25VF032B)
507 break;
508 /* Respond with SST_SST25VF032B. */
509 if (readcnt > 0)
510 readarr[0] = 0xbf;
511 if (readcnt > 1)
512 readarr[1] = 0x25;
513 if (readcnt > 2)
514 readarr[2] = 0x4a;
515 break;
Stefan Tauner5e695ab2012-05-06 17:03:40 +0000516 case JEDEC_RDSR: {
517 memset(readarr, emu_status, readcnt);
518 break;
519 }
520 /* FIXME: this should be chip-specific. */
521 case JEDEC_EWSR:
522 case JEDEC_WREN:
523 emu_status |= SPI_SR_WEL;
524 break;
525 case JEDEC_WRSR:
526 if (!(emu_status & SPI_SR_WEL)) {
527 msg_perr("WRSR attempted, but WEL is 0!\n");
528 break;
529 }
530 /* FIXME: add some reasonable simulation of the busy flag */
531 emu_status = writearr[1] & ~SPI_SR_WIP;
532 msg_pdbg2("WRSR wrote 0x%02x.\n", emu_status);
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +0000533 break;
534 case JEDEC_READ:
535 offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
536 /* Truncate to emu_chip_size. */
537 offs %= emu_chip_size;
538 if (readcnt > 0)
539 memcpy(readarr, flashchip_contents + offs, readcnt);
540 break;
541 case JEDEC_BYTE_PROGRAM:
542 offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
543 /* Truncate to emu_chip_size. */
544 offs %= emu_chip_size;
545 if (writecnt < 5) {
546 msg_perr("BYTE PROGRAM size too short!\n");
547 return 1;
548 }
549 if (writecnt - 4 > emu_max_byteprogram_size) {
550 msg_perr("Max BYTE PROGRAM size exceeded!\n");
551 return 1;
552 }
553 memcpy(flashchip_contents + offs, writearr + 4, writecnt - 4);
554 break;
555 case JEDEC_AAI_WORD_PROGRAM:
556 if (!emu_max_aai_size)
557 break;
Stefan Tauner5e695ab2012-05-06 17:03:40 +0000558 if (!(emu_status & SPI_SR_AAI)) {
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +0000559 if (writecnt < JEDEC_AAI_WORD_PROGRAM_OUTSIZE) {
560 msg_perr("Initial AAI WORD PROGRAM size too "
561 "short!\n");
562 return 1;
563 }
564 if (writecnt > JEDEC_AAI_WORD_PROGRAM_OUTSIZE) {
565 msg_perr("Initial AAI WORD PROGRAM size too "
566 "long!\n");
567 return 1;
568 }
Stefan Tauner5e695ab2012-05-06 17:03:40 +0000569 emu_status |= SPI_SR_AAI;
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +0000570 aai_offs = writearr[1] << 16 | writearr[2] << 8 |
571 writearr[3];
572 /* Truncate to emu_chip_size. */
573 aai_offs %= emu_chip_size;
574 memcpy(flashchip_contents + aai_offs, writearr + 4, 2);
575 aai_offs += 2;
576 } else {
577 if (writecnt < JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE) {
578 msg_perr("Continuation AAI WORD PROGRAM size "
579 "too short!\n");
580 return 1;
581 }
582 if (writecnt > JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE) {
583 msg_perr("Continuation AAI WORD PROGRAM size "
584 "too long!\n");
585 return 1;
586 }
587 memcpy(flashchip_contents + aai_offs, writearr + 1, 2);
588 aai_offs += 2;
589 }
590 break;
591 case JEDEC_WRDI:
Stefan Tauner5e695ab2012-05-06 17:03:40 +0000592 if (emu_max_aai_size)
593 emu_status &= ~SPI_SR_AAI;
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +0000594 break;
595 case JEDEC_SE:
596 if (!emu_jedec_se_size)
597 break;
598 if (writecnt != JEDEC_SE_OUTSIZE) {
599 msg_perr("SECTOR ERASE 0x20 outsize invalid!\n");
600 return 1;
601 }
602 if (readcnt != JEDEC_SE_INSIZE) {
603 msg_perr("SECTOR ERASE 0x20 insize invalid!\n");
604 return 1;
605 }
606 offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
607 if (offs & (emu_jedec_se_size - 1))
Carl-Daniel Hailfinger146b77d2011-02-04 22:52:04 +0000608 msg_pdbg("Unaligned SECTOR ERASE 0x20: 0x%x\n", offs);
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +0000609 offs &= ~(emu_jedec_se_size - 1);
610 memset(flashchip_contents + offs, 0xff, emu_jedec_se_size);
611 break;
612 case JEDEC_BE_52:
613 if (!emu_jedec_be_52_size)
614 break;
615 if (writecnt != JEDEC_BE_52_OUTSIZE) {
616 msg_perr("BLOCK ERASE 0x52 outsize invalid!\n");
617 return 1;
618 }
619 if (readcnt != JEDEC_BE_52_INSIZE) {
620 msg_perr("BLOCK ERASE 0x52 insize invalid!\n");
621 return 1;
622 }
623 offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
624 if (offs & (emu_jedec_be_52_size - 1))
Carl-Daniel Hailfinger146b77d2011-02-04 22:52:04 +0000625 msg_pdbg("Unaligned BLOCK ERASE 0x52: 0x%x\n", offs);
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +0000626 offs &= ~(emu_jedec_be_52_size - 1);
627 memset(flashchip_contents + offs, 0xff, emu_jedec_be_52_size);
628 break;
629 case JEDEC_BE_D8:
630 if (!emu_jedec_be_d8_size)
631 break;
632 if (writecnt != JEDEC_BE_D8_OUTSIZE) {
633 msg_perr("BLOCK ERASE 0xd8 outsize invalid!\n");
634 return 1;
635 }
636 if (readcnt != JEDEC_BE_D8_INSIZE) {
637 msg_perr("BLOCK ERASE 0xd8 insize invalid!\n");
638 return 1;
639 }
640 offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
641 if (offs & (emu_jedec_be_d8_size - 1))
Carl-Daniel Hailfinger146b77d2011-02-04 22:52:04 +0000642 msg_pdbg("Unaligned BLOCK ERASE 0xd8: 0x%x\n", offs);
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +0000643 offs &= ~(emu_jedec_be_d8_size - 1);
644 memset(flashchip_contents + offs, 0xff, emu_jedec_be_d8_size);
645 break;
646 case JEDEC_CE_60:
647 if (!emu_jedec_ce_60_size)
648 break;
649 if (writecnt != JEDEC_CE_60_OUTSIZE) {
650 msg_perr("CHIP ERASE 0x60 outsize invalid!\n");
651 return 1;
652 }
653 if (readcnt != JEDEC_CE_60_INSIZE) {
654 msg_perr("CHIP ERASE 0x60 insize invalid!\n");
655 return 1;
656 }
Carl-Daniel Hailfinger146b77d2011-02-04 22:52:04 +0000657 /* JEDEC_CE_60_OUTSIZE is 1 (no address) -> no offset. */
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +0000658 /* emu_jedec_ce_60_size is emu_chip_size. */
Carl-Daniel Hailfinger146b77d2011-02-04 22:52:04 +0000659 memset(flashchip_contents, 0xff, emu_jedec_ce_60_size);
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +0000660 break;
661 case JEDEC_CE_C7:
662 if (!emu_jedec_ce_c7_size)
663 break;
664 if (writecnt != JEDEC_CE_C7_OUTSIZE) {
665 msg_perr("CHIP ERASE 0xc7 outsize invalid!\n");
666 return 1;
667 }
668 if (readcnt != JEDEC_CE_C7_INSIZE) {
669 msg_perr("CHIP ERASE 0xc7 insize invalid!\n");
670 return 1;
671 }
Carl-Daniel Hailfinger146b77d2011-02-04 22:52:04 +0000672 /* JEDEC_CE_C7_OUTSIZE is 1 (no address) -> no offset. */
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +0000673 /* emu_jedec_ce_c7_size is emu_chip_size. */
674 memset(flashchip_contents, 0xff, emu_jedec_ce_c7_size);
675 break;
676 default:
677 /* No special response. */
678 break;
679 }
Stefan Tauner5e695ab2012-05-06 17:03:40 +0000680 if (writearr[0] != JEDEC_WREN && writearr[0] != JEDEC_EWSR)
681 emu_status &= ~SPI_SR_WEL;
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +0000682 return 0;
683}
684#endif
685
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000686static int dummy_spi_send_command(struct flashctx *flash, unsigned int writecnt,
687 unsigned int readcnt,
688 const unsigned char *writearr,
689 unsigned char *readarr)
Carl-Daniel Hailfingerbfe2e0c2009-05-14 12:59:36 +0000690{
691 int i;
692
Carl-Daniel Hailfinger3ac101c2010-01-09 04:32:23 +0000693 msg_pspew("%s:", __func__);
Carl-Daniel Hailfingerbfe2e0c2009-05-14 12:59:36 +0000694
Carl-Daniel Hailfinger3ac101c2010-01-09 04:32:23 +0000695 msg_pspew(" writing %u bytes:", writecnt);
Carl-Daniel Hailfingerbfe2e0c2009-05-14 12:59:36 +0000696 for (i = 0; i < writecnt; i++)
Carl-Daniel Hailfinger3ac101c2010-01-09 04:32:23 +0000697 msg_pspew(" 0x%02x", writearr[i]);
Carl-Daniel Hailfingerbfe2e0c2009-05-14 12:59:36 +0000698
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +0000699 /* Response for unknown commands and missing chip is 0xff. */
700 memset(readarr, 0xff, readcnt);
701#if EMULATE_SPI_CHIP
702 switch (emu_chip) {
703 case EMULATE_ST_M25P10_RES:
704 case EMULATE_SST_SST25VF040_REMS:
705 case EMULATE_SST_SST25VF032B:
706 if (emulate_spi_chip_response(writecnt, readcnt, writearr,
707 readarr)) {
Carl-Daniel Hailfinger1b83be52012-02-08 23:28:54 +0000708 msg_pdbg("Invalid command sent to flash chip!\n");
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +0000709 return 1;
710 }
711 break;
712 default:
713 break;
714 }
715#endif
Carl-Daniel Hailfinger3ac101c2010-01-09 04:32:23 +0000716 msg_pspew(" reading %u bytes:", readcnt);
Uwe Hermann91f4afa2011-07-28 08:13:25 +0000717 for (i = 0; i < readcnt; i++)
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +0000718 msg_pspew(" 0x%02x", readarr[i]);
Carl-Daniel Hailfinger3ac101c2010-01-09 04:32:23 +0000719 msg_pspew("\n");
Carl-Daniel Hailfingerbfe2e0c2009-05-14 12:59:36 +0000720 return 0;
721}
Carl-Daniel Hailfinger1b0ba892010-06-20 10:58:32 +0000722
Carl-Daniel Hailfinger63fd9022011-12-14 22:25:15 +0000723static int dummy_spi_write_256(struct flashctx *flash, uint8_t *buf,
Stefan Taunerc69c9c82011-11-23 09:13:48 +0000724 unsigned int start, unsigned int len)
Carl-Daniel Hailfinger9a795d82010-07-14 16:19:05 +0000725{
Carl-Daniel Hailfingerf68aa8a2010-11-01 22:07:04 +0000726 return spi_write_chunked(flash, buf, start, len,
727 spi_write_256_chunksize);
Carl-Daniel Hailfinger9a795d82010-07-14 16:19:05 +0000728}