Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 1 | /* |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 2 | * This file is part of the flashrom project. |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 3 | * |
Uwe Hermann | d22a1d4 | 2007-09-09 20:21:05 +0000 | [diff] [blame] | 4 | * Copyright (C) 2000 Silicon Integrated System Corporation |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 5 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 10 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 15 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 19 | */ |
| 20 | |
| 21 | #include "flash.h" |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 22 | |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 23 | static int erase_sector_29f040b(struct flashchip *flash, unsigned long address) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 24 | { |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 25 | int page_size = flash->page_size; |
| 26 | chipaddr bios = flash->virtual_memory; |
| 27 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 28 | chip_writeb(0xAA, bios + 0x555); |
| 29 | chip_writeb(0x55, bios + 0x2AA); |
| 30 | chip_writeb(0x80, bios + 0x555); |
| 31 | chip_writeb(0xAA, bios + 0x555); |
| 32 | chip_writeb(0x55, bios + 0x2AA); |
| 33 | chip_writeb(0x30, bios + address); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 34 | |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 35 | programmer_delay(2 * 1000 * 1000); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 36 | |
| 37 | /* wait for Toggle bit ready */ |
| 38 | toggle_ready_jedec(bios + address); |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 39 | |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 40 | if (check_erased_range(flash, address, page_size)) { |
| 41 | fprintf(stderr, "ERASE FAILED!\n"); |
| 42 | return -1; |
| 43 | } |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 44 | return 0; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 45 | } |
| 46 | |
Uwe Hermann | 09e04f7 | 2009-05-16 22:36:00 +0000 | [diff] [blame] | 47 | static int write_sector_29f040b(chipaddr bios, uint8_t *src, chipaddr dst, |
| 48 | unsigned int page_size) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 49 | { |
| 50 | int i; |
| 51 | |
| 52 | for (i = 0; i < page_size; i++) { |
Uwe Hermann | 0b7afe6 | 2007-04-01 19:44:21 +0000 | [diff] [blame] | 53 | if ((i & 0xfff) == 0xfff) |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 54 | printf("0x%08lx", dst - bios); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 55 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 56 | chip_writeb(0xAA, bios + 0x555); |
| 57 | chip_writeb(0x55, bios + 0x2AA); |
| 58 | chip_writeb(0xA0, bios + 0x555); |
| 59 | chip_writeb(*src++, dst++); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 60 | |
| 61 | /* wait for Toggle bit ready */ |
| 62 | toggle_ready_jedec(bios); |
| 63 | |
Uwe Hermann | 0b7afe6 | 2007-04-01 19:44:21 +0000 | [diff] [blame] | 64 | if ((i & 0xfff) == 0xfff) |
Stefan Reinauer | 99349a5 | 2006-03-16 16:46:19 +0000 | [diff] [blame] | 65 | printf("\b\b\b\b\b\b\b\b\b\b"); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 66 | } |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 67 | |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 68 | return 0; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 69 | } |
| 70 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 71 | int probe_29f040b(struct flashchip *flash) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 72 | { |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 73 | chipaddr bios = flash->virtual_memory; |
Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 74 | uint8_t id1, id2; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 75 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 76 | chip_writeb(0xAA, bios + 0x555); |
| 77 | chip_writeb(0x55, bios + 0x2AA); |
| 78 | chip_writeb(0x90, bios + 0x555); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 79 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 80 | id1 = chip_readb(bios); |
| 81 | id2 = chip_readb(bios + 0x01); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 82 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 83 | chip_writeb(0xF0, bios); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 84 | |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 85 | programmer_delay(10); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 86 | |
Peter Stuge | 5cafc33 | 2009-01-25 23:52:45 +0000 | [diff] [blame] | 87 | printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 88 | if (id1 == flash->manufacture_id && id2 == flash->model_id) |
| 89 | return 1; |
| 90 | |
| 91 | return 0; |
| 92 | } |
| 93 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 94 | int erase_29f040b(struct flashchip *flash) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 95 | { |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 96 | int total_size = flash->total_size * 1024; |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 97 | chipaddr bios = flash->virtual_memory; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 98 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 99 | chip_writeb(0xAA, bios + 0x555); |
| 100 | chip_writeb(0x55, bios + 0x2AA); |
| 101 | chip_writeb(0x80, bios + 0x555); |
| 102 | chip_writeb(0xAA, bios + 0x555); |
| 103 | chip_writeb(0x55, bios + 0x2AA); |
| 104 | chip_writeb(0x10, bios + 0x555); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 105 | |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 106 | programmer_delay(10); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 107 | toggle_ready_jedec(bios); |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 108 | |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 109 | if (check_erased_range(flash, 0, total_size)) { |
| 110 | fprintf(stderr, "ERASE FAILED!\n"); |
| 111 | return -1; |
| 112 | } |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 113 | return 0; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 114 | } |
| 115 | |
Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 116 | int write_29f040b(struct flashchip *flash, uint8_t *buf) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 117 | { |
| 118 | int i; |
Uwe Hermann | 0b7afe6 | 2007-04-01 19:44:21 +0000 | [diff] [blame] | 119 | int total_size = flash->total_size * 1024; |
| 120 | int page_size = flash->page_size; |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 121 | chipaddr bios = flash->virtual_memory; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 122 | |
Stefan Reinauer | 99349a5 | 2006-03-16 16:46:19 +0000 | [diff] [blame] | 123 | printf("Programming page "); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 124 | for (i = 0; i < total_size / page_size; i++) { |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 125 | /* erase the page before programming */ |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 126 | if (erase_sector_29f040b(flash, i * page_size)) { |
| 127 | fprintf(stderr, "ERASE FAILED!\n"); |
| 128 | return -1; |
| 129 | } |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 130 | |
| 131 | /* write to the sector */ |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 132 | printf("%04d at address: ", i); |
| 133 | write_sector_29f040b(bios, buf + i * page_size, |
| 134 | bios + i * page_size, page_size); |
| 135 | printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 136 | } |
| 137 | printf("\n"); |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 138 | |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 139 | return 0; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 140 | } |