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Paul Fox05dfbe62009-06-16 21:08:06 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2009 Paul Fox <pgf@laptop.org>
5 * Copyright (C) 2009 Carl-Daniel Hailfinger
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
Carl-Daniel Hailfinger3426ef62009-08-19 13:27:58 +000021#if FT2232_SPI_SUPPORT == 1
22
Paul Fox05dfbe62009-06-16 21:08:06 +000023#include <stdio.h>
24#include <stdint.h>
25#include <string.h>
26#include <stdlib.h>
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +000027#include <ctype.h>
Paul Fox05dfbe62009-06-16 21:08:06 +000028#include "flash.h"
29#include "spi.h"
Paul Fox05dfbe62009-06-16 21:08:06 +000030#include <ftdi.h>
31
Carl-Daniel Hailfinger5609fa72010-01-07 03:32:17 +000032/* Change this to #define if you want lowlevel debugging of commands
33 * sent to the FT2232 SPI controller.
34 */
35#undef COMM_DEBUG
36
37#ifdef COMM_DEBUG
38#define msg_comm_debug printf_debug
39#else
40#define msg_comm_debug(...) do {} while (0)
41#endif
42
Uwe Hermannc67d0372009-10-01 18:40:02 +000043/*
44 * The 'H' chips can run internally at either 12MHz or 60MHz.
45 * The non-H chips can only run at 12MHz.
46 */
Paul Fox05dfbe62009-06-16 21:08:06 +000047#define CLOCK_5X 1
48
Uwe Hermannc67d0372009-10-01 18:40:02 +000049/*
50 * In either case, the divisor is a simple integer clock divider.
51 * If CLOCK_5X is set, this divisor divides 30MHz, else it divides 6MHz.
52 */
53#define DIVIDE_BY 3 /* e.g. '3' will give either 10MHz or 2MHz SPI clock. */
Paul Fox05dfbe62009-06-16 21:08:06 +000054
Uwe Hermannc67d0372009-10-01 18:40:02 +000055#define BITMODE_BITBANG_NORMAL 1
56#define BITMODE_BITBANG_SPI 2
Paul Fox05dfbe62009-06-16 21:08:06 +000057
58static struct ftdi_context ftdic_context;
59
60int send_buf(struct ftdi_context *ftdic, const unsigned char *buf, int size)
61{
62 int r;
63 r = ftdi_write_data(ftdic, (unsigned char *) buf, size);
64 if (r < 0) {
65 fprintf(stderr, "ftdi_write_data: %d, %s\n", r,
66 ftdi_get_error_string(ftdic));
67 return 1;
68 }
69 return 0;
70}
71
72int get_buf(struct ftdi_context *ftdic, const unsigned char *buf, int size)
73{
74 int r;
75 r = ftdi_read_data(ftdic, (unsigned char *) buf, size);
76 if (r < 0) {
77 fprintf(stderr, "ftdi_read_data: %d, %s\n", r,
78 ftdi_get_error_string(ftdic));
79 return 1;
80 }
81 return 0;
82}
83
84int ft2232_spi_init(void)
85{
86 int f;
87 struct ftdi_context *ftdic = &ftdic_context;
88 unsigned char buf[512];
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +000089 char *portpos = NULL;
90 int ft2232_type = FTDI_FT4232H;
91 enum ftdi_interface ft2232_interface = INTERFACE_B;
Paul Fox05dfbe62009-06-16 21:08:06 +000092
93 if (ftdi_init(ftdic) < 0) {
94 fprintf(stderr, "ftdi_init failed\n");
Uwe Hermannc67d0372009-10-01 18:40:02 +000095 return EXIT_FAILURE; // TODO
Paul Fox05dfbe62009-06-16 21:08:06 +000096 }
97
Carl-Daniel Hailfingeref58a9c2009-08-12 13:32:56 +000098 if (programmer_param && !strlen(programmer_param)) {
99 free(programmer_param);
100 programmer_param = NULL;
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +0000101 }
Carl-Daniel Hailfingeref58a9c2009-08-12 13:32:56 +0000102 if (programmer_param) {
103 if (strstr(programmer_param, "2232"))
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +0000104 ft2232_type = FTDI_FT2232H;
Carl-Daniel Hailfingeref58a9c2009-08-12 13:32:56 +0000105 if (strstr(programmer_param, "4232"))
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +0000106 ft2232_type = FTDI_FT4232H;
Carl-Daniel Hailfingeref58a9c2009-08-12 13:32:56 +0000107 portpos = strstr(programmer_param, "port=");
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +0000108 if (portpos) {
109 portpos += 5;
110 switch (toupper(*portpos)) {
111 case 'A':
112 ft2232_interface = INTERFACE_A;
113 break;
114 case 'B':
115 ft2232_interface = INTERFACE_B;
116 break;
117 default:
118 fprintf(stderr, "Invalid interface specified, "
119 "using default.\n");
120 }
121 }
Carl-Daniel Hailfingeref58a9c2009-08-12 13:32:56 +0000122 free(programmer_param);
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +0000123 }
124 printf_debug("Using device type %s ",
125 (ft2232_type == FTDI_FT2232H) ? "2232H" : "4232H");
126 printf_debug("interface %s\n",
127 (ft2232_interface == INTERFACE_A) ? "A" : "B");
128
129 f = ftdi_usb_open(ftdic, 0x0403, ft2232_type);
Paul Fox05dfbe62009-06-16 21:08:06 +0000130
131 if (f < 0 && f != -5) {
Uwe Hermannc67d0372009-10-01 18:40:02 +0000132 fprintf(stderr, "Unable to open FTDI device: %d (%s)\n", f,
Paul Fox05dfbe62009-06-16 21:08:06 +0000133 ftdi_get_error_string(ftdic));
Uwe Hermannc67d0372009-10-01 18:40:02 +0000134 exit(-1); // TODO
Paul Fox05dfbe62009-06-16 21:08:06 +0000135 }
136
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +0000137 if (ftdi_set_interface(ftdic, ft2232_interface) < 0) {
138 fprintf(stderr, "Unable to select interface: %s\n",
Paul Fox05dfbe62009-06-16 21:08:06 +0000139 ftdic->error_str);
140 }
141
142 if (ftdi_usb_reset(ftdic) < 0) {
Uwe Hermannc67d0372009-10-01 18:40:02 +0000143 fprintf(stderr, "Unable to reset FTDI device\n");
Paul Fox05dfbe62009-06-16 21:08:06 +0000144 }
145
146 if (ftdi_set_latency_timer(ftdic, 2) < 0) {
147 fprintf(stderr, "Unable to set latency timer\n");
148 }
149
150 if (ftdi_write_data_set_chunksize(ftdic, 512)) {
151 fprintf(stderr, "Unable to set chunk size\n");
152 }
153
Uwe Hermannc67d0372009-10-01 18:40:02 +0000154 if (ftdi_set_bitmode(ftdic, 0x00, BITMODE_BITBANG_SPI) < 0) {
155 fprintf(stderr, "Unable to set bitmode to SPI\n");
Paul Fox05dfbe62009-06-16 21:08:06 +0000156 }
157
158#if CLOCK_5X
159 printf_debug("Disable divide-by-5 front stage\n");
Uwe Hermannc67d0372009-10-01 18:40:02 +0000160 buf[0] = 0x8a; /* Disable divide-by-5. */
Paul Fox05dfbe62009-06-16 21:08:06 +0000161 if (send_buf(ftdic, buf, 1))
162 return -1;
163#define MPSSE_CLK 60.0
164
165#else
166
167#define MPSSE_CLK 12.0
168
169#endif
170 printf_debug("Set clock divisor\n");
171 buf[0] = 0x86; /* command "set divisor" */
172 /* valueL/valueH are (desired_divisor - 1) */
Uwe Hermannc67d0372009-10-01 18:40:02 +0000173 buf[1] = (DIVIDE_BY - 1) & 0xff;
174 buf[2] = ((DIVIDE_BY - 1) >> 8) & 0xff;
Paul Fox05dfbe62009-06-16 21:08:06 +0000175 if (send_buf(ftdic, buf, 3))
176 return -1;
177
178 printf("SPI clock is %fMHz\n",
Uwe Hermannc67d0372009-10-01 18:40:02 +0000179 (double)(MPSSE_CLK / (((DIVIDE_BY - 1) + 1) * 2)));
Paul Fox05dfbe62009-06-16 21:08:06 +0000180
Uwe Hermannc67d0372009-10-01 18:40:02 +0000181 /* Disconnect TDI/DO to TDO/DI for loopback. */
182 printf_debug("No loopback of TDI/DO TDO/DI\n");
Paul Fox05dfbe62009-06-16 21:08:06 +0000183 buf[0] = 0x85;
184 if (send_buf(ftdic, buf, 1))
185 return -1;
186
187 printf_debug("Set data bits\n");
188 /* Set data bits low-byte command:
189 * value: 0x08 CS=high, DI=low, DO=low, SK=low
190 * dir: 0x0b CS=output, DI=input, DO=output, SK=output
191 */
192#define CS_BIT 0x08
Paul Fox05dfbe62009-06-16 21:08:06 +0000193 buf[0] = SET_BITS_LOW;
Stefan Reinauerab044b22009-09-16 08:26:59 +0000194 buf[1] = CS_BIT;
Paul Fox05dfbe62009-06-16 21:08:06 +0000195 buf[2] = 0x0b;
196 if (send_buf(ftdic, buf, 3))
197 return -1;
198
Uwe Hermannc67d0372009-10-01 18:40:02 +0000199 // printf_debug("\nft2232 chosen\n");
Paul Fox05dfbe62009-06-16 21:08:06 +0000200
201 buses_supported = CHIP_BUSTYPE_SPI;
202 spi_controller = SPI_CONTROLLER_FT2232;
203
204 return 0;
205}
206
Carl-Daniel Hailfingerd0478292009-07-10 21:08:55 +0000207int ft2232_spi_send_command(unsigned int writecnt, unsigned int readcnt,
Paul Fox05dfbe62009-06-16 21:08:06 +0000208 const unsigned char *writearr, unsigned char *readarr)
209{
210 struct ftdi_context *ftdic = &ftdic_context;
211 static unsigned char *buf = NULL;
Carl-Daniel Hailfingera2441ce2009-11-22 01:33:40 +0000212 /* failed is special. We use bitwise ops, but it is essentially bool. */
213 int i = 0, ret = 0, failed = 0;
Carl-Daniel Hailfingerb7e01452009-11-25 16:58:17 +0000214 int bufsize;
215 static int oldbufsize = 0;
Paul Fox05dfbe62009-06-16 21:08:06 +0000216
Carl-Daniel Hailfinger142e30f2009-07-14 10:26:56 +0000217 if (writecnt > 65536 || readcnt > 65536)
218 return SPI_INVALID_LENGTH;
219
Carl-Daniel Hailfingerb7e01452009-11-25 16:58:17 +0000220 /* buf is not used for the response from the chip. */
221 bufsize = max(writecnt + 9, 260 + 9);
222 /* Never shrink. realloc() calls are expensive. */
223 if (bufsize > oldbufsize) {
224 buf = realloc(buf, bufsize);
225 if (!buf) {
226 fprintf(stderr, "Out of memory!\n");
227 exit(1);
228 }
229 oldbufsize = bufsize;
Paul Fox05dfbe62009-06-16 21:08:06 +0000230 }
231
Uwe Hermannc67d0372009-10-01 18:40:02 +0000232 /*
233 * Minimize USB transfers by packing as many commands as possible
234 * together. If we're not expecting to read, we can assert CS#, write,
235 * and deassert CS# all in one shot. If reading, we do three separate
Stefan Reinauerab044b22009-09-16 08:26:59 +0000236 * operations.
237 */
Carl-Daniel Hailfinger5609fa72010-01-07 03:32:17 +0000238 msg_comm_debug("Assert CS#\n");
Paul Fox05dfbe62009-06-16 21:08:06 +0000239 buf[i++] = SET_BITS_LOW;
Stefan Reinauerab044b22009-09-16 08:26:59 +0000240 buf[i++] = 0 & ~CS_BIT; /* assertive */
Paul Fox05dfbe62009-06-16 21:08:06 +0000241 buf[i++] = 0x0b;
242
243 if (writecnt) {
244 buf[i++] = 0x11;
245 buf[i++] = (writecnt - 1) & 0xff;
246 buf[i++] = ((writecnt - 1) >> 8) & 0xff;
Uwe Hermannc67d0372009-10-01 18:40:02 +0000247 memcpy(buf + i, writearr, writecnt);
Paul Fox05dfbe62009-06-16 21:08:06 +0000248 i += writecnt;
249 }
250
Uwe Hermannc67d0372009-10-01 18:40:02 +0000251 /*
252 * Optionally terminate this batch of commands with a
Paul Fox05dfbe62009-06-16 21:08:06 +0000253 * read command, then do the fetch of the results.
254 */
255 if (readcnt) {
256 buf[i++] = 0x20;
257 buf[i++] = (readcnt - 1) & 0xff;
258 buf[i++] = ((readcnt - 1) >> 8) & 0xff;
259 ret = send_buf(ftdic, buf, i);
Carl-Daniel Hailfingera2441ce2009-11-22 01:33:40 +0000260 failed = ret;
261 /* We can't abort here, we still have to deassert CS#. */
262 if (ret)
263 fprintf(stderr, "send_buf failed before read: %i\n",
264 ret);
Paul Fox05dfbe62009-06-16 21:08:06 +0000265 i = 0;
Stefan Reinauerab044b22009-09-16 08:26:59 +0000266 if (ret == 0) {
Uwe Hermannc67d0372009-10-01 18:40:02 +0000267 /*
268 * FIXME: This is unreliable. There's no guarantee that
269 * we read the response directly after sending the read
270 * command. We may be scheduled out etc.
Stefan Reinauerab044b22009-09-16 08:26:59 +0000271 */
272 ret = get_buf(ftdic, readarr, readcnt);
Carl-Daniel Hailfingera2441ce2009-11-22 01:33:40 +0000273 failed |= ret;
274 /* We can't abort here either. */
275 if (ret)
276 fprintf(stderr, "get_buf failed: %i\n", ret);
Stefan Reinauerab044b22009-09-16 08:26:59 +0000277 }
Paul Fox05dfbe62009-06-16 21:08:06 +0000278 }
279
Carl-Daniel Hailfinger5609fa72010-01-07 03:32:17 +0000280 msg_comm_debug("De-assert CS#\n");
Paul Fox05dfbe62009-06-16 21:08:06 +0000281 buf[i++] = SET_BITS_LOW;
Stefan Reinauerab044b22009-09-16 08:26:59 +0000282 buf[i++] = CS_BIT;
Paul Fox05dfbe62009-06-16 21:08:06 +0000283 buf[i++] = 0x0b;
Carl-Daniel Hailfingera2441ce2009-11-22 01:33:40 +0000284 ret = send_buf(ftdic, buf, i);
285 failed |= ret;
286 if (ret)
287 fprintf(stderr, "send_buf failed at end: %i\n", ret);
Paul Fox05dfbe62009-06-16 21:08:06 +0000288
Carl-Daniel Hailfingera2441ce2009-11-22 01:33:40 +0000289 return failed ? -1 : 0;
Paul Fox05dfbe62009-06-16 21:08:06 +0000290}
291
292int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len)
293{
294 /* Maximum read length is 64k bytes. */
295 return spi_read_chunked(flash, buf, start, len, 64 * 1024);
296}
297
298int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf)
299{
300 int total_size = 1024 * flash->total_size;
301 int i;
302
Carl-Daniel Hailfinger116081a2009-08-10 02:29:21 +0000303 spi_disable_blockprotect();
Uwe Hermannc67d0372009-10-01 18:40:02 +0000304 /* Erase first. */
Carl-Daniel Hailfinger116081a2009-08-10 02:29:21 +0000305 printf("Erasing flash before programming... ");
Carl-Daniel Hailfingerf38431a2009-09-05 02:30:58 +0000306 if (erase_flash(flash)) {
Carl-Daniel Hailfinger116081a2009-08-10 02:29:21 +0000307 fprintf(stderr, "ERASE FAILED!\n");
308 return -1;
309 }
310 printf("done.\n");
Paul Fox05dfbe62009-06-16 21:08:06 +0000311 printf_debug("total_size is %d\n", total_size);
312 for (i = 0; i < total_size; i += 256) {
313 int l, r;
314 if (i + 256 <= total_size)
315 l = 256;
316 else
317 l = total_size - i;
318
Paul Fox05dfbe62009-06-16 21:08:06 +0000319 if ((r = spi_nbyte_program(i, &buf[i], l))) {
Uwe Hermann04aa59a2009-09-02 22:09:00 +0000320 fprintf(stderr, "%s: write fail %d\n", __func__, r);
Paul Fox05dfbe62009-06-16 21:08:06 +0000321 return 1;
322 }
Uwe Hermannc67d0372009-10-01 18:40:02 +0000323
Paul Fox05dfbe62009-06-16 21:08:06 +0000324 while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
325 /* loop */;
326 }
Paul Fox05dfbe62009-06-16 21:08:06 +0000327
328 return 0;
329}
330
Paul Fox05dfbe62009-06-16 21:08:06 +0000331#endif