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Paul Fox05dfbe62009-06-16 21:08:06 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2009 Paul Fox <pgf@laptop.org>
5 * Copyright (C) 2009 Carl-Daniel Hailfinger
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include <stdio.h>
22#include <stdint.h>
23#include <string.h>
24#include <stdlib.h>
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +000025#include <ctype.h>
Paul Fox05dfbe62009-06-16 21:08:06 +000026#include "flash.h"
27#include "spi.h"
28
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +000029char *ft2232spi_param = NULL;
30
Paul Fox05dfbe62009-06-16 21:08:06 +000031#if FT2232_SPI_SUPPORT == 1
32
33#include <ftdi.h>
34
35/* the 'H' chips can run internally at either 12Mhz or 60Mhz.
36 * the non-H chips can only run at 12Mhz. */
37#define CLOCK_5X 1
38
39/* in either case, the divisor is a simple integer clock divider.
40 * if CLOCK_5X is set, this divisor divides 30Mhz, else it
41 * divides 6Mhz */
42#define DIVIDE_BY 3 // e.g. '3' will give either 10Mhz or 2Mhz spi clock
43
44
45static struct ftdi_context ftdic_context;
46
47int send_buf(struct ftdi_context *ftdic, const unsigned char *buf, int size)
48{
49 int r;
50 r = ftdi_write_data(ftdic, (unsigned char *) buf, size);
51 if (r < 0) {
52 fprintf(stderr, "ftdi_write_data: %d, %s\n", r,
53 ftdi_get_error_string(ftdic));
54 return 1;
55 }
56 return 0;
57}
58
59int get_buf(struct ftdi_context *ftdic, const unsigned char *buf, int size)
60{
61 int r;
62 r = ftdi_read_data(ftdic, (unsigned char *) buf, size);
63 if (r < 0) {
64 fprintf(stderr, "ftdi_read_data: %d, %s\n", r,
65 ftdi_get_error_string(ftdic));
66 return 1;
67 }
68 return 0;
69}
70
71int ft2232_spi_init(void)
72{
73 int f;
74 struct ftdi_context *ftdic = &ftdic_context;
75 unsigned char buf[512];
76 unsigned char port_val = 0;
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +000077 char *portpos = NULL;
78 int ft2232_type = FTDI_FT4232H;
79 enum ftdi_interface ft2232_interface = INTERFACE_B;
Paul Fox05dfbe62009-06-16 21:08:06 +000080
81 if (ftdi_init(ftdic) < 0) {
82 fprintf(stderr, "ftdi_init failed\n");
83 return EXIT_FAILURE;
84 }
85
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +000086 if (ft2232spi_param && !strlen(ft2232spi_param)) {
87 free(ft2232spi_param);
88 ft2232spi_param = NULL;
89 }
90 if (ft2232spi_param) {
91 if (strstr(ft2232spi_param, "2232"))
92 ft2232_type = FTDI_FT2232H;
93 if (strstr(ft2232spi_param, "4232"))
94 ft2232_type = FTDI_FT4232H;
95 portpos = strstr(ft2232spi_param, "port=");
96 if (portpos) {
97 portpos += 5;
98 switch (toupper(*portpos)) {
99 case 'A':
100 ft2232_interface = INTERFACE_A;
101 break;
102 case 'B':
103 ft2232_interface = INTERFACE_B;
104 break;
105 default:
106 fprintf(stderr, "Invalid interface specified, "
107 "using default.\n");
108 }
109 }
110 free(ft2232spi_param);
111 }
112 printf_debug("Using device type %s ",
113 (ft2232_type == FTDI_FT2232H) ? "2232H" : "4232H");
114 printf_debug("interface %s\n",
115 (ft2232_interface == INTERFACE_A) ? "A" : "B");
116
117 f = ftdi_usb_open(ftdic, 0x0403, ft2232_type);
Paul Fox05dfbe62009-06-16 21:08:06 +0000118
119 if (f < 0 && f != -5) {
120 fprintf(stderr, "Unable to open ftdi device: %d (%s)\n", f,
121 ftdi_get_error_string(ftdic));
122 exit(-1);
123 }
124
Carl-Daniel Hailfingerfeea2722009-07-01 00:02:23 +0000125 if (ftdi_set_interface(ftdic, ft2232_interface) < 0) {
126 fprintf(stderr, "Unable to select interface: %s\n",
Paul Fox05dfbe62009-06-16 21:08:06 +0000127 ftdic->error_str);
128 }
129
130 if (ftdi_usb_reset(ftdic) < 0) {
131 fprintf(stderr, "Unable to reset ftdi device\n");
132 }
133
134 if (ftdi_set_latency_timer(ftdic, 2) < 0) {
135 fprintf(stderr, "Unable to set latency timer\n");
136 }
137
138 if (ftdi_write_data_set_chunksize(ftdic, 512)) {
139 fprintf(stderr, "Unable to set chunk size\n");
140 }
141
142 if (ftdi_set_bitmode(ftdic, 0x00, 2) < 0) {
143 fprintf(stderr, "Unable to set bitmode\n");
144 }
145
146#if CLOCK_5X
147 printf_debug("Disable divide-by-5 front stage\n");
148 buf[0] = 0x8a; /* disable divide-by-5 */
149 if (send_buf(ftdic, buf, 1))
150 return -1;
151#define MPSSE_CLK 60.0
152
153#else
154
155#define MPSSE_CLK 12.0
156
157#endif
158 printf_debug("Set clock divisor\n");
159 buf[0] = 0x86; /* command "set divisor" */
160 /* valueL/valueH are (desired_divisor - 1) */
161 buf[1] = (DIVIDE_BY-1) & 0xff;
162 buf[2] = ((DIVIDE_BY-1) >> 8) & 0xff;
163 if (send_buf(ftdic, buf, 3))
164 return -1;
165
166 printf("SPI clock is %fMHz\n",
167 (double)(MPSSE_CLK / (((DIVIDE_BY-1) + 1) * 2)));
168
169 /* Disconnect TDI/DO to TDO/DI for Loopback */
170 printf_debug("No loopback of tdi/do tdo/di\n");
171 buf[0] = 0x85;
172 if (send_buf(ftdic, buf, 1))
173 return -1;
174
175 printf_debug("Set data bits\n");
176 /* Set data bits low-byte command:
177 * value: 0x08 CS=high, DI=low, DO=low, SK=low
178 * dir: 0x0b CS=output, DI=input, DO=output, SK=output
179 */
180#define CS_BIT 0x08
181
182 buf[0] = SET_BITS_LOW;
183 buf[1] = (port_val = CS_BIT);
184 buf[2] = 0x0b;
185 if (send_buf(ftdic, buf, 3))
186 return -1;
187
188 printf_debug("\nft2232 chosen\n");
189
190 buses_supported = CHIP_BUSTYPE_SPI;
191 spi_controller = SPI_CONTROLLER_FT2232;
192
193 return 0;
194}
195
196int ft2232_spi_command(unsigned int writecnt, unsigned int readcnt,
197 const unsigned char *writearr, unsigned char *readarr)
198{
199 struct ftdi_context *ftdic = &ftdic_context;
200 static unsigned char *buf = NULL;
201 unsigned char port_val = 0;
202 int i, ret = 0;
203
204 buf = realloc(buf, writecnt + readcnt + 100);
205 if (!buf) {
206 fprintf(stderr, "Out of memory!\n");
207 exit(1);
208 }
209
210 i = 0;
211
212 /* minimize USB transfers by packing as many commands
213 * as possible together. if we're not expecting to
214 * read, we can assert CS, write, and deassert CS all
215 * in one shot. if reading, we do three separate
216 * operations. */
217 printf_debug("Assert CS#\n");
218 buf[i++] = SET_BITS_LOW;
219 buf[i++] = (port_val &= ~CS_BIT);
220 buf[i++] = 0x0b;
221
222 if (writecnt) {
223 buf[i++] = 0x11;
224 buf[i++] = (writecnt - 1) & 0xff;
225 buf[i++] = ((writecnt - 1) >> 8) & 0xff;
226 memcpy(buf+i, writearr, writecnt);
227 i += writecnt;
228 }
229
230 /* optionally terminate this batch of commands with a
231 * read command, then do the fetch of the results.
232 */
233 if (readcnt) {
234 buf[i++] = 0x20;
235 buf[i++] = (readcnt - 1) & 0xff;
236 buf[i++] = ((readcnt - 1) >> 8) & 0xff;
237 ret = send_buf(ftdic, buf, i);
238 i = 0;
239 if (ret) goto deassert_cs;
240
241 /* FIXME: This is unreliable. There's no guarantee that we read
242 * the response directly after sending the read command.
243 * We may be scheduled out etc.
244 */
245 ret = get_buf(ftdic, readarr, readcnt);
246
247 }
248
Uwe Hermann1432a602009-06-28 23:26:37 +0000249deassert_cs:
Paul Fox05dfbe62009-06-16 21:08:06 +0000250 printf_debug("De-assert CS#\n");
251 buf[i++] = SET_BITS_LOW;
252 buf[i++] = (port_val |= CS_BIT);
253 buf[i++] = 0x0b;
254 if (send_buf(ftdic, buf, i))
255 return -1;
256
257 return ret;
258}
259
260int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len)
261{
262 /* Maximum read length is 64k bytes. */
263 return spi_read_chunked(flash, buf, start, len, 64 * 1024);
264}
265
266int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf)
267{
268 int total_size = 1024 * flash->total_size;
269 int i;
270
271 printf_debug("total_size is %d\n", total_size);
272 for (i = 0; i < total_size; i += 256) {
273 int l, r;
274 if (i + 256 <= total_size)
275 l = 256;
276 else
277 l = total_size - i;
278
279 spi_write_enable();
280 if ((r = spi_nbyte_program(i, &buf[i], l))) {
281 fprintf(stderr, "%s: write fail %d\n", __FUNCTION__, r);
282 // spi_write_disable(); chip does this for us
283 return 1;
284 }
285
286 while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
287 /* loop */;
288 }
289 // spi_write_disable(); chip does this for us
290
291 return 0;
292}
293
294#else
295int ft2232_spi_init(void)
296{
297 fprintf(stderr, "FT2232 SPI support was not compiled in\n");
298 exit(1);
299}
300
301int ft2232_spi_command(unsigned int writecnt, unsigned int readcnt,
302 const unsigned char *writearr, unsigned char *readarr)
303{
304 fprintf(stderr, "FT2232 SPI support was not compiled in\n");
305 exit(1);
306}
307
308int ft2232_spi_read(struct flashchip *flash, uint8_t *buf, int start, int len)
309{
310 fprintf(stderr, "FT2232 SPI support was not compiled in\n");
311 exit(1);
312}
313
314int ft2232_spi_write_256(struct flashchip *flash, uint8_t *buf)
315{
316 fprintf(stderr, "FT2232 SPI support was not compiled in\n");
317 exit(1);
318}
319#endif