Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 1 | /* |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 2 | * This file is part of the flashrom project. |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 3 | * |
Uwe Hermann | d22a1d4 | 2007-09-09 20:21:05 +0000 | [diff] [blame] | 4 | * Copyright (C) 2000 Silicon Integrated System Corporation |
| 5 | * Copyright (C) 2005 coresystems GmbH <stepan@openbios.org> |
Sean Nelson | 51c83fb | 2010-01-20 20:55:53 +0000 | [diff] [blame] | 6 | * Copyright (C) 2009 Sean Nelson <audiohacked@gmail.com> |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 7 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2 of the License, or |
| 11 | * (at your option) any later version. |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 12 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 17 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 21 | */ |
| 22 | |
| 23 | #include "flash.h" |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 24 | #include "chipdrivers.h" |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 25 | |
| 26 | #define AUTO_PG_ERASE1 0x20 |
| 27 | #define AUTO_PG_ERASE2 0xD0 |
Ollie Lho | cf29de8 | 2004-03-18 19:40:07 +0000 | [diff] [blame] | 28 | #define AUTO_PGRM 0x10 |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 29 | #define CHIP_ERASE 0x30 |
| 30 | #define RESET 0xFF |
| 31 | #define READ_ID 0x90 |
| 32 | |
Carl-Daniel Hailfinger | 79e6757 | 2010-10-13 21:49:30 +0000 | [diff] [blame^] | 33 | int protect_28sf040(struct flashchip *flash) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 34 | { |
Carl-Daniel Hailfinger | b30a5ed | 2010-10-10 14:02:27 +0000 | [diff] [blame] | 35 | chipaddr bios = flash->virtual_memory; |
| 36 | |
Stefan Reinauer | 9e72aa5 | 2009-09-16 08:18:08 +0000 | [diff] [blame] | 37 | chip_readb(bios + 0x1823); |
| 38 | chip_readb(bios + 0x1820); |
| 39 | chip_readb(bios + 0x1822); |
| 40 | chip_readb(bios + 0x0418); |
| 41 | chip_readb(bios + 0x041B); |
| 42 | chip_readb(bios + 0x0419); |
| 43 | chip_readb(bios + 0x040A); |
Carl-Daniel Hailfinger | 79e6757 | 2010-10-13 21:49:30 +0000 | [diff] [blame^] | 44 | |
| 45 | return 0; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 46 | } |
| 47 | |
Carl-Daniel Hailfinger | 79e6757 | 2010-10-13 21:49:30 +0000 | [diff] [blame^] | 48 | int unprotect_28sf040(struct flashchip *flash) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 49 | { |
Carl-Daniel Hailfinger | b30a5ed | 2010-10-10 14:02:27 +0000 | [diff] [blame] | 50 | chipaddr bios = flash->virtual_memory; |
| 51 | |
Stefan Reinauer | 9e72aa5 | 2009-09-16 08:18:08 +0000 | [diff] [blame] | 52 | chip_readb(bios + 0x1823); |
| 53 | chip_readb(bios + 0x1820); |
| 54 | chip_readb(bios + 0x1822); |
| 55 | chip_readb(bios + 0x0418); |
| 56 | chip_readb(bios + 0x041B); |
| 57 | chip_readb(bios + 0x0419); |
| 58 | chip_readb(bios + 0x041A); |
Carl-Daniel Hailfinger | 79e6757 | 2010-10-13 21:49:30 +0000 | [diff] [blame^] | 59 | |
| 60 | return 0; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 61 | } |
| 62 | |
Sean Nelson | 51c83fb | 2010-01-20 20:55:53 +0000 | [diff] [blame] | 63 | int erase_sector_28sf040(struct flashchip *flash, unsigned int address, unsigned int sector_size) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 64 | { |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 65 | chipaddr bios = flash->virtual_memory; |
| 66 | |
Carl-Daniel Hailfinger | 79e6757 | 2010-10-13 21:49:30 +0000 | [diff] [blame^] | 67 | /* This command sequence is very similar to erase_block_82802ab. */ |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 68 | chip_writeb(AUTO_PG_ERASE1, bios); |
| 69 | chip_writeb(AUTO_PG_ERASE2, bios + address); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 70 | |
Carl-Daniel Hailfinger | b30a5ed | 2010-10-10 14:02:27 +0000 | [diff] [blame] | 71 | /* wait for Toggle bit ready */ |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 72 | toggle_ready_jedec(bios); |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 73 | |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 74 | if (check_erased_range(flash, address, sector_size)) { |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 75 | msg_cerr("ERASE FAILED!\n"); |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 76 | return -1; |
| 77 | } |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 78 | return 0; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 79 | } |
| 80 | |
Carl-Daniel Hailfinger | b30a5ed | 2010-10-10 14:02:27 +0000 | [diff] [blame] | 81 | int write_sector_28sf040(struct flashchip *flash, uint8_t *src, int start, int len) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 82 | { |
| 83 | int i; |
Carl-Daniel Hailfinger | b30a5ed | 2010-10-10 14:02:27 +0000 | [diff] [blame] | 84 | chipaddr bios = flash->virtual_memory; |
| 85 | chipaddr dst = flash->virtual_memory + start; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 86 | |
Carl-Daniel Hailfinger | b30a5ed | 2010-10-10 14:02:27 +0000 | [diff] [blame] | 87 | for (i = 0; i < len; i++) { |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 88 | /* transfer data from source to destination */ |
| 89 | if (*src == 0xFF) { |
| 90 | dst++, src++; |
| 91 | /* If the data is 0xFF, don't program it */ |
| 92 | continue; |
| 93 | } |
| 94 | /*issue AUTO PROGRAM command */ |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 95 | chip_writeb(AUTO_PGRM, dst); |
| 96 | chip_writeb(*src++, dst++); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 97 | |
| 98 | /* wait for Toggle bit ready */ |
| 99 | toggle_ready_jedec(bios); |
| 100 | } |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 101 | |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 102 | return 0; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 103 | } |
| 104 | |
Carl-Daniel Hailfinger | ad3cc55 | 2010-07-03 11:02:10 +0000 | [diff] [blame] | 105 | static int erase_28sf040(struct flashchip *flash) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 106 | { |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 107 | chipaddr bios = flash->virtual_memory; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 108 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 109 | chip_writeb(CHIP_ERASE, bios); |
| 110 | chip_writeb(CHIP_ERASE, bios); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 111 | |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 112 | programmer_delay(10); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 113 | toggle_ready_jedec(bios); |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 114 | |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 115 | if (check_erased_range(flash, 0, flash->total_size * 1024)) { |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 116 | msg_cerr("ERASE FAILED!\n"); |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 117 | return -1; |
| 118 | } |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 119 | return 0; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 120 | } |
| 121 | |
Carl-Daniel Hailfinger | 79e6757 | 2010-10-13 21:49:30 +0000 | [diff] [blame^] | 122 | /* chunksize is 1 */ |
Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 123 | int write_28sf040(struct flashchip *flash, uint8_t *buf) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 124 | { |
Carl-Daniel Hailfinger | 79e6757 | 2010-10-13 21:49:30 +0000 | [diff] [blame^] | 125 | return write_sector_28sf040(flash, buf, 0, flash->total_size * 1024); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 126 | } |
Sean Nelson | 51c83fb | 2010-01-20 20:55:53 +0000 | [diff] [blame] | 127 | |
| 128 | int erase_chip_28sf040(struct flashchip *flash, unsigned int addr, unsigned int blocklen) |
| 129 | { |
| 130 | if ((addr != 0) || (blocklen != flash->total_size * 1024)) { |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 131 | msg_cerr("%s called with incorrect arguments\n", |
Sean Nelson | 51c83fb | 2010-01-20 20:55:53 +0000 | [diff] [blame] | 132 | __func__); |
| 133 | return -1; |
| 134 | } |
| 135 | return erase_28sf040(flash); |
| 136 | } |