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Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00003 *
Uwe Hermannd22a1d42007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2005 coresystems GmbH <stepan@openbios.org>
Sean Nelson51c83fb2010-01-20 20:55:53 +00006 * Copyright (C) 2009 Sean Nelson <audiohacked@gmail.com>
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00007 *
Uwe Hermannd1107642007-08-29 17:52:32 +00008 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000012 *
Uwe Hermannd1107642007-08-29 17:52:32 +000013 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000017 *
Uwe Hermannd1107642007-08-29 17:52:32 +000018 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000021 */
22
23#include "flash.h"
Sean Nelson14ba6682010-02-26 05:48:29 +000024#include "chipdrivers.h"
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000025
26#define AUTO_PG_ERASE1 0x20
27#define AUTO_PG_ERASE2 0xD0
Ollie Lhocf29de82004-03-18 19:40:07 +000028#define AUTO_PGRM 0x10
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000029#define CHIP_ERASE 0x30
30#define RESET 0xFF
31#define READ_ID 0x90
32
Carl-Daniel Hailfingerb30a5ed2010-10-10 14:02:27 +000033static void protect_28sf040(struct flashchip *flash)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000034{
Carl-Daniel Hailfingerb30a5ed2010-10-10 14:02:27 +000035 chipaddr bios = flash->virtual_memory;
36
Stefan Reinauer9e72aa52009-09-16 08:18:08 +000037 chip_readb(bios + 0x1823);
38 chip_readb(bios + 0x1820);
39 chip_readb(bios + 0x1822);
40 chip_readb(bios + 0x0418);
41 chip_readb(bios + 0x041B);
42 chip_readb(bios + 0x0419);
43 chip_readb(bios + 0x040A);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000044}
45
Carl-Daniel Hailfingerb30a5ed2010-10-10 14:02:27 +000046static void unprotect_28sf040(struct flashchip *flash)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000047{
Carl-Daniel Hailfingerb30a5ed2010-10-10 14:02:27 +000048 chipaddr bios = flash->virtual_memory;
49
Stefan Reinauer9e72aa52009-09-16 08:18:08 +000050 chip_readb(bios + 0x1823);
51 chip_readb(bios + 0x1820);
52 chip_readb(bios + 0x1822);
53 chip_readb(bios + 0x0418);
54 chip_readb(bios + 0x041B);
55 chip_readb(bios + 0x0419);
56 chip_readb(bios + 0x041A);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000057}
58
Sean Nelson51c83fb2010-01-20 20:55:53 +000059int erase_sector_28sf040(struct flashchip *flash, unsigned int address, unsigned int sector_size)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000060{
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +000061 chipaddr bios = flash->virtual_memory;
62
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000063 chip_writeb(AUTO_PG_ERASE1, bios);
64 chip_writeb(AUTO_PG_ERASE2, bios + address);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000065
Carl-Daniel Hailfingerb30a5ed2010-10-10 14:02:27 +000066 /* wait for Toggle bit ready */
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000067 toggle_ready_jedec(bios);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000068
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +000069 if (check_erased_range(flash, address, sector_size)) {
Sean Nelsoned479d22010-03-24 23:14:32 +000070 msg_cerr("ERASE FAILED!\n");
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +000071 return -1;
72 }
Uwe Hermannffec5f32007-08-23 16:08:21 +000073 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000074}
75
Carl-Daniel Hailfingerb30a5ed2010-10-10 14:02:27 +000076int write_sector_28sf040(struct flashchip *flash, uint8_t *src, int start, int len)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000077{
78 int i;
Carl-Daniel Hailfingerb30a5ed2010-10-10 14:02:27 +000079 chipaddr bios = flash->virtual_memory;
80 chipaddr dst = flash->virtual_memory + start;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000081
Carl-Daniel Hailfingerb30a5ed2010-10-10 14:02:27 +000082 for (i = 0; i < len; i++) {
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000083 /* transfer data from source to destination */
84 if (*src == 0xFF) {
85 dst++, src++;
86 /* If the data is 0xFF, don't program it */
87 continue;
88 }
89 /*issue AUTO PROGRAM command */
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000090 chip_writeb(AUTO_PGRM, dst);
91 chip_writeb(*src++, dst++);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000092
93 /* wait for Toggle bit ready */
94 toggle_ready_jedec(bios);
95 }
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000096
Uwe Hermannffec5f32007-08-23 16:08:21 +000097 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000098}
99
Carl-Daniel Hailfingerad3cc552010-07-03 11:02:10 +0000100static int erase_28sf040(struct flashchip *flash)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000101{
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000102 chipaddr bios = flash->virtual_memory;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000103
Carl-Daniel Hailfingerb30a5ed2010-10-10 14:02:27 +0000104 unprotect_28sf040(flash);
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000105 chip_writeb(CHIP_ERASE, bios);
106 chip_writeb(CHIP_ERASE, bios);
Carl-Daniel Hailfingerb30a5ed2010-10-10 14:02:27 +0000107 protect_28sf040(flash);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000108
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +0000109 programmer_delay(10);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000110 toggle_ready_jedec(bios);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000111
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +0000112 if (check_erased_range(flash, 0, flash->total_size * 1024)) {
Sean Nelsoned479d22010-03-24 23:14:32 +0000113 msg_cerr("ERASE FAILED!\n");
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +0000114 return -1;
115 }
Uwe Hermannffec5f32007-08-23 16:08:21 +0000116 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000117}
118
Ollie Lho184a4042005-11-26 21:55:36 +0000119int write_28sf040(struct flashchip *flash, uint8_t *buf)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000120{
121 int i;
Uwe Hermanna7e05482007-05-09 10:17:44 +0000122 int total_size = flash->total_size * 1024;
123 int page_size = flash->page_size;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000124
Carl-Daniel Hailfingerb30a5ed2010-10-10 14:02:27 +0000125 unprotect_28sf040(flash);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000126
Ollie Lho761bf1b2004-03-20 16:46:10 +0000127 for (i = 0; i < total_size / page_size; i++) {
Carl-Daniel Hailfingerb30a5ed2010-10-10 14:02:27 +0000128 write_sector_28sf040(flash, buf + i * page_size, i * page_size, page_size);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000129 }
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000130
Carl-Daniel Hailfingerb30a5ed2010-10-10 14:02:27 +0000131 protect_28sf040(flash);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000132
Uwe Hermannffec5f32007-08-23 16:08:21 +0000133 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000134}
Sean Nelson51c83fb2010-01-20 20:55:53 +0000135
136int erase_chip_28sf040(struct flashchip *flash, unsigned int addr, unsigned int blocklen)
137{
138 if ((addr != 0) || (blocklen != flash->total_size * 1024)) {
Sean Nelsoned479d22010-03-24 23:14:32 +0000139 msg_cerr("%s called with incorrect arguments\n",
Sean Nelson51c83fb2010-01-20 20:55:53 +0000140 __func__);
141 return -1;
142 }
143 return erase_28sf040(flash);
144}