blob: 48fceb08872df207a676eb74fc1cde80b8d54019 [file] [log] [blame]
Stefan Tauner6ee37e22012-12-29 15:03:51 +00001/*
2 * This file is part of the flashrom project.
3 * It handles everything related to status registers of the JEDEC family 25.
4 *
5 * Copyright (C) 2007, 2008, 2009, 2010 Carl-Daniel Hailfinger
6 * Copyright (C) 2008 coresystems GmbH
7 * Copyright (C) 2008 Ronald Hoogenboom <ronald@zonnet.nl>
8 * Copyright (C) 2012 Stefan Tauner
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; version 2 of the License.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23
24#include "flash.h"
25#include "chipdrivers.h"
26#include "spi.h"
27
28/* === Generic functions === */
29int spi_write_status_enable(struct flashctx *flash)
30{
31 static const unsigned char cmd[JEDEC_EWSR_OUTSIZE] = { JEDEC_EWSR };
32 int result;
33
34 /* Send EWSR (Enable Write Status Register). */
35 result = spi_send_command(flash, sizeof(cmd), JEDEC_EWSR_INSIZE, cmd, NULL);
36
37 if (result)
38 msg_cerr("%s failed\n", __func__);
39
40 return result;
41}
42
43static int spi_write_status_register_flag(struct flashctx *flash, int status, const unsigned char enable_opcode)
44{
45 int result;
46 int i = 0;
47 /*
48 * WRSR requires either EWSR or WREN depending on chip type.
49 * The code below relies on the fact hat EWSR and WREN have the same
50 * INSIZE and OUTSIZE.
51 */
52 struct spi_command cmds[] = {
53 {
54 .writecnt = JEDEC_WREN_OUTSIZE,
55 .writearr = (const unsigned char[]){ enable_opcode },
56 .readcnt = 0,
57 .readarr = NULL,
58 }, {
59 .writecnt = JEDEC_WRSR_OUTSIZE,
60 .writearr = (const unsigned char[]){ JEDEC_WRSR, (unsigned char) status },
61 .readcnt = 0,
62 .readarr = NULL,
63 }, {
64 .writecnt = 0,
65 .writearr = NULL,
66 .readcnt = 0,
67 .readarr = NULL,
68 }};
69
70 result = spi_send_multicommand(flash, cmds);
71 if (result) {
72 msg_cerr("%s failed during command execution\n", __func__);
73 /* No point in waiting for the command to complete if execution
74 * failed.
75 */
76 return result;
77 }
78 /* WRSR performs a self-timed erase before the changes take effect.
79 * This may take 50-85 ms in most cases, and some chips apparently
80 * allow running RDSR only once. Therefore pick an initial delay of
81 * 100 ms, then wait in 10 ms steps until a total of 5 s have elapsed.
82 */
83 programmer_delay(100 * 1000);
84 while (spi_read_status_register(flash) & SPI_SR_WIP) {
85 if (++i > 490) {
86 msg_cerr("Error: WIP bit after WRSR never cleared\n");
87 return TIMEOUT_ERROR;
88 }
89 programmer_delay(10 * 1000);
90 }
91 return 0;
92}
93
94int spi_write_status_register(struct flashctx *flash, int status)
95{
96 int feature_bits = flash->chip->feature_bits;
97 int ret = 1;
98
99 if (!(feature_bits & (FEATURE_WRSR_WREN | FEATURE_WRSR_EWSR))) {
100 msg_cdbg("Missing status register write definition, assuming "
101 "EWSR is needed\n");
102 feature_bits |= FEATURE_WRSR_EWSR;
103 }
104 if (feature_bits & FEATURE_WRSR_WREN)
105 ret = spi_write_status_register_flag(flash, status, JEDEC_WREN);
106 if (ret && (feature_bits & FEATURE_WRSR_EWSR))
107 ret = spi_write_status_register_flag(flash, status, JEDEC_EWSR);
108 return ret;
109}
110
111uint8_t spi_read_status_register(struct flashctx *flash)
112{
113 static const unsigned char cmd[JEDEC_RDSR_OUTSIZE] = { JEDEC_RDSR };
114 /* FIXME: No workarounds for driver/hardware bugs in generic code. */
115 unsigned char readarr[2]; /* JEDEC_RDSR_INSIZE=1 but wbsio needs 2 */
116 int ret;
117
118 /* Read Status Register */
119 ret = spi_send_command(flash, sizeof(cmd), sizeof(readarr), cmd, readarr);
120 if (ret)
121 msg_cerr("RDSR failed!\n");
122
123 return readarr[0];
124}
125
Stefan Tauner9530a022012-12-29 15:04:05 +0000126/* A generic block protection disable.
127 * Tests if a protection is enabled with the block protection mask (bp_mask) and returns success otherwise.
128 * Tests if the register bits are locked with the lock_mask (lock_mask).
Stefan Taunercecb2c52013-06-20 22:55:41 +0000129 * Tests if a hardware protection is active (i.e. low pin/high bit value) with the write protection mask
130 * (wp_mask) and bails out in that case.
131 * If there are register lock bits set we try to disable them by unsetting those bits of the previous register
132 * contents that are set in the lock_mask. We then check if removing the lock bits has worked and continue as if
133 * they never had been engaged:
134 * If the lock bits are out of the way try to disable engaged protections.
135 * To support uncommon global unprotects (e.g. on most AT2[56]xx1(A)) unprotect_mask can be used to force
136 * bits to 0 additionally to those set in bp_mask and lock_mask. Only bits set in unprotect_mask are potentially
137 * preserved when doing the final unprotect.
138 *
139 * To sum up:
140 * bp_mask: set those bits that correspond to the bits in the status register that indicate an active protection
141 * (which should be unset after this function returns).
142 * lock_mask: set the bits that correspond to the bits that lock changing the bits above.
143 * wp_mask: set the bits that correspond to bits indicating non-software revocable protections.
144 * unprotect_mask: set the bits that should be preserved if possible when unprotecting.
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000145 */
Stefan Taunercecb2c52013-06-20 22:55:41 +0000146static int spi_disable_blockprotect_generic(struct flashctx *flash, uint8_t bp_mask, uint8_t lock_mask, uint8_t wp_mask, uint8_t unprotect_mask)
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000147{
148 uint8_t status;
149 int result;
150
151 status = spi_read_status_register(flash);
Stefan Tauner9530a022012-12-29 15:04:05 +0000152 if ((status & bp_mask) == 0) {
153 msg_cdbg2("Block protection is disabled.\n");
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000154 return 0;
Stefan Tauner9530a022012-12-29 15:04:05 +0000155 }
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000156
157 msg_cdbg("Some block protection in effect, disabling... ");
Stefan Tauner9530a022012-12-29 15:04:05 +0000158 if ((status & lock_mask) != 0) {
159 msg_cdbg("\n\tNeed to disable the register lock first... ");
160 if (wp_mask != 0 && (status & wp_mask) == 0) {
161 msg_cerr("Hardware protection is active, disabling write protection is impossible.\n");
162 return 1;
163 }
164 /* All bits except the register lock bit (often called SPRL, SRWD, WPEN) are readonly. */
165 result = spi_write_status_register(flash, status & ~lock_mask);
166 if (result) {
167 msg_cerr("spi_write_status_register failed.\n");
168 return result;
169 }
Stefan Taunercecb2c52013-06-20 22:55:41 +0000170 status = spi_read_status_register(flash);
171 if ((status & lock_mask) != 0) {
172 msg_cerr("Unsetting lock bit(s) failed.\n");
173 return 1;
174 }
Stefan Tauner9530a022012-12-29 15:04:05 +0000175 msg_cdbg("done.\n");
176 }
177 /* Global unprotect. Make sure to mask the register lock bit as well. */
Stefan Taunercecb2c52013-06-20 22:55:41 +0000178 result = spi_write_status_register(flash, status & ~(bp_mask | lock_mask) & unprotect_mask);
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000179 if (result) {
180 msg_cerr("spi_write_status_register failed.\n");
181 return result;
182 }
183 status = spi_read_status_register(flash);
Stefan Tauner9530a022012-12-29 15:04:05 +0000184 if ((status & bp_mask) != 0) {
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000185 msg_cerr("Block protection could not be disabled!\n");
Stefan Taunercecb2c52013-06-20 22:55:41 +0000186 flash->chip->printlock(flash);
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000187 return 1;
188 }
Stefan Tauner9530a022012-12-29 15:04:05 +0000189 msg_cdbg("disabled.\n");
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000190 return 0;
191}
192
Stefan Tauner9530a022012-12-29 15:04:05 +0000193/* A common block protection disable that tries to unset the status register bits masked by 0x3C. */
194int spi_disable_blockprotect(struct flashctx *flash)
195{
Stefan Taunercecb2c52013-06-20 22:55:41 +0000196 return spi_disable_blockprotect_generic(flash, 0x3C, 0, 0, 0xFF);
Stefan Tauner9530a022012-12-29 15:04:05 +0000197}
198
Stefan Tauner278ba6e2013-06-28 21:28:27 +0000199/* A common block protection disable that tries to unset the status register bits masked by 0x1C (BP0-2) and
200 * protected/locked by bit #7. Useful when bit #5 is neither a protection bit nor reserved (and hence possibly
201 * non-0). */
202int spi_disable_blockprotect_bp2_srwd(struct flashctx *flash)
203{
204 return spi_disable_blockprotect_generic(flash, 0x1C, 1 << 7, 0, 0xFF);
205}
206
207/* A common block protection disable that tries to unset the status register bits masked by 0x3C (BP0-3) and
208 * protected/locked by bit #7. */
209int spi_disable_blockprotect_bp3_srwd(struct flashctx *flash)
210{
211 return spi_disable_blockprotect_generic(flash, 0x3C, 1 << 7, 0, 0xFF);
212}
213
214/* A common block protection disable that tries to unset the status register bits masked by 0x7C (BP0-4) and
215 * protected/locked by bit #7. */
216int spi_disable_blockprotect_bp4_srwd(struct flashctx *flash)
217{
218 return spi_disable_blockprotect_generic(flash, 0x7C, 1 << 7, 0, 0xFF);
219}
Stefan Tauner9530a022012-12-29 15:04:05 +0000220
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000221static void spi_prettyprint_status_register_hex(uint8_t status)
222{
223 msg_cdbg("Chip status register is 0x%02x.\n", status);
224}
225
Stefan Taunerb6b00e92013-06-28 21:28:43 +0000226/* Common highest bit: Status Register Write Disable (SRWD) or Status Register Protect (SRP). */
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000227static void spi_prettyprint_status_register_srwd(uint8_t status)
228{
Stefan Taunerb6b00e92013-06-28 21:28:43 +0000229 msg_cdbg("Chip status register: Status Register Write Disable (SRWD, SRP, ...) is %sset\n",
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000230 (status & (1 << 7)) ? "" : "not ");
231}
232
233/* Common highest bit: Block Protect Write Disable (BPL). */
234static void spi_prettyprint_status_register_bpl(uint8_t status)
235{
236 msg_cdbg("Chip status register: Block Protect Write Disable (BPL) is %sset\n",
237 (status & (1 << 7)) ? "" : "not ");
238}
239
240/* Common lowest 2 bits: WEL and WIP. */
241static void spi_prettyprint_status_register_welwip(uint8_t status)
242{
243 msg_cdbg("Chip status register: Write Enable Latch (WEL) is %sset\n",
244 (status & (1 << 1)) ? "" : "not ");
245 msg_cdbg("Chip status register: Write In Progress (WIP/BUSY) is %sset\n",
246 (status & (1 << 0)) ? "" : "not ");
247}
248
249/* Common block protection (BP) bits. */
250static void spi_prettyprint_status_register_bp(uint8_t status, int bp)
251{
252 switch (bp) {
253 /* Fall through. */
254 case 4:
255 msg_cdbg("Chip status register: Block Protect 4 (BP4) is %sset\n",
256 (status & (1 << 5)) ? "" : "not ");
257 case 3:
258 msg_cdbg("Chip status register: Block Protect 3 (BP3) is %sset\n",
259 (status & (1 << 5)) ? "" : "not ");
260 case 2:
261 msg_cdbg("Chip status register: Block Protect 2 (BP2) is %sset\n",
262 (status & (1 << 4)) ? "" : "not ");
263 case 1:
264 msg_cdbg("Chip status register: Block Protect 1 (BP1) is %sset\n",
265 (status & (1 << 3)) ? "" : "not ");
266 case 0:
267 msg_cdbg("Chip status register: Block Protect 0 (BP0) is %sset\n",
268 (status & (1 << 2)) ? "" : "not ");
269 }
270}
271
272/* Unnamed bits. */
Aidan Thorntondb4e87d2013-08-27 18:01:53 +0000273void spi_prettyprint_status_register_bit(uint8_t status, int bit)
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000274{
275 msg_cdbg("Chip status register: Bit %i is %sset\n", bit, (status & (1 << bit)) ? "" : "not ");
276}
277
278int spi_prettyprint_status_register_plain(struct flashctx *flash)
279{
280 uint8_t status = spi_read_status_register(flash);
281 spi_prettyprint_status_register_hex(status);
282 return 0;
283}
284
Stefan Tauner278ba6e2013-06-28 21:28:27 +0000285/* Print the plain hex value and the welwip bits only. */
286int spi_prettyprint_status_register_default_welwip(struct flashctx *flash)
287{
288 uint8_t status = spi_read_status_register(flash);
289 spi_prettyprint_status_register_hex(status);
290
291 spi_prettyprint_status_register_welwip(status);
292 return 0;
293}
294
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000295/* Works for many chips of the
296 * AMIC A25L series
297 * and MX MX25L512
298 */
299int spi_prettyprint_status_register_default_bp1(struct flashctx *flash)
300{
301 uint8_t status = spi_read_status_register(flash);
302 spi_prettyprint_status_register_hex(status);
303
304 spi_prettyprint_status_register_srwd(status);
305 spi_prettyprint_status_register_bit(status, 6);
306 spi_prettyprint_status_register_bit(status, 5);
307 spi_prettyprint_status_register_bit(status, 4);
308 spi_prettyprint_status_register_bp(status, 1);
309 spi_prettyprint_status_register_welwip(status);
310 return 0;
311}
312
313/* Works for many chips of the
314 * AMIC A25L series
Stefan Taunerf4451612013-04-19 01:59:15 +0000315 * PMC Pm25LD series
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000316 */
317int spi_prettyprint_status_register_default_bp2(struct flashctx *flash)
318{
319 uint8_t status = spi_read_status_register(flash);
320 spi_prettyprint_status_register_hex(status);
321
322 spi_prettyprint_status_register_srwd(status);
323 spi_prettyprint_status_register_bit(status, 6);
324 spi_prettyprint_status_register_bit(status, 5);
325 spi_prettyprint_status_register_bp(status, 2);
326 spi_prettyprint_status_register_welwip(status);
327 return 0;
328}
329
330/* Works for many chips of the
331 * ST M25P series
332 * MX MX25L series
333 */
334int spi_prettyprint_status_register_default_bp3(struct flashctx *flash)
335{
336 uint8_t status = spi_read_status_register(flash);
337 spi_prettyprint_status_register_hex(status);
338
339 spi_prettyprint_status_register_srwd(status);
340 spi_prettyprint_status_register_bit(status, 6);
341 spi_prettyprint_status_register_bp(status, 3);
342 spi_prettyprint_status_register_welwip(status);
343 return 0;
344}
345
Stefan Tauner278ba6e2013-06-28 21:28:27 +0000346int spi_prettyprint_status_register_default_bp4(struct flashctx *flash)
347{
348 uint8_t status = spi_read_status_register(flash);
349 spi_prettyprint_status_register_hex(status);
350
351 spi_prettyprint_status_register_srwd(status);
352 spi_prettyprint_status_register_bp(status, 4);
353 spi_prettyprint_status_register_welwip(status);
354 return 0;
355}
356
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000357/* === Amic ===
358 * FIXME: spi_disable_blockprotect is incorrect but works fine for chips using
359 * spi_prettyprint_status_register_default_bp1 or
360 * spi_prettyprint_status_register_default_bp2.
361 * FIXME: spi_disable_blockprotect is incorrect and will fail for chips using
362 * spi_prettyprint_status_register_amic_a25l032 if those have locks controlled
363 * by the second status register.
364 */
365
366int spi_prettyprint_status_register_amic_a25l032(struct flashctx *flash)
367{
368 uint8_t status = spi_read_status_register(flash);
369 spi_prettyprint_status_register_hex(status);
370
371 spi_prettyprint_status_register_srwd(status);
372 msg_cdbg("Chip status register: Sector Protect Size (SEC) is %i KB\n", (status & (1 << 6)) ? 4 : 64);
373 msg_cdbg("Chip status register: Top/Bottom (TB) is %s\n", (status & (1 << 5)) ? "bottom" : "top");
374 spi_prettyprint_status_register_bp(status, 2);
375 spi_prettyprint_status_register_welwip(status);
376 msg_cdbg("Chip status register 2 is NOT decoded!\n");
377 return 0;
378}
379
380/* === Atmel === */
381
382static void spi_prettyprint_status_register_atmel_at25_wpen(uint8_t status)
383{
384 msg_cdbg("Chip status register: Write Protect Enable (WPEN) is %sset\n",
385 (status & (1 << 7)) ? "" : "not ");
386}
387
388static void spi_prettyprint_status_register_atmel_at25_srpl(uint8_t status)
389{
390 msg_cdbg("Chip status register: Sector Protection Register Lock (SRPL) is %sset\n",
391 (status & (1 << 7)) ? "" : "not ");
392}
393
394static void spi_prettyprint_status_register_atmel_at25_epewpp(uint8_t status)
395{
396 msg_cdbg("Chip status register: Erase/Program Error (EPE) is %sset\n",
397 (status & (1 << 5)) ? "" : "not ");
398 msg_cdbg("Chip status register: WP# pin (WPP) is %sasserted\n",
399 (status & (1 << 4)) ? "not " : "");
400}
401
402static void spi_prettyprint_status_register_atmel_at25_swp(uint8_t status)
403{
404 msg_cdbg("Chip status register: Software Protection Status (SWP): ");
405 switch (status & (3 << 2)) {
406 case 0x0 << 2:
407 msg_cdbg("no sectors are protected\n");
408 break;
409 case 0x1 << 2:
410 msg_cdbg("some sectors are protected\n");
411 /* FIXME: Read individual Sector Protection Registers. */
412 break;
413 case 0x3 << 2:
414 msg_cdbg("all sectors are protected\n");
415 break;
416 default:
417 msg_cdbg("reserved for future use\n");
418 break;
419 }
420}
421
422int spi_prettyprint_status_register_at25df(struct flashctx *flash)
423{
424 uint8_t status = spi_read_status_register(flash);
425 spi_prettyprint_status_register_hex(status);
426
427 spi_prettyprint_status_register_atmel_at25_srpl(status);
428 spi_prettyprint_status_register_bit(status, 6);
429 spi_prettyprint_status_register_atmel_at25_epewpp(status);
430 spi_prettyprint_status_register_atmel_at25_swp(status);
431 spi_prettyprint_status_register_welwip(status);
432 return 0;
433}
434
435int spi_prettyprint_status_register_at25df_sec(struct flashctx *flash)
436{
437 /* FIXME: We should check the security lockdown. */
438 msg_cdbg("Ignoring security lockdown (if present)\n");
439 msg_cdbg("Ignoring status register byte 2\n");
440 return spi_prettyprint_status_register_at25df(flash);
441}
442
Stefan Tauner57794ac2012-12-29 15:04:20 +0000443/* used for AT25F512, AT25F1024(A), AT25F2048 */
444int spi_prettyprint_status_register_at25f(struct flashctx *flash)
445{
446 uint8_t status;
447
448 status = spi_read_status_register(flash);
449 spi_prettyprint_status_register_hex(status);
450
451 spi_prettyprint_status_register_atmel_at25_wpen(status);
452 spi_prettyprint_status_register_bit(status, 6);
453 spi_prettyprint_status_register_bit(status, 5);
454 spi_prettyprint_status_register_bit(status, 4);
455 spi_prettyprint_status_register_bp(status, 1);
456 spi_prettyprint_status_register_welwip(status);
457 return 0;
458}
459
460int spi_prettyprint_status_register_at25f512a(struct flashctx *flash)
461{
462 uint8_t status;
463
464 status = spi_read_status_register(flash);
465 spi_prettyprint_status_register_hex(status);
466
467 spi_prettyprint_status_register_atmel_at25_wpen(status);
468 spi_prettyprint_status_register_bit(status, 6);
469 spi_prettyprint_status_register_bit(status, 5);
470 spi_prettyprint_status_register_bit(status, 4);
471 spi_prettyprint_status_register_bit(status, 3);
472 spi_prettyprint_status_register_bp(status, 0);
473 spi_prettyprint_status_register_welwip(status);
474 return 0;
475}
476
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000477int spi_prettyprint_status_register_at25f512b(struct flashctx *flash)
478{
479 uint8_t status = spi_read_status_register(flash);
480 spi_prettyprint_status_register_hex(status);
481
482 spi_prettyprint_status_register_atmel_at25_srpl(status);
483 spi_prettyprint_status_register_bit(status, 6);
484 spi_prettyprint_status_register_atmel_at25_epewpp(status);
485 spi_prettyprint_status_register_bit(status, 3);
486 spi_prettyprint_status_register_bp(status, 0);
487 spi_prettyprint_status_register_welwip(status);
488 return 0;
489}
490
Stefan Tauner57794ac2012-12-29 15:04:20 +0000491int spi_prettyprint_status_register_at25f4096(struct flashctx *flash)
492{
493 uint8_t status;
494
495 status = spi_read_status_register(flash);
496 spi_prettyprint_status_register_hex(status);
497
498 spi_prettyprint_status_register_atmel_at25_wpen(status);
499 spi_prettyprint_status_register_bit(status, 6);
500 spi_prettyprint_status_register_bit(status, 5);
501 spi_prettyprint_status_register_bp(status, 2);
502 spi_prettyprint_status_register_welwip(status);
503 return 0;
504}
505
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000506int spi_prettyprint_status_register_at25fs010(struct flashctx *flash)
507{
508 uint8_t status = spi_read_status_register(flash);
509 spi_prettyprint_status_register_hex(status);
510
511 spi_prettyprint_status_register_atmel_at25_wpen(status);
512 msg_cdbg("Chip status register: Bit 6 / Block Protect 4 (BP4) is "
513 "%sset\n", (status & (1 << 6)) ? "" : "not ");
514 msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is "
515 "%sset\n", (status & (1 << 5)) ? "" : "not ");
516 spi_prettyprint_status_register_bit(status, 4);
517 msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) is "
518 "%sset\n", (status & (1 << 3)) ? "" : "not ");
519 msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is "
520 "%sset\n", (status & (1 << 2)) ? "" : "not ");
521 /* FIXME: Pretty-print detailed sector protection status. */
522 spi_prettyprint_status_register_welwip(status);
523 return 0;
524}
525
526int spi_prettyprint_status_register_at25fs040(struct flashctx *flash)
527{
528 uint8_t status = spi_read_status_register(flash);
529 spi_prettyprint_status_register_hex(status);
530
531 spi_prettyprint_status_register_atmel_at25_wpen(status);
532 spi_prettyprint_status_register_bp(status, 4);
533 /* FIXME: Pretty-print detailed sector protection status. */
534 spi_prettyprint_status_register_welwip(status);
535 return 0;
536}
537
538int spi_prettyprint_status_register_at26df081a(struct flashctx *flash)
539{
540 uint8_t status = spi_read_status_register(flash);
541 spi_prettyprint_status_register_hex(status);
542
543 spi_prettyprint_status_register_atmel_at25_srpl(status);
544 msg_cdbg("Chip status register: Sequential Program Mode Status (SPM) is %sset\n",
545 (status & (1 << 6)) ? "" : "not ");
546 spi_prettyprint_status_register_atmel_at25_epewpp(status);
547 spi_prettyprint_status_register_atmel_at25_swp(status);
548 spi_prettyprint_status_register_welwip(status);
549 return 0;
550}
551
Stefan Taunercecb2c52013-06-20 22:55:41 +0000552/* Some Atmel DataFlash chips support per sector protection bits and the write protection bits in the status
553 * register do indicate if none, some or all sectors are protected. It is possible to globally (un)lock all
554 * sectors at once by writing 0 not only the protection bits (2 and 3) but also completely unrelated bits (4 and
555 * 5) which normally are not touched.
556 * Affected are all known Atmel chips matched by AT2[56]D[FLQ]..1A? but the AT26DF041. */
557int spi_disable_blockprotect_at2x_global_unprotect(struct flashctx *flash)
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000558{
Stefan Taunercecb2c52013-06-20 22:55:41 +0000559 return spi_disable_blockprotect_generic(flash, 0x0C, 1 << 7, 1 << 4, 0x00);
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000560}
561
Stefan Taunercecb2c52013-06-20 22:55:41 +0000562int spi_disable_blockprotect_at2x_global_unprotect_sec(struct flashctx *flash)
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000563{
564 /* FIXME: We should check the security lockdown. */
565 msg_cinfo("Ignoring security lockdown (if present)\n");
Stefan Taunercecb2c52013-06-20 22:55:41 +0000566 return spi_disable_blockprotect_at2x_global_unprotect(flash);
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000567}
568
Stefan Tauner57794ac2012-12-29 15:04:20 +0000569int spi_disable_blockprotect_at25f(struct flashctx *flash)
570{
Stefan Taunercecb2c52013-06-20 22:55:41 +0000571 return spi_disable_blockprotect_generic(flash, 0x0C, 1 << 7, 0, 0xFF);
Stefan Tauner57794ac2012-12-29 15:04:20 +0000572}
573
574int spi_disable_blockprotect_at25f512a(struct flashctx *flash)
575{
Stefan Taunercecb2c52013-06-20 22:55:41 +0000576 return spi_disable_blockprotect_generic(flash, 0x04, 1 << 7, 0, 0xFF);
Stefan Tauner57794ac2012-12-29 15:04:20 +0000577}
578
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000579int spi_disable_blockprotect_at25f512b(struct flashctx *flash)
580{
Stefan Taunercecb2c52013-06-20 22:55:41 +0000581 return spi_disable_blockprotect_generic(flash, 0x04, 1 << 7, 1 << 4, 0xFF);
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000582}
583
584int spi_disable_blockprotect_at25fs010(struct flashctx *flash)
585{
Stefan Taunercecb2c52013-06-20 22:55:41 +0000586 return spi_disable_blockprotect_generic(flash, 0x6C, 1 << 7, 0, 0xFF);
Stefan Tauner9530a022012-12-29 15:04:05 +0000587 }
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000588
589int spi_disable_blockprotect_at25fs040(struct flashctx *flash)
590{
Stefan Taunercecb2c52013-06-20 22:55:41 +0000591 return spi_disable_blockprotect_generic(flash, 0x7C, 1 << 7, 0, 0xFF);
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000592}
593
Nikolay Nikolaevd0e3ea12013-06-28 21:29:08 +0000594/* === Eon === */
595
596int spi_prettyprint_status_register_en25s_wp(struct flashctx *flash)
597{
598 uint8_t status = spi_read_status_register(flash);
599 spi_prettyprint_status_register_hex(status);
600
601 spi_prettyprint_status_register_srwd(status);
602 msg_cdbg("Chip status register: WP# disable (WPDIS) is %sabled\n", (status & (1 << 6)) ? "en " : "dis");
603 spi_prettyprint_status_register_bp(status, 3);
604 spi_prettyprint_status_register_welwip(status);
605 return 0;
606}
607
Nikolay Nikolaevc80c4a32013-06-28 21:29:44 +0000608/* === Intel/Numonyx/Micron - Spansion === */
Stefan Tauner54aaa4a2012-12-29 15:04:12 +0000609
Nikolay Nikolaev6f59b0b2013-06-28 21:29:51 +0000610int spi_disable_blockprotect_n25q(struct flashctx *flash)
611{
612 return spi_disable_blockprotect_generic(flash, 0x5C, 1 << 7, 0, 0xFF);
613}
614
615int spi_prettyprint_status_register_n25q(struct flashctx *flash)
616{
617 uint8_t status = spi_read_status_register(flash);
618 spi_prettyprint_status_register_hex(status);
619
620 spi_prettyprint_status_register_srwd(status);
621 if (flash->chip->total_size <= 32 / 8 * 1024) /* N25Q16 and N25Q32: reserved */
622 spi_prettyprint_status_register_bit(status, 6);
623 else
624 msg_cdbg("Chip status register: Block Protect 3 (BP3) is %sset\n",
625 (status & (1 << 6)) ? "" : "not ");
626 msg_cdbg("Chip status register: Top/Bottom (TB) is %s\n", (status & (1 << 5)) ? "bottom" : "top");
627 spi_prettyprint_status_register_bp(status, 2);
628 spi_prettyprint_status_register_welwip(status);
629 return 0;
630}
631
Nikolay Nikolaevc80c4a32013-06-28 21:29:44 +0000632/* Used by Intel/Numonyx S33 and Spansion S25FL-S chips */
Stefan Tauner54aaa4a2012-12-29 15:04:12 +0000633/* TODO: Clear P_FAIL and E_FAIL with Clear SR Fail Flags Command (30h) here? */
Nikolay Nikolaevc80c4a32013-06-28 21:29:44 +0000634int spi_disable_blockprotect_bp2_ep_srwd(struct flashctx *flash)
Stefan Tauner54aaa4a2012-12-29 15:04:12 +0000635{
Stefan Tauner278ba6e2013-06-28 21:28:27 +0000636 return spi_disable_blockprotect_bp2_srwd(flash);
Stefan Tauner54aaa4a2012-12-29 15:04:12 +0000637}
638
Nikolay Nikolaevc80c4a32013-06-28 21:29:44 +0000639/* Used by Intel/Numonyx S33 and Spansion S25FL-S chips */
640int spi_prettyprint_status_register_bp2_ep_srwd(struct flashctx *flash)
Stefan Tauner54aaa4a2012-12-29 15:04:12 +0000641{
642 uint8_t status = spi_read_status_register(flash);
Stefan Tauner0554ca52013-07-25 22:54:25 +0000643 msg_cdbg("Chip status register is 0x%02x\n", status);
Stefan Tauner54aaa4a2012-12-29 15:04:12 +0000644
645 spi_prettyprint_status_register_srwd(status);
646 msg_cdbg("Chip status register: Program Fail Flag (P_FAIL) is %sset\n",
647 (status & (1 << 6)) ? "" : "not ");
648 msg_cdbg("Chip status register: Erase Fail Flag (E_FAIL) is %sset\n",
649 (status & (1 << 5)) ? "" : "not ");
650 spi_prettyprint_status_register_bp(status, 2);
651 spi_prettyprint_status_register_welwip(status);
652 return 0;
653}
654
Stefan Tauner6ee37e22012-12-29 15:03:51 +0000655/* === SST === */
656
657static void spi_prettyprint_status_register_sst25_common(uint8_t status)
658{
659 spi_prettyprint_status_register_hex(status);
660
661 spi_prettyprint_status_register_bpl(status);
662 msg_cdbg("Chip status register: Auto Address Increment Programming (AAI) is %sset\n",
663 (status & (1 << 6)) ? "" : "not ");
664 spi_prettyprint_status_register_bp(status, 3);
665 spi_prettyprint_status_register_welwip(status);
666}
667
668int spi_prettyprint_status_register_sst25(struct flashctx *flash)
669{
670 uint8_t status = spi_read_status_register(flash);
671 spi_prettyprint_status_register_sst25_common(status);
672 return 0;
673}
674
675int spi_prettyprint_status_register_sst25vf016(struct flashctx *flash)
676{
677 static const char *const bpt[] = {
678 "none",
679 "1F0000H-1FFFFFH",
680 "1E0000H-1FFFFFH",
681 "1C0000H-1FFFFFH",
682 "180000H-1FFFFFH",
683 "100000H-1FFFFFH",
684 "all", "all"
685 };
686 uint8_t status = spi_read_status_register(flash);
687 spi_prettyprint_status_register_sst25_common(status);
688 msg_cdbg("Resulting block protection : %s\n", bpt[(status & 0x1c) >> 2]);
689 return 0;
690}
691
692int spi_prettyprint_status_register_sst25vf040b(struct flashctx *flash)
693{
694 static const char *const bpt[] = {
695 "none",
696 "0x70000-0x7ffff",
697 "0x60000-0x7ffff",
698 "0x40000-0x7ffff",
699 "all blocks", "all blocks", "all blocks", "all blocks"
700 };
701 uint8_t status = spi_read_status_register(flash);
702 spi_prettyprint_status_register_sst25_common(status);
703 msg_cdbg("Resulting block protection : %s\n", bpt[(status & 0x1c) >> 2]);
704 return 0;
705}