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Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00003 *
Uwe Hermannd22a1d42007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00005 *
Uwe Hermannd1107642007-08-29 17:52:32 +00006 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000010 *
Uwe Hermannd1107642007-08-29 17:52:32 +000011 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000015 *
Uwe Hermannd1107642007-08-29 17:52:32 +000016 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000019 */
20
21#include "flash.h"
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000022
Michael Karcher1c296ca2009-11-27 17:49:42 +000023/* FIMXE: check that the 2 second delay is really needed.
24 Use erase_sector_jedec if not? */
Sean Nelson72a9a022009-12-22 22:15:33 +000025int erase_sector_29f040b(struct flashchip *flash, unsigned int address, unsigned int blocklen)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000026{
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +000027 chipaddr bios = flash->virtual_memory;
28
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000029 chip_writeb(0xAA, bios + 0x555);
30 chip_writeb(0x55, bios + 0x2AA);
31 chip_writeb(0x80, bios + 0x555);
32 chip_writeb(0xAA, bios + 0x555);
33 chip_writeb(0x55, bios + 0x2AA);
34 chip_writeb(0x30, bios + address);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000035
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +000036 programmer_delay(2 * 1000 * 1000);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000037
38 /* wait for Toggle bit ready */
39 toggle_ready_jedec(bios + address);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000040
Sean Nelson72a9a022009-12-22 22:15:33 +000041 if (check_erased_range(flash, address, blocklen)) {
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +000042 fprintf(stderr, "ERASE FAILED!\n");
43 return -1;
44 }
Uwe Hermannffec5f32007-08-23 16:08:21 +000045 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000046}
47
Sean Nelson72a9a022009-12-22 22:15:33 +000048/* erase chip with block_erase() prototype */
49int erase_chip_29f040b(struct flashchip *flash, unsigned int addr, unsigned int blocklen)
50{
51 if ((addr != 0) || (blocklen != flash->total_size * 1024)) {
52 fprintf(stderr, "%s called with incorrect arguments\n",
53 __func__);
54 return -1;
55 }
56 return erase_29f040b(flash);
57}
58
Michael Karcher1c296ca2009-11-27 17:49:42 +000059/* FIXME: use write_sector_jedec? */
Uwe Hermann09e04f72009-05-16 22:36:00 +000060static int write_sector_29f040b(chipaddr bios, uint8_t *src, chipaddr dst,
61 unsigned int page_size)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000062{
63 int i;
64
65 for (i = 0; i < page_size; i++) {
Uwe Hermann0b7afe62007-04-01 19:44:21 +000066 if ((i & 0xfff) == 0xfff)
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000067 printf("0x%08lx", dst - bios);
Ollie Lho761bf1b2004-03-20 16:46:10 +000068
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000069 chip_writeb(0xAA, bios + 0x555);
70 chip_writeb(0x55, bios + 0x2AA);
71 chip_writeb(0xA0, bios + 0x555);
72 chip_writeb(*src++, dst++);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000073
74 /* wait for Toggle bit ready */
75 toggle_ready_jedec(bios);
76
Uwe Hermann0b7afe62007-04-01 19:44:21 +000077 if ((i & 0xfff) == 0xfff)
Stefan Reinauer99349a52006-03-16 16:46:19 +000078 printf("\b\b\b\b\b\b\b\b\b\b");
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000079 }
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000080
Uwe Hermannffec5f32007-08-23 16:08:21 +000081 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000082}
83
Ollie Lho761bf1b2004-03-20 16:46:10 +000084int probe_29f040b(struct flashchip *flash)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000085{
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000086 chipaddr bios = flash->virtual_memory;
Ollie Lho184a4042005-11-26 21:55:36 +000087 uint8_t id1, id2;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000088
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000089 chip_writeb(0xAA, bios + 0x555);
90 chip_writeb(0x55, bios + 0x2AA);
91 chip_writeb(0x90, bios + 0x555);
Ollie Lho761bf1b2004-03-20 16:46:10 +000092
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000093 id1 = chip_readb(bios);
94 id2 = chip_readb(bios + 0x01);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000095
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000096 chip_writeb(0xF0, bios);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000097
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +000098 programmer_delay(10);
Ollie Lho761bf1b2004-03-20 16:46:10 +000099
Uwe Hermann04aa59a2009-09-02 22:09:00 +0000100 printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000101 if (id1 == flash->manufacture_id && id2 == flash->model_id)
102 return 1;
103
104 return 0;
105}
106
Michael Karcher1c296ca2009-11-27 17:49:42 +0000107/* FIXME: use erase_chip_jedec? */
Ollie Lho761bf1b2004-03-20 16:46:10 +0000108int erase_29f040b(struct flashchip *flash)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000109{
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +0000110 int total_size = flash->total_size * 1024;
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000111 chipaddr bios = flash->virtual_memory;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000112
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000113 chip_writeb(0xAA, bios + 0x555);
114 chip_writeb(0x55, bios + 0x2AA);
115 chip_writeb(0x80, bios + 0x555);
116 chip_writeb(0xAA, bios + 0x555);
117 chip_writeb(0x55, bios + 0x2AA);
118 chip_writeb(0x10, bios + 0x555);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000119
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +0000120 programmer_delay(10);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000121 toggle_ready_jedec(bios);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000122
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +0000123 if (check_erased_range(flash, 0, total_size)) {
124 fprintf(stderr, "ERASE FAILED!\n");
125 return -1;
126 }
Uwe Hermannffec5f32007-08-23 16:08:21 +0000127 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000128}
129
Ollie Lho184a4042005-11-26 21:55:36 +0000130int write_29f040b(struct flashchip *flash, uint8_t *buf)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000131{
132 int i;
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000133 int total_size = flash->total_size * 1024;
134 int page_size = flash->page_size;
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000135 chipaddr bios = flash->virtual_memory;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000136
Stefan Reinauer99349a52006-03-16 16:46:19 +0000137 printf("Programming page ");
Ollie Lho761bf1b2004-03-20 16:46:10 +0000138 for (i = 0; i < total_size / page_size; i++) {
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000139 /* erase the page before programming */
Sean Nelson72a9a022009-12-22 22:15:33 +0000140 if (erase_sector_29f040b(flash, i * page_size, page_size)) {
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +0000141 fprintf(stderr, "ERASE FAILED!\n");
142 return -1;
143 }
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000144
145 /* write to the sector */
Ollie Lho761bf1b2004-03-20 16:46:10 +0000146 printf("%04d at address: ", i);
147 write_sector_29f040b(bios, buf + i * page_size,
148 bios + i * page_size, page_size);
149 printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000150 }
151 printf("\n");
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000152
Uwe Hermannffec5f32007-08-23 16:08:21 +0000153 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000154}