Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 1 | /* |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 2 | * This file is part of the flashrom project. |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 3 | * |
Uwe Hermann | d22a1d4 | 2007-09-09 20:21:05 +0000 | [diff] [blame] | 4 | * Copyright (C) 2000 Silicon Integrated System Corporation |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 5 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 10 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 15 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 19 | */ |
| 20 | |
| 21 | #include "flash.h" |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 22 | |
Michael Karcher | 1c296ca | 2009-11-27 17:49:42 +0000 | [diff] [blame] | 23 | /* FIMXE: check that the 2 second delay is really needed. |
| 24 | Use erase_sector_jedec if not? */ |
Sean Nelson | 72a9a02 | 2009-12-22 22:15:33 +0000 | [diff] [blame] | 25 | int erase_sector_29f040b(struct flashchip *flash, unsigned int address, unsigned int blocklen) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 26 | { |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 27 | chipaddr bios = flash->virtual_memory; |
| 28 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 29 | chip_writeb(0xAA, bios + 0x555); |
| 30 | chip_writeb(0x55, bios + 0x2AA); |
| 31 | chip_writeb(0x80, bios + 0x555); |
| 32 | chip_writeb(0xAA, bios + 0x555); |
| 33 | chip_writeb(0x55, bios + 0x2AA); |
| 34 | chip_writeb(0x30, bios + address); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 35 | |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 36 | programmer_delay(2 * 1000 * 1000); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 37 | |
| 38 | /* wait for Toggle bit ready */ |
| 39 | toggle_ready_jedec(bios + address); |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 40 | |
Sean Nelson | 72a9a02 | 2009-12-22 22:15:33 +0000 | [diff] [blame] | 41 | if (check_erased_range(flash, address, blocklen)) { |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 42 | fprintf(stderr, "ERASE FAILED!\n"); |
| 43 | return -1; |
| 44 | } |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 45 | return 0; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 46 | } |
| 47 | |
Sean Nelson | 72a9a02 | 2009-12-22 22:15:33 +0000 | [diff] [blame] | 48 | /* erase chip with block_erase() prototype */ |
| 49 | int erase_chip_29f040b(struct flashchip *flash, unsigned int addr, unsigned int blocklen) |
| 50 | { |
| 51 | if ((addr != 0) || (blocklen != flash->total_size * 1024)) { |
| 52 | fprintf(stderr, "%s called with incorrect arguments\n", |
| 53 | __func__); |
| 54 | return -1; |
| 55 | } |
| 56 | return erase_29f040b(flash); |
| 57 | } |
| 58 | |
Michael Karcher | 1c296ca | 2009-11-27 17:49:42 +0000 | [diff] [blame] | 59 | /* FIXME: use write_sector_jedec? */ |
Uwe Hermann | 09e04f7 | 2009-05-16 22:36:00 +0000 | [diff] [blame] | 60 | static int write_sector_29f040b(chipaddr bios, uint8_t *src, chipaddr dst, |
| 61 | unsigned int page_size) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 62 | { |
| 63 | int i; |
| 64 | |
| 65 | for (i = 0; i < page_size; i++) { |
Uwe Hermann | 0b7afe6 | 2007-04-01 19:44:21 +0000 | [diff] [blame] | 66 | if ((i & 0xfff) == 0xfff) |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 67 | printf("0x%08lx", dst - bios); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 68 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 69 | chip_writeb(0xAA, bios + 0x555); |
| 70 | chip_writeb(0x55, bios + 0x2AA); |
| 71 | chip_writeb(0xA0, bios + 0x555); |
| 72 | chip_writeb(*src++, dst++); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 73 | |
| 74 | /* wait for Toggle bit ready */ |
| 75 | toggle_ready_jedec(bios); |
| 76 | |
Uwe Hermann | 0b7afe6 | 2007-04-01 19:44:21 +0000 | [diff] [blame] | 77 | if ((i & 0xfff) == 0xfff) |
Stefan Reinauer | 99349a5 | 2006-03-16 16:46:19 +0000 | [diff] [blame] | 78 | printf("\b\b\b\b\b\b\b\b\b\b"); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 79 | } |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 80 | |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 81 | return 0; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 82 | } |
| 83 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 84 | int probe_29f040b(struct flashchip *flash) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 85 | { |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 86 | chipaddr bios = flash->virtual_memory; |
Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 87 | uint8_t id1, id2; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 88 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 89 | chip_writeb(0xAA, bios + 0x555); |
| 90 | chip_writeb(0x55, bios + 0x2AA); |
| 91 | chip_writeb(0x90, bios + 0x555); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 92 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 93 | id1 = chip_readb(bios); |
| 94 | id2 = chip_readb(bios + 0x01); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 95 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 96 | chip_writeb(0xF0, bios); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 97 | |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 98 | programmer_delay(10); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 99 | |
Uwe Hermann | 04aa59a | 2009-09-02 22:09:00 +0000 | [diff] [blame] | 100 | printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 101 | if (id1 == flash->manufacture_id && id2 == flash->model_id) |
| 102 | return 1; |
| 103 | |
| 104 | return 0; |
| 105 | } |
| 106 | |
Michael Karcher | 1c296ca | 2009-11-27 17:49:42 +0000 | [diff] [blame] | 107 | /* FIXME: use erase_chip_jedec? */ |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 108 | int erase_29f040b(struct flashchip *flash) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 109 | { |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 110 | int total_size = flash->total_size * 1024; |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 111 | chipaddr bios = flash->virtual_memory; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 112 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 113 | chip_writeb(0xAA, bios + 0x555); |
| 114 | chip_writeb(0x55, bios + 0x2AA); |
| 115 | chip_writeb(0x80, bios + 0x555); |
| 116 | chip_writeb(0xAA, bios + 0x555); |
| 117 | chip_writeb(0x55, bios + 0x2AA); |
| 118 | chip_writeb(0x10, bios + 0x555); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 119 | |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 120 | programmer_delay(10); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 121 | toggle_ready_jedec(bios); |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 122 | |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 123 | if (check_erased_range(flash, 0, total_size)) { |
| 124 | fprintf(stderr, "ERASE FAILED!\n"); |
| 125 | return -1; |
| 126 | } |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 127 | return 0; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 128 | } |
| 129 | |
Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 130 | int write_29f040b(struct flashchip *flash, uint8_t *buf) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 131 | { |
| 132 | int i; |
Uwe Hermann | 0b7afe6 | 2007-04-01 19:44:21 +0000 | [diff] [blame] | 133 | int total_size = flash->total_size * 1024; |
| 134 | int page_size = flash->page_size; |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 135 | chipaddr bios = flash->virtual_memory; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 136 | |
Stefan Reinauer | 99349a5 | 2006-03-16 16:46:19 +0000 | [diff] [blame] | 137 | printf("Programming page "); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 138 | for (i = 0; i < total_size / page_size; i++) { |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 139 | /* erase the page before programming */ |
Sean Nelson | 72a9a02 | 2009-12-22 22:15:33 +0000 | [diff] [blame] | 140 | if (erase_sector_29f040b(flash, i * page_size, page_size)) { |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 141 | fprintf(stderr, "ERASE FAILED!\n"); |
| 142 | return -1; |
| 143 | } |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 144 | |
| 145 | /* write to the sector */ |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 146 | printf("%04d at address: ", i); |
| 147 | write_sector_29f040b(bios, buf + i * page_size, |
| 148 | bios + i * page_size, page_size); |
| 149 | printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 150 | } |
| 151 | printf("\n"); |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 152 | |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 153 | return 0; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 154 | } |