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Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00003 *
Uwe Hermannd22a1d42007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2006 Giampiero Giancipoli <gianci@email.it>
6 * Copyright (C) 2006 coresystems GmbH <info@coresystems.de>
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +00007 * Copyright (C) 2007 Carl-Daniel Hailfinger
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00008 *
Uwe Hermannd1107642007-08-29 17:52:32 +00009 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000013 *
Uwe Hermannd1107642007-08-29 17:52:32 +000014 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000018 *
Uwe Hermannd1107642007-08-29 17:52:32 +000019 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000022 */
23
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000024#include <stdio.h>
Ollie Lho184a4042005-11-26 21:55:36 +000025#include <stdint.h>
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000026#include "flash.h"
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000027
Giampiero Giancipoli8c5299f2006-11-22 00:29:51 +000028#define MAX_REFLASH_TRIES 0x10
29
Carl-Daniel Hailfingera758f512008-05-14 12:03:06 +000030/* Check one byte for odd parity */
31uint8_t oddparity(uint8_t val)
32{
33 val = (val ^ (val >> 4)) & 0xf;
34 val = (val ^ (val >> 2)) & 0x3;
35 return (val ^ (val >> 1)) & 0x1;
36}
37
Uwe Hermann51582f22007-08-23 10:20:40 +000038void toggle_ready_jedec(volatile uint8_t *dst)
39{
40 unsigned int i = 0;
41 uint8_t tmp1, tmp2;
42
43 tmp1 = *dst & 0x40;
44
45 while (i++ < 0xFFFFFFF) {
46 tmp2 = *dst & 0x40;
47 if (tmp1 == tmp2) {
48 break;
49 }
50 tmp1 = tmp2;
51 }
52}
53
54void data_polling_jedec(volatile uint8_t *dst, uint8_t data)
55{
56 unsigned int i = 0;
57 uint8_t tmp;
58
59 data &= 0x80;
60
61 while (i++ < 0xFFFFFFF) {
62 tmp = *dst & 0x80;
63 if (tmp == data) {
64 break;
65 }
66 }
67}
68
69void unprotect_jedec(volatile uint8_t *bios)
70{
71 *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
72 *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
73 *(volatile uint8_t *)(bios + 0x5555) = 0x80;
74 *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
75 *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
76 *(volatile uint8_t *)(bios + 0x5555) = 0x20;
77
78 usleep(200);
79}
80
81void protect_jedec(volatile uint8_t *bios)
82{
83 *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
84 *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
85 *(volatile uint8_t *)(bios + 0x5555) = 0xA0;
86
87 usleep(200);
88}
89
Ollie Lho761bf1b2004-03-20 16:46:10 +000090int probe_jedec(struct flashchip *flash)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000091{
Stefan Reinauerce532972007-05-23 17:20:56 +000092 volatile uint8_t *bios = flash->virtual_memory;
Ollie Lho184a4042005-11-26 21:55:36 +000093 uint8_t id1, id2;
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +000094 uint32_t largeid1, largeid2;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000095
Ollie Lho761bf1b2004-03-20 16:46:10 +000096 /* Issue JEDEC Product ID Entry command */
Uwe Hermanna7e05482007-05-09 10:17:44 +000097 *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
Ollie Lho761bf1b2004-03-20 16:46:10 +000098 myusec_delay(10);
Uwe Hermanna7e05482007-05-09 10:17:44 +000099 *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
Ollie Lho761bf1b2004-03-20 16:46:10 +0000100 myusec_delay(10);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000101 *(volatile uint8_t *)(bios + 0x5555) = 0x90;
Carl-Daniel Hailfinger03d28262007-11-13 14:56:54 +0000102 /* Older chips may need up to 100 us to respond. The ATMEL 29C020
103 * needs 10 ms according to the data sheet, but it has been tested
104 * to work reliably with 20 us. Allow a factor of 2 safety margin.
105 */
Peter Stuge6a9fd1d2008-06-21 00:19:52 +0000106 myusec_delay(2000);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000107
Ollie Lho761bf1b2004-03-20 16:46:10 +0000108 /* Read product ID */
Uwe Hermanna7e05482007-05-09 10:17:44 +0000109 id1 = *(volatile uint8_t *)bios;
110 id2 = *(volatile uint8_t *)(bios + 0x01);
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +0000111 largeid1 = id1;
112 largeid2 = id2;
113
114 /* Check if it is a continuation ID, this should be a while loop. */
115 if (id1 == 0x7F) {
116 largeid1 <<= 8;
117 id1 = *(volatile uint8_t *)(bios + 0x100);
118 largeid1 |= id1;
119 }
120 if (id2 == 0x7F) {
121 largeid2 <<= 8;
122 id2 = *(volatile uint8_t *)(bios + 0x101);
123 largeid2 |= id2;
124 }
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000125
Ollie Lho761bf1b2004-03-20 16:46:10 +0000126 /* Issue JEDEC Product ID Exit command */
Uwe Hermanna7e05482007-05-09 10:17:44 +0000127 *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
Ollie Lho761bf1b2004-03-20 16:46:10 +0000128 myusec_delay(10);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000129 *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
Ollie Lho761bf1b2004-03-20 16:46:10 +0000130 myusec_delay(10);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000131 *(volatile uint8_t *)(bios + 0x5555) = 0xF0;
Carl-Daniel Hailfinger03d28262007-11-13 14:56:54 +0000132 myusec_delay(40);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000133
Carl-Daniel Hailfingera758f512008-05-14 12:03:06 +0000134 printf_debug("%s: id1 0x%x, id2 0x%x", __FUNCTION__, largeid1, largeid2);
135 if (!oddparity(id1))
136 printf_debug(", id1 parity violation");
137 printf_debug("\n");
Carl-Daniel Hailfingerae8afa92007-12-31 01:49:00 +0000138 if (largeid1 == flash->manufacture_id && largeid2 == flash->model_id)
Ollie Lho761bf1b2004-03-20 16:46:10 +0000139 return 1;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000140
Ollie Lho761bf1b2004-03-20 16:46:10 +0000141 return 0;
Ollie Lho73eca802004-03-19 22:10:07 +0000142}
143
Ollie Lho184a4042005-11-26 21:55:36 +0000144int erase_sector_jedec(volatile uint8_t *bios, unsigned int page)
Ollie Lho73eca802004-03-19 22:10:07 +0000145{
Ollie Lho761bf1b2004-03-20 16:46:10 +0000146 /* Issue the Sector Erase command */
Uwe Hermanna7e05482007-05-09 10:17:44 +0000147 *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
Ollie Lho73eca802004-03-19 22:10:07 +0000148 myusec_delay(10);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000149 *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
Ollie Lho73eca802004-03-19 22:10:07 +0000150 myusec_delay(10);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000151 *(volatile uint8_t *)(bios + 0x5555) = 0x80;
Ollie Lho73eca802004-03-19 22:10:07 +0000152 myusec_delay(10);
Ollie Lhoefa28582004-12-08 20:10:01 +0000153
Uwe Hermanna7e05482007-05-09 10:17:44 +0000154 *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
Ollie Lho73eca802004-03-19 22:10:07 +0000155 myusec_delay(10);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000156 *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
Ollie Lho73eca802004-03-19 22:10:07 +0000157 myusec_delay(10);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000158 *(volatile uint8_t *)(bios + page) = 0x30;
Ollie Lho761bf1b2004-03-20 16:46:10 +0000159 myusec_delay(10);
160
Ollie Lho73eca802004-03-19 22:10:07 +0000161 /* wait for Toggle bit ready */
162 toggle_ready_jedec(bios);
163
Uwe Hermannffec5f32007-08-23 16:08:21 +0000164 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000165}
Ollie Lho98bea8a2004-12-07 03:15:51 +0000166
Ollie Lho184a4042005-11-26 21:55:36 +0000167int erase_block_jedec(volatile uint8_t *bios, unsigned int block)
Ronald G. Minnich1f4d6532004-09-30 16:37:01 +0000168{
Ronald G. Minnich1f4d6532004-09-30 16:37:01 +0000169 /* Issue the Sector Erase command */
Uwe Hermanna7e05482007-05-09 10:17:44 +0000170 *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
Ronald G. Minnich1f4d6532004-09-30 16:37:01 +0000171 myusec_delay(10);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000172 *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
Ronald G. Minnich1f4d6532004-09-30 16:37:01 +0000173 myusec_delay(10);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000174 *(volatile uint8_t *)(bios + 0x5555) = 0x80;
Ronald G. Minnich1f4d6532004-09-30 16:37:01 +0000175 myusec_delay(10);
Ollie Lhoefa28582004-12-08 20:10:01 +0000176
Uwe Hermanna7e05482007-05-09 10:17:44 +0000177 *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
Ronald G. Minnich1f4d6532004-09-30 16:37:01 +0000178 myusec_delay(10);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000179 *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
Ronald G. Minnich1f4d6532004-09-30 16:37:01 +0000180 myusec_delay(10);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000181 *(volatile uint8_t *)(bios + block) = 0x50;
Ronald G. Minnich1f4d6532004-09-30 16:37:01 +0000182 myusec_delay(10);
183
184 /* wait for Toggle bit ready */
185 toggle_ready_jedec(bios);
186
Uwe Hermannffec5f32007-08-23 16:08:21 +0000187 return 0;
Ronald G. Minnich1f4d6532004-09-30 16:37:01 +0000188}
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000189
Ollie Lho761bf1b2004-03-20 16:46:10 +0000190int erase_chip_jedec(struct flashchip *flash)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000191{
Stefan Reinauerce532972007-05-23 17:20:56 +0000192 volatile uint8_t *bios = flash->virtual_memory;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000193
Ollie Lho761bf1b2004-03-20 16:46:10 +0000194 /* Issue the JEDEC Chip Erase command */
Uwe Hermanna7e05482007-05-09 10:17:44 +0000195 *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
Ronald G. Minnichef5779d2002-01-29 20:18:02 +0000196 myusec_delay(10);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000197 *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
Ollie Lho73eca802004-03-19 22:10:07 +0000198 myusec_delay(10);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000199 *(volatile uint8_t *)(bios + 0x5555) = 0x80;
Ollie Lho73eca802004-03-19 22:10:07 +0000200 myusec_delay(10);
Ollie Lhoefa28582004-12-08 20:10:01 +0000201
Uwe Hermanna7e05482007-05-09 10:17:44 +0000202 *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
Ollie Lho73eca802004-03-19 22:10:07 +0000203 myusec_delay(10);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000204 *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
Ollie Lho73eca802004-03-19 22:10:07 +0000205 myusec_delay(10);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000206 *(volatile uint8_t *)(bios + 0x5555) = 0x10;
Ollie Lho73eca802004-03-19 22:10:07 +0000207 myusec_delay(10);
208
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000209 toggle_ready_jedec(bios);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000210
Uwe Hermannffec5f32007-08-23 16:08:21 +0000211 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000212}
213
Ollie Lho184a4042005-11-26 21:55:36 +0000214int write_page_write_jedec(volatile uint8_t *bios, uint8_t *src,
215 volatile uint8_t *dst, int page_size)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000216{
Giampiero Giancipoli8c5299f2006-11-22 00:29:51 +0000217 int i, tried = 0, start_index = 0, ok;
218 volatile uint8_t *d = dst;
219 uint8_t *s = src;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000220
Giampiero Giancipoli8c5299f2006-11-22 00:29:51 +0000221retry:
Ollie Lho761bf1b2004-03-20 16:46:10 +0000222 /* Issue JEDEC Data Unprotect comand */
Uwe Hermanna7e05482007-05-09 10:17:44 +0000223 *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
224 *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
225 *(volatile uint8_t *)(bios + 0x5555) = 0xA0;
Ollie Lho761bf1b2004-03-20 16:46:10 +0000226
Ollie Lho98bea8a2004-12-07 03:15:51 +0000227 /* transfer data from source to destination */
Giampiero Giancipoli8c5299f2006-11-22 00:29:51 +0000228 for (i = start_index; i < page_size; i++) {
Ollie Lho98bea8a2004-12-07 03:15:51 +0000229 /* If the data is 0xFF, don't program it */
Uwe Hermanna7e05482007-05-09 10:17:44 +0000230 if (*src != 0xFF)
Giampiero Giancipoli8c5299f2006-11-22 00:29:51 +0000231 *dst = *src;
232 dst++;
233 src++;
Ollie Lho761bf1b2004-03-20 16:46:10 +0000234 }
235
Ollie Lho761bf1b2004-03-20 16:46:10 +0000236 toggle_ready_jedec(dst - 1);
Ollie Lho98bea8a2004-12-07 03:15:51 +0000237
Giampiero Giancipoli8c5299f2006-11-22 00:29:51 +0000238 dst = d;
239 src = s;
240 ok = 1;
241 for (i = 0; i < page_size; i++) {
Uwe Hermanna7e05482007-05-09 10:17:44 +0000242 if (*dst != *src) {
Giampiero Giancipoli8c5299f2006-11-22 00:29:51 +0000243 ok = 0;
244 break;
245 }
246 dst++;
247 src++;
248 }
Uwe Hermanna7e05482007-05-09 10:17:44 +0000249
Giampiero Giancipoli8c5299f2006-11-22 00:29:51 +0000250 if (!ok && tried++ < MAX_REFLASH_TRIES) {
251 start_index = i;
Uwe Hermanna7e05482007-05-09 10:17:44 +0000252 goto retry;
253 }
Giampiero Giancipoli8c5299f2006-11-22 00:29:51 +0000254 if (!ok) {
Uwe Hermanna7e05482007-05-09 10:17:44 +0000255 fprintf(stderr, " page %d failed!\n",
256 (unsigned int)(d - bios) / page_size);
Giampiero Giancipoli8c5299f2006-11-22 00:29:51 +0000257 }
Uwe Hermannffec5f32007-08-23 16:08:21 +0000258 return !ok;
Ollie Lho761bf1b2004-03-20 16:46:10 +0000259}
260
Ollie Lho184a4042005-11-26 21:55:36 +0000261int write_byte_program_jedec(volatile uint8_t *bios, uint8_t *src,
262 volatile uint8_t *dst)
Ollie Lho070647d2004-03-22 22:19:17 +0000263{
Giampiero Giancipoli8c5299f2006-11-22 00:29:51 +0000264 int tried = 0, ok = 1;
Ollie Lho1b8b6602004-12-08 02:10:33 +0000265
Ollie Lho98bea8a2004-12-07 03:15:51 +0000266 /* If the data is 0xFF, don't program it */
Ollie Lho070647d2004-03-22 22:19:17 +0000267 if (*src == 0xFF) {
Giampiero Giancipoli8c5299f2006-11-22 00:29:51 +0000268 return -1;
Ollie Lho070647d2004-03-22 22:19:17 +0000269 }
Ollie Lho98bea8a2004-12-07 03:15:51 +0000270
Ollie Lho1b8b6602004-12-08 02:10:33 +0000271retry:
Ollie Lho070647d2004-03-22 22:19:17 +0000272 /* Issue JEDEC Byte Program command */
Uwe Hermanna7e05482007-05-09 10:17:44 +0000273 *(volatile uint8_t *)(bios + 0x5555) = 0xAA;
274 *(volatile uint8_t *)(bios + 0x2AAA) = 0x55;
275 *(volatile uint8_t *)(bios + 0x5555) = 0xA0;
Ollie Lho98bea8a2004-12-07 03:15:51 +0000276
277 /* transfer data from source to destination */
Ollie Lho070647d2004-03-22 22:19:17 +0000278 *dst = *src;
279 toggle_ready_jedec(bios);
Ollie Lho8b8897a2004-03-27 00:18:15 +0000280
Giampiero Giancipoli8c5299f2006-11-22 00:29:51 +0000281 if (*dst != *src && tried++ < MAX_REFLASH_TRIES) {
Uwe Hermanna7e05482007-05-09 10:17:44 +0000282 goto retry;
283 }
Ollie Lho1b8b6602004-12-08 02:10:33 +0000284
Giampiero Giancipoli8c5299f2006-11-22 00:29:51 +0000285 if (tried >= MAX_REFLASH_TRIES)
Uwe Hermanna7e05482007-05-09 10:17:44 +0000286 ok = 0;
Giampiero Giancipoli8c5299f2006-11-22 00:29:51 +0000287
Uwe Hermannffec5f32007-08-23 16:08:21 +0000288 return !ok;
Ollie Lho070647d2004-03-22 22:19:17 +0000289}
290
Ollie Lho184a4042005-11-26 21:55:36 +0000291int write_sector_jedec(volatile uint8_t *bios, uint8_t *src,
292 volatile uint8_t *dst, unsigned int page_size)
Ollie Lho761bf1b2004-03-20 16:46:10 +0000293{
294 int i;
Ollie Lho761bf1b2004-03-20 16:46:10 +0000295
296 for (i = 0; i < page_size; i++) {
Ollie Lho8b8897a2004-03-27 00:18:15 +0000297 write_byte_program_jedec(bios, src, dst);
298 dst++, src++;
Ollie Lho761bf1b2004-03-20 16:46:10 +0000299 }
300
Uwe Hermannffec5f32007-08-23 16:08:21 +0000301 return 0;
Ollie Lho761bf1b2004-03-20 16:46:10 +0000302}
303
Ollie Lho184a4042005-11-26 21:55:36 +0000304int write_jedec(struct flashchip *flash, uint8_t *buf)
Ollie Lho761bf1b2004-03-20 16:46:10 +0000305{
306 int i;
Ollie Lho070647d2004-03-22 22:19:17 +0000307 int total_size = flash->total_size * 1024;
308 int page_size = flash->page_size;
Stefan Reinauerce532972007-05-23 17:20:56 +0000309 volatile uint8_t *bios = flash->virtual_memory;
Ollie Lho761bf1b2004-03-20 16:46:10 +0000310
311 erase_chip_jedec(flash);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000312 // dumb check if erase was successful.
313 for (i = 0; i < total_size; i++) {
314 if (bios[i] != (uint8_t) 0xff) {
Uwe Hermanna502dce2007-10-17 23:55:15 +0000315 printf("ERASE FAILED @%d, val %02x!\n", i, bios[i]);
Uwe Hermanna7e05482007-05-09 10:17:44 +0000316 return -1;
317 }
318 }
Giampiero Giancipoli8c5299f2006-11-22 00:29:51 +0000319
Uwe Hermanna502dce2007-10-17 23:55:15 +0000320 printf("Programming page: ");
Ollie Lho761bf1b2004-03-20 16:46:10 +0000321 for (i = 0; i < total_size / page_size; i++) {
322 printf("%04d at address: 0x%08x", i, i * page_size);
Ollie Lho8b8897a2004-03-27 00:18:15 +0000323 write_page_write_jedec(bios, buf + i * page_size,
324 bios + i * page_size, page_size);
Ollie Lho070647d2004-03-22 22:19:17 +0000325 printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000326 }
327 printf("\n");
Ollie Lho761bf1b2004-03-20 16:46:10 +0000328 protect_jedec(bios);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000329
Uwe Hermannffec5f32007-08-23 16:08:21 +0000330 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000331}