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Ronald G. Minnich5b582f22006-02-23 17:16:44 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Ronald G. Minnich5b582f22006-02-23 17:16:44 +00003 *
Uwe Hermannd22a1d42007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
Ronald G. Minnich5b582f22006-02-23 17:16:44 +00005 *
Uwe Hermannd1107642007-08-29 17:52:32 +00006 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000010 *
Uwe Hermannd1107642007-08-29 17:52:32 +000011 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000015 *
Uwe Hermannd1107642007-08-29 17:52:32 +000016 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000019 */
20
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000021#include "flash.h"
Sean Nelson14ba6682010-02-26 05:48:29 +000022#include "chipdrivers.h"
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000023
Carl-Daniel Hailfingeraca1dce2010-01-07 21:23:45 +000024/* FIXME: The datasheet is unclear whether we should use toggle_ready_jedec
25 * or wait_82802ab.
Carl-Daniel Hailfingerb30a5ed2010-10-10 14:02:27 +000026 * FIXME: This file is unused.
Carl-Daniel Hailfingeraca1dce2010-01-07 21:23:45 +000027 */
28
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000029int erase_lhf00l04_block(struct flashctx *flash, unsigned int blockaddr,
30 unsigned int blocklen)
Ronald G. Minnich5b582f22006-02-23 17:16:44 +000031{
Carl-Daniel Hailfingeraca1dce2010-01-07 21:23:45 +000032 chipaddr bios = flash->virtual_memory + blockaddr;
33 chipaddr wrprotect = flash->virtual_registers + blockaddr + 2;
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000034 uint8_t status;
35
36 // clear status register
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000037 chip_writeb(flash, 0x50, bios);
Carl-Daniel Hailfingerb30a5ed2010-10-10 14:02:27 +000038 status = wait_82802ab(flash);
Sean Nelson28accc22010-03-19 18:47:06 +000039 print_status_82802ab(status);
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000040 // clear write protect
Sean Nelsoned479d22010-03-24 23:14:32 +000041 msg_cspew("write protect is at 0x%lx\n", (wrprotect));
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000042 msg_cspew("write protect is 0x%x\n", chip_readb(flash, wrprotect));
43 chip_writeb(flash, 0, wrprotect);
44 msg_cspew("write protect is 0x%x\n", chip_readb(flash, wrprotect));
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000045
46 // now start it
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000047 chip_writeb(flash, 0x20, bios);
48 chip_writeb(flash, 0xd0, bios);
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +000049 programmer_delay(10);
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000050 // now let's see what the register is
Carl-Daniel Hailfingerb30a5ed2010-10-10 14:02:27 +000051 status = wait_82802ab(flash);
Sean Nelson28accc22010-03-19 18:47:06 +000052 print_status_82802ab(status);
Uwe Hermannffec5f32007-08-23 16:08:21 +000053
Carl-Daniel Hailfingerb4061f62011-06-26 17:04:16 +000054 /* FIXME: Check the status register for errors. */
Uwe Hermannffec5f32007-08-23 16:08:21 +000055 return 0;
Ronald G. Minnich5eaed682006-03-14 19:58:14 +000056}