Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 1 | /* |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 2 | * This file is part of the flashrom project. |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 3 | * |
Uwe Hermann | d22a1d4 | 2007-09-09 20:21:05 +0000 | [diff] [blame] | 4 | * Copyright (C) 2000 Silicon Integrated System Corporation |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 5 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 10 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 15 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 16 | * You should have received a copy of the GNU General Public License |
| 17 | * along with this program; if not, write to the Free Software |
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 19 | */ |
| 20 | |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 21 | #include "flash.h" |
Sean Nelson | 14ba668 | 2010-02-26 05:48:29 +0000 | [diff] [blame] | 22 | #include "chipdrivers.h" |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 23 | |
Carl-Daniel Hailfinger | aca1dce | 2010-01-07 21:23:45 +0000 | [diff] [blame] | 24 | /* FIXME: The datasheet is unclear whether we should use toggle_ready_jedec |
| 25 | * or wait_82802ab. |
Carl-Daniel Hailfinger | b30a5ed | 2010-10-10 14:02:27 +0000 | [diff] [blame] | 26 | * FIXME: This file is unused. |
Carl-Daniel Hailfinger | aca1dce | 2010-01-07 21:23:45 +0000 | [diff] [blame] | 27 | */ |
| 28 | |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame^] | 29 | int erase_lhf00l04_block(struct flashctx *flash, unsigned int blockaddr, |
| 30 | unsigned int blocklen) |
Ronald G. Minnich | 5b582f2 | 2006-02-23 17:16:44 +0000 | [diff] [blame] | 31 | { |
Carl-Daniel Hailfinger | aca1dce | 2010-01-07 21:23:45 +0000 | [diff] [blame] | 32 | chipaddr bios = flash->virtual_memory + blockaddr; |
| 33 | chipaddr wrprotect = flash->virtual_registers + blockaddr + 2; |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 34 | uint8_t status; |
| 35 | |
| 36 | // clear status register |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame^] | 37 | chip_writeb(flash, 0x50, bios); |
Carl-Daniel Hailfinger | b30a5ed | 2010-10-10 14:02:27 +0000 | [diff] [blame] | 38 | status = wait_82802ab(flash); |
Sean Nelson | 28accc2 | 2010-03-19 18:47:06 +0000 | [diff] [blame] | 39 | print_status_82802ab(status); |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 40 | // clear write protect |
Sean Nelson | ed479d2 | 2010-03-24 23:14:32 +0000 | [diff] [blame] | 41 | msg_cspew("write protect is at 0x%lx\n", (wrprotect)); |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame^] | 42 | msg_cspew("write protect is 0x%x\n", chip_readb(flash, wrprotect)); |
| 43 | chip_writeb(flash, 0, wrprotect); |
| 44 | msg_cspew("write protect is 0x%x\n", chip_readb(flash, wrprotect)); |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 45 | |
| 46 | // now start it |
Carl-Daniel Hailfinger | 8a3c60c | 2011-12-18 15:01:24 +0000 | [diff] [blame^] | 47 | chip_writeb(flash, 0x20, bios); |
| 48 | chip_writeb(flash, 0xd0, bios); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 49 | programmer_delay(10); |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 50 | // now let's see what the register is |
Carl-Daniel Hailfinger | b30a5ed | 2010-10-10 14:02:27 +0000 | [diff] [blame] | 51 | status = wait_82802ab(flash); |
Sean Nelson | 28accc2 | 2010-03-19 18:47:06 +0000 | [diff] [blame] | 52 | print_status_82802ab(status); |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 53 | |
Carl-Daniel Hailfinger | b4061f6 | 2011-06-26 17:04:16 +0000 | [diff] [blame] | 54 | /* FIXME: Check the status register for errors. */ |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 55 | return 0; |
Ronald G. Minnich | 5eaed68 | 2006-03-14 19:58:14 +0000 | [diff] [blame] | 56 | } |