blob: 9d50b00f0e8279468ec93f272ad37c3144eef406 [file] [log] [blame]
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00003 *
Uwe Hermannd22a1d42007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00005 *
Uwe Hermannd1107642007-08-29 17:52:32 +00006 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000010 *
Uwe Hermannd1107642007-08-29 17:52:32 +000011 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000015 *
Uwe Hermannd1107642007-08-29 17:52:32 +000016 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000019 */
20
21#include "flash.h"
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000022
Ollie Lho761bf1b2004-03-20 16:46:10 +000023int probe_29f002(struct flashchip *flash)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000024{
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000025 chipaddr bios = flash->virtual_memory;
Ollie Lho184a4042005-11-26 21:55:36 +000026 uint8_t id1, id2;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000027
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000028 chip_writeb(0xAA, bios + 0x5555);
29 chip_writeb(0x55, bios + 0x2AAA);
30 chip_writeb(0x90, bios + 0x5555);
Ollie Lho761bf1b2004-03-20 16:46:10 +000031
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000032 id1 = chip_readb(bios);
33 id2 = chip_readb(bios + 0x01);
Ollie Lho761bf1b2004-03-20 16:46:10 +000034
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000035 chip_writeb(0xF0, bios);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000036
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +000037 programmer_delay(10);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000038
Peter Stuge5cafc332009-01-25 23:52:45 +000039 printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __FUNCTION__, id1, id2);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000040 if (id1 == flash->manufacture_id && id2 == flash->model_id)
41 return 1;
42
43 return 0;
44}
45
Ollie Lho761bf1b2004-03-20 16:46:10 +000046int erase_29f002(struct flashchip *flash)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000047{
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000048 chipaddr bios = flash->virtual_memory;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000049
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000050 chip_writeb(0xF0, bios + 0x555);
51 chip_writeb(0xAA, bios + 0x555);
52 chip_writeb(0x55, bios + 0x2AA);
53 chip_writeb(0x80, bios + 0x555);
54 chip_writeb(0xAA, bios + 0x555);
55 chip_writeb(0x55, bios + 0x2AA);
56 chip_writeb(0x10, bios + 0x555);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000057
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +000058 programmer_delay(100);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000059 toggle_ready_jedec(bios);
60
61 // while ((*bios & 0x40) != 0x40)
62 //;
63
64#if 0
65 toggle_ready_jedec(bios);
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000066 chip_writeb(0x30, bios + 0x0ffff);
67 chip_writeb(0x30, bios + 0x1ffff);
68 chip_writeb(0x30, bios + 0x2ffff);
69 chip_writeb(0x30, bios + 0x37fff);
70 chip_writeb(0x30, bios + 0x39fff);
71 chip_writeb(0x30, bios + 0x3bfff);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000072#endif
73
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +000074 if (check_erased_range(flash, 0, flash->total_size * 1024)) {
75 fprintf(stderr, "ERASE FAILED!\n");
76 return -1;
77 }
Uwe Hermannffec5f32007-08-23 16:08:21 +000078 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000079}
80
Ollie Lho184a4042005-11-26 21:55:36 +000081int write_29f002(struct flashchip *flash, uint8_t *buf)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000082{
Ollie Lho761bf1b2004-03-20 16:46:10 +000083 int i;
84 int total_size = flash->total_size * 1024;
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000085 chipaddr bios = flash->virtual_memory;
86 chipaddr dst = bios;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000087
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000088 chip_writeb(0xF0, bios);
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +000089 programmer_delay(10);
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +000090 if (erase_29f002(flash)) {
91 fprintf(stderr, "ERASE FAILED!\n");
92 return -1;
93 }
Ollie Lho761bf1b2004-03-20 16:46:10 +000094 //*bios = 0xF0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000095#if 1
Uwe Hermanna502dce2007-10-17 23:55:15 +000096 printf("Programming page: ");
Ollie Lho761bf1b2004-03-20 16:46:10 +000097 for (i = 0; i < total_size; i++) {
98 /* write to the sector */
99 if ((i & 0xfff) == 0)
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000100 printf("address: 0x%08lx", (unsigned long)i);
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000101 chip_writeb(0xAA, bios + 0x5555);
102 chip_writeb(0x55, bios + 0x2AAA);
103 chip_writeb(0xA0, bios + 0x5555);
104 chip_writeb(*buf++, dst++);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000105
Ollie Lho761bf1b2004-03-20 16:46:10 +0000106 /* wait for Toggle bit ready */
107 toggle_ready_jedec(dst);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000108
Ollie Lho761bf1b2004-03-20 16:46:10 +0000109 if ((i & 0xfff) == 0)
110 printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
111 }
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000112#endif
Ollie Lho761bf1b2004-03-20 16:46:10 +0000113 printf("\n");
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000114
Uwe Hermannffec5f32007-08-23 16:08:21 +0000115 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000116}