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Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00001/*
Uwe Hermannd1107642007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00003 *
Uwe Hermannd22a1d42007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +00005 *
Uwe Hermannd1107642007-08-29 17:52:32 +00006 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000010 *
Uwe Hermannd1107642007-08-29 17:52:32 +000011 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000015 *
Uwe Hermannd1107642007-08-29 17:52:32 +000016 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000019 */
20
21#include "flash.h"
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000022
Michael Karcher1c296ca2009-11-27 17:49:42 +000023/* FIMXE: check that the 2 second delay is really needed.
24 Use erase_sector_jedec if not? */
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +000025static int erase_sector_29f040b(struct flashchip *flash, unsigned long address)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000026{
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +000027 int page_size = flash->page_size;
28 chipaddr bios = flash->virtual_memory;
29
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000030 chip_writeb(0xAA, bios + 0x555);
31 chip_writeb(0x55, bios + 0x2AA);
32 chip_writeb(0x80, bios + 0x555);
33 chip_writeb(0xAA, bios + 0x555);
34 chip_writeb(0x55, bios + 0x2AA);
35 chip_writeb(0x30, bios + address);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000036
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +000037 programmer_delay(2 * 1000 * 1000);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000038
39 /* wait for Toggle bit ready */
40 toggle_ready_jedec(bios + address);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000041
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +000042 if (check_erased_range(flash, address, page_size)) {
43 fprintf(stderr, "ERASE FAILED!\n");
44 return -1;
45 }
Uwe Hermannffec5f32007-08-23 16:08:21 +000046 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000047}
48
Michael Karcher1c296ca2009-11-27 17:49:42 +000049/* FIXME: use write_sector_jedec? */
Uwe Hermann09e04f72009-05-16 22:36:00 +000050static int write_sector_29f040b(chipaddr bios, uint8_t *src, chipaddr dst,
51 unsigned int page_size)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000052{
53 int i;
54
55 for (i = 0; i < page_size; i++) {
Uwe Hermann0b7afe62007-04-01 19:44:21 +000056 if ((i & 0xfff) == 0xfff)
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000057 printf("0x%08lx", dst - bios);
Ollie Lho761bf1b2004-03-20 16:46:10 +000058
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000059 chip_writeb(0xAA, bios + 0x555);
60 chip_writeb(0x55, bios + 0x2AA);
61 chip_writeb(0xA0, bios + 0x555);
62 chip_writeb(*src++, dst++);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000063
64 /* wait for Toggle bit ready */
65 toggle_ready_jedec(bios);
66
Uwe Hermann0b7afe62007-04-01 19:44:21 +000067 if ((i & 0xfff) == 0xfff)
Stefan Reinauer99349a52006-03-16 16:46:19 +000068 printf("\b\b\b\b\b\b\b\b\b\b");
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000069 }
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +000070
Uwe Hermannffec5f32007-08-23 16:08:21 +000071 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000072}
73
Ollie Lho761bf1b2004-03-20 16:46:10 +000074int probe_29f040b(struct flashchip *flash)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000075{
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +000076 chipaddr bios = flash->virtual_memory;
Ollie Lho184a4042005-11-26 21:55:36 +000077 uint8_t id1, id2;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000078
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000079 chip_writeb(0xAA, bios + 0x555);
80 chip_writeb(0x55, bios + 0x2AA);
81 chip_writeb(0x90, bios + 0x555);
Ollie Lho761bf1b2004-03-20 16:46:10 +000082
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000083 id1 = chip_readb(bios);
84 id2 = chip_readb(bios + 0x01);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000085
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +000086 chip_writeb(0xF0, bios);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000087
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +000088 programmer_delay(10);
Ollie Lho761bf1b2004-03-20 16:46:10 +000089
Uwe Hermann04aa59a2009-09-02 22:09:00 +000090 printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000091 if (id1 == flash->manufacture_id && id2 == flash->model_id)
92 return 1;
93
94 return 0;
95}
96
Michael Karcher1c296ca2009-11-27 17:49:42 +000097/* FIXME: use erase_chip_jedec? */
Ollie Lho761bf1b2004-03-20 16:46:10 +000098int erase_29f040b(struct flashchip *flash)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +000099{
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +0000100 int total_size = flash->total_size * 1024;
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000101 chipaddr bios = flash->virtual_memory;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000102
Carl-Daniel Hailfinger0472f3d2009-03-06 22:26:00 +0000103 chip_writeb(0xAA, bios + 0x555);
104 chip_writeb(0x55, bios + 0x2AA);
105 chip_writeb(0x80, bios + 0x555);
106 chip_writeb(0xAA, bios + 0x555);
107 chip_writeb(0x55, bios + 0x2AA);
108 chip_writeb(0x10, bios + 0x555);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000109
Carl-Daniel Hailfingerca8bfc62009-06-05 17:48:08 +0000110 programmer_delay(10);
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000111 toggle_ready_jedec(bios);
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000112
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +0000113 if (check_erased_range(flash, 0, total_size)) {
114 fprintf(stderr, "ERASE FAILED!\n");
115 return -1;
116 }
Uwe Hermannffec5f32007-08-23 16:08:21 +0000117 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000118}
119
Ollie Lho184a4042005-11-26 21:55:36 +0000120int write_29f040b(struct flashchip *flash, uint8_t *buf)
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000121{
122 int i;
Uwe Hermann0b7afe62007-04-01 19:44:21 +0000123 int total_size = flash->total_size * 1024;
124 int page_size = flash->page_size;
Carl-Daniel Hailfinger5820f422009-05-16 21:22:56 +0000125 chipaddr bios = flash->virtual_memory;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000126
Stefan Reinauer99349a52006-03-16 16:46:19 +0000127 printf("Programming page ");
Ollie Lho761bf1b2004-03-20 16:46:10 +0000128 for (i = 0; i < total_size / page_size; i++) {
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000129 /* erase the page before programming */
Carl-Daniel Hailfinger30f7cb22009-06-15 17:23:36 +0000130 if (erase_sector_29f040b(flash, i * page_size)) {
131 fprintf(stderr, "ERASE FAILED!\n");
132 return -1;
133 }
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000134
135 /* write to the sector */
Ollie Lho761bf1b2004-03-20 16:46:10 +0000136 printf("%04d at address: ", i);
137 write_sector_29f040b(bios, buf + i * page_size,
138 bios + i * page_size, page_size);
139 printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000140 }
141 printf("\n");
Ronald G. Minnicheaab50b2003-09-12 22:41:53 +0000142
Uwe Hermannffec5f32007-08-23 16:08:21 +0000143 return 0;
Ronald G. Minnich5e5f75e2002-01-29 18:21:41 +0000144}