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Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2007, 2008 Carl-Daniel Hailfinger
5 * Copyright (C) 2008 Ronald Hoogenboom <ronald@zonnet.nl>
Stefan Reinauer2cb94e12008-06-30 23:45:22 +00006 * Copyright (C) 2008 coresystems GmbH
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +00007 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 */
21
22/*
23 * Contains the ITE IT87* SPI specific routines
24 */
25
26#include <stdio.h>
27#include <pci/pci.h>
28#include <stdint.h>
29#include <string.h>
30#include "flash.h"
31#include "spi.h"
32
33#define ITE_SUPERIO_PORT1 0x2e
34#define ITE_SUPERIO_PORT2 0x4e
35
36
37uint16_t it8716f_flashport = 0;
38/* use fast 33MHz SPI (<>0) or slow 16MHz (0) */
39int fast_spi = 1;
40
41/* Generic Super I/O helper functions */
42uint8_t regval(uint16_t port, uint8_t reg)
43{
Andriy Gapon65c1b862008-05-22 13:22:45 +000044 OUTB(reg, port);
45 return INB(port + 1);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +000046}
47
48void regwrite(uint16_t port, uint8_t reg, uint8_t val)
49{
Andriy Gapon65c1b862008-05-22 13:22:45 +000050 OUTB(reg, port);
51 OUTB(val, port + 1);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +000052}
53
54/* Helper functions for most recent ITE IT87xx Super I/O chips */
55#define CHIP_ID_BYTE1_REG 0x20
56#define CHIP_ID_BYTE2_REG 0x21
57static void enter_conf_mode_ite(uint16_t port)
58{
Andriy Gapon65c1b862008-05-22 13:22:45 +000059 OUTB(0x87, port);
60 OUTB(0x01, port);
61 OUTB(0x55, port);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +000062 if (port == ITE_SUPERIO_PORT1)
Andriy Gapon65c1b862008-05-22 13:22:45 +000063 OUTB(0x55, port);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +000064 else
Andriy Gapon65c1b862008-05-22 13:22:45 +000065 OUTB(0xaa, port);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +000066}
67
68static void exit_conf_mode_ite(uint16_t port)
69{
70 regwrite(port, 0x02, 0x02);
71}
72
73static uint16_t find_ite_spi_flash_port(uint16_t port)
74{
75 uint8_t tmp = 0;
76 uint16_t id, flashport = 0;
77
78 enter_conf_mode_ite(port);
79
80 id = regval(port, CHIP_ID_BYTE1_REG) << 8;
81 id |= regval(port, CHIP_ID_BYTE2_REG);
82
83 /* TODO: Handle more IT87xx if they support flash translation */
84 if (id == 0x8716) {
85 /* NOLDN, reg 0x24, mask out lowest bit (suspend) */
86 tmp = regval(port, 0x24) & 0xFE;
87 printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
88 0xFFFE0000, 0xFFFFFFFF, (tmp & 1 << 1) ? "en" : "dis");
89 printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
90 0x000E0000, 0x000FFFFF, (tmp & 1 << 1) ? "en" : "dis");
91 printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
92 0xFFEE0000, 0xFFEFFFFF, (tmp & 1 << 2) ? "en" : "dis");
93 printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
94 0xFFF80000, 0xFFFEFFFF, (tmp & 1 << 3) ? "en" : "dis");
95 printf("LPC write to serial flash %sabled\n",
96 (tmp & 1 << 4) ? "en" : "dis");
Carl-Daniel Hailfinger337df1d2008-05-16 00:19:52 +000097 /* If any serial flash segment is enabled, enable writing. */
98 if ((tmp & 0xe) && (!(tmp & 1 << 4))) {
99 printf("Enabling LPC write to serial flash\n");
100 tmp |= 1 << 4;
101 regwrite(port, 0x24, tmp);
102 }
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000103 printf("serial flash pin %i\n", (tmp & 1 << 5) ? 87 : 29);
104 /* LDN 0x7, reg 0x64/0x65 */
105 regwrite(port, 0x07, 0x7);
106 flashport = regval(port, 0x64) << 8;
107 flashport |= regval(port, 0x65);
108 }
109 exit_conf_mode_ite(port);
110 return flashport;
111}
112
113int it87xx_probe_spi_flash(const char *name)
114{
115 it8716f_flashport = find_ite_spi_flash_port(ITE_SUPERIO_PORT1);
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000116
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000117 if (!it8716f_flashport)
118 it8716f_flashport = find_ite_spi_flash_port(ITE_SUPERIO_PORT2);
Stefan Reinauer2cb94e12008-06-30 23:45:22 +0000119
120 if (it8716f_flashport)
121 flashbus = BUS_TYPE_IT87XX_SPI;
122
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000123 return (!it8716f_flashport);
124}
125
126/* The IT8716F only supports commands with length 1,2,4,5 bytes including
127 command byte and can not read more than 3 bytes from the device.
128 This function expects writearr[0] to be the first byte sent to the device,
129 whereas the IT8716F splits commands internally into address and non-address
130 commands with the address in inverse wire order. That's why the register
131 ordering in case 4 and 5 may seem strange. */
132int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr)
133{
134 uint8_t busy, writeenc;
135 int i;
136
137 do {
Andriy Gapon65c1b862008-05-22 13:22:45 +0000138 busy = INB(it8716f_flashport) & 0x80;
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000139 } while (busy);
140 if (readcnt > 3) {
141 printf("%s called with unsupported readcnt %i.\n",
142 __FUNCTION__, readcnt);
143 return 1;
144 }
145 switch (writecnt) {
146 case 1:
Andriy Gapon65c1b862008-05-22 13:22:45 +0000147 OUTB(writearr[0], it8716f_flashport + 1);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000148 writeenc = 0x0;
149 break;
150 case 2:
Andriy Gapon65c1b862008-05-22 13:22:45 +0000151 OUTB(writearr[0], it8716f_flashport + 1);
152 OUTB(writearr[1], it8716f_flashport + 7);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000153 writeenc = 0x1;
154 break;
155 case 4:
Andriy Gapon65c1b862008-05-22 13:22:45 +0000156 OUTB(writearr[0], it8716f_flashport + 1);
157 OUTB(writearr[1], it8716f_flashport + 4);
158 OUTB(writearr[2], it8716f_flashport + 3);
159 OUTB(writearr[3], it8716f_flashport + 2);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000160 writeenc = 0x2;
161 break;
162 case 5:
Andriy Gapon65c1b862008-05-22 13:22:45 +0000163 OUTB(writearr[0], it8716f_flashport + 1);
164 OUTB(writearr[1], it8716f_flashport + 4);
165 OUTB(writearr[2], it8716f_flashport + 3);
166 OUTB(writearr[3], it8716f_flashport + 2);
167 OUTB(writearr[4], it8716f_flashport + 7);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000168 writeenc = 0x3;
169 break;
170 default:
171 printf("%s called with unsupported writecnt %i.\n",
172 __FUNCTION__, writecnt);
173 return 1;
174 }
175 /* Start IO, 33 or 16 MHz, readcnt input bytes, writecnt output bytes.
176 * Note:
177 * We can't use writecnt directly, but have to use a strange encoding.
178 */
Andriy Gapon65c1b862008-05-22 13:22:45 +0000179 OUTB(((0x4 + (fast_spi ? 1 : 0)) << 4) | ((readcnt & 0x3) << 2) | (writeenc), it8716f_flashport);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000180
181 if (readcnt > 0) {
182 do {
Andriy Gapon65c1b862008-05-22 13:22:45 +0000183 busy = INB(it8716f_flashport) & 0x80;
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000184 } while (busy);
185
186 for (i = 0; i < readcnt; i++) {
Andriy Gapon65c1b862008-05-22 13:22:45 +0000187 readarr[i] = INB(it8716f_flashport + 5 + i);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000188 }
189 }
190
191 return 0;
192}
193
194/* Page size is usually 256 bytes */
195void it8716f_spi_page_program(int block, uint8_t *buf, uint8_t *bios) {
196 int i;
197
198 spi_write_enable();
Andriy Gapon65c1b862008-05-22 13:22:45 +0000199 OUTB(0x06 , it8716f_flashport + 1);
200 OUTB(((2 + (fast_spi ? 1 : 0)) << 4), it8716f_flashport);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000201 for (i = 0; i < 256; i++) {
202 bios[256 * block + i] = buf[256 * block + i];
203 }
Andriy Gapon65c1b862008-05-22 13:22:45 +0000204 OUTB(0, it8716f_flashport);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000205 /* Wait until the Write-In-Progress bit is cleared.
206 * This usually takes 1-10 ms, so wait in 1 ms steps.
207 */
208 while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
209 usleep(1000);
210}
211
212/*
213 * IT8716F only allows maximum of 512 kb SPI mapped to LPC memory cycles
214 * Program chip using firmware cycle byte programming. (SLOW!)
215 */
216int it8716f_over512k_spi_chip_write(struct flashchip *flash, uint8_t *buf)
217{
218 int total_size = 1024 * flash->total_size;
219 int i;
220 fast_spi = 0;
221
222 spi_disable_blockprotect();
223 for (i = 0; i < total_size; i++) {
224 spi_write_enable();
225 spi_byte_program(i, buf[i]);
226 while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
227 myusec_delay(10);
228 }
229 /* resume normal ops... */
Andriy Gapon65c1b862008-05-22 13:22:45 +0000230 OUTB(0x20, it8716f_flashport);
Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +0000231 return 0;
232}
233
234/*
235 * IT8716F only allows maximum of 512 kb SPI mapped to LPC memory cycles
236 * Need to read this big flash using firmware cycles 3 byte at a time.
237 */
238int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf)
239{
240 int total_size = 1024 * flash->total_size;
241 int i;
242 fast_spi = 0;
243
244 if (total_size > 512 * 1024) {
245 for (i = 0; i < total_size; i += 3) {
246 int toread = 3;
247 if (total_size - i < toread)
248 toread = total_size - i;
249 spi_nbyte_read(i, buf + i, toread);
250 }
251 } else {
252 memcpy(buf, (const char *)flash->virtual_memory, total_size);
253 }
254 return 0;
255}
256
257int it8716f_spi_chip_write(struct flashchip *flash, uint8_t *buf) {
258 int total_size = 1024 * flash->total_size;
259 int i;
260 if (total_size > 512 * 1024) {
261 it8716f_over512k_spi_chip_write(flash, buf);
262 } else {
263 for (i = 0; i < total_size / 256; i++) {
264 spi_page_program(i, buf, (uint8_t *)flash->virtual_memory);
265 }
266 }
267 return 0;
268}
269