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Rudolf Marek525339c2009-05-17 19:46:43 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2009 Rudolf Marek <r.marek@assembler.cz>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
Uwe Hermanneaefb482009-05-17 22:57:34 +000018 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Rudolf Marek525339c2009-05-17 19:46:43 +000019 */
20
21/* Datasheets can be found on http://www.siliconimage.com. Great thanks! */
22
23#include <stdlib.h>
Rudolf Marek525339c2009-05-17 19:46:43 +000024#include "flash.h"
Carl-Daniel Hailfinger5b997c32010-07-27 22:41:39 +000025#include "programmer.h"
Patrick Georgi32508eb2012-07-20 20:35:14 +000026#include "hwaccess.h"
Rudolf Marek525339c2009-05-17 19:46:43 +000027
28#define PCI_VENDOR_ID_SII 0x1095
29
David Hendricks8bb20212011-06-14 01:35:36 +000030#define SATASII_MEMMAP_SIZE 0x100
31
Rudolf Marek525339c2009-05-17 19:46:43 +000032uint8_t *sii_bar;
Carl-Daniel Hailfingerad3cc552010-07-03 11:02:10 +000033static uint16_t id;
Rudolf Marek525339c2009-05-17 19:46:43 +000034
Carl-Daniel Hailfingerad3cc552010-07-03 11:02:10 +000035const struct pcidev_status satas_sii[] = {
Michael Karcher84486392010-02-24 00:04:40 +000036 {0x1095, 0x0680, OK, "Silicon Image", "PCI0680 Ultra ATA-133 Host Ctrl"},
37 {0x1095, 0x3112, OK, "Silicon Image", "SiI 3112 [SATALink/SATARaid] SATA Ctrl"},
38 {0x1095, 0x3114, OK, "Silicon Image", "SiI 3114 [SATALink/SATARaid] SATA Ctrl"},
Uwe Hermannc2521ab2010-07-29 22:39:47 +000039 {0x1095, 0x3124, OK, "Silicon Image", "SiI 3124 PCI-X SATA Ctrl"},
Michael Karcher84486392010-02-24 00:04:40 +000040 {0x1095, 0x3132, OK, "Silicon Image", "SiI 3132 SATA Raid II Ctrl"},
Carl-Daniel Hailfinger9017cec2010-09-04 23:37:40 +000041 {0x1095, 0x3512, OK, "Silicon Image", "SiI 3512 [SATALink/SATARaid] SATA Ctrl"},
Uwe Hermanneaefb482009-05-17 22:57:34 +000042
Rudolf Marek525339c2009-05-17 19:46:43 +000043 {},
44};
45
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +000046static void satasii_chip_writeb(const struct flashctx *flash, uint8_t val,
47 chipaddr addr);
48static uint8_t satasii_chip_readb(const struct flashctx *flash,
49 const chipaddr addr);
Carl-Daniel Hailfingereaacd2d2011-11-09 23:40:00 +000050static const struct par_programmer par_programmer_satasii = {
51 .chip_readb = satasii_chip_readb,
52 .chip_readw = fallback_chip_readw,
53 .chip_readl = fallback_chip_readl,
54 .chip_readn = fallback_chip_readn,
55 .chip_writeb = satasii_chip_writeb,
56 .chip_writew = fallback_chip_writew,
57 .chip_writel = fallback_chip_writel,
58 .chip_writen = fallback_chip_writen,
59};
60
David Hendricks8bb20212011-06-14 01:35:36 +000061static int satasii_shutdown(void *data)
62{
63 physunmap(sii_bar, SATASII_MEMMAP_SIZE);
64 pci_cleanup(pacc);
David Hendricks8bb20212011-06-14 01:35:36 +000065 return 0;
66}
67
Rudolf Marek525339c2009-05-17 19:46:43 +000068int satasii_init(void)
69{
70 uint32_t addr;
71 uint16_t reg_offset;
72
Carl-Daniel Hailfingerd6bb8282012-07-21 17:27:08 +000073 if (rget_io_perms())
74 return 1;
Rudolf Marek525339c2009-05-17 19:46:43 +000075
Carl-Daniel Hailfinger40446ee2011-03-07 01:08:09 +000076 pcidev_init(PCI_BASE_ADDRESS_0, satas_sii);
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +000077
Rudolf Marek525339c2009-05-17 19:46:43 +000078 id = pcidev_dev->device_id;
79
80 if ((id == 0x3132) || (id == 0x3124)) {
Uwe Hermanneaefb482009-05-17 22:57:34 +000081 addr = pci_read_long(pcidev_dev, PCI_BASE_ADDRESS_0) & ~0x07;
Rudolf Marek525339c2009-05-17 19:46:43 +000082 reg_offset = 0x70;
83 } else {
Uwe Hermanneaefb482009-05-17 22:57:34 +000084 addr = pci_read_long(pcidev_dev, PCI_BASE_ADDRESS_5) & ~0x07;
Rudolf Marek525339c2009-05-17 19:46:43 +000085 reg_offset = 0x50;
86 }
87
David Hendricks8bb20212011-06-14 01:35:36 +000088 sii_bar = physmap("SATA SIL registers", addr, SATASII_MEMMAP_SIZE) +
89 reg_offset;
Rudolf Marek525339c2009-05-17 19:46:43 +000090
Uwe Hermanneaefb482009-05-17 22:57:34 +000091 /* Check if ROM cycle are OK. */
Carl-Daniel Hailfinger1d3a2fe2010-07-27 22:03:46 +000092 if ((id != 0x0680) && (!(pci_mmio_readl(sii_bar) & (1 << 26))))
Sean Nelson05ce5422010-01-09 23:50:27 +000093 msg_pinfo("Warning: Flash seems unconnected.\n");
Rudolf Marek525339c2009-05-17 19:46:43 +000094
David Hendricks8bb20212011-06-14 01:35:36 +000095 if (register_shutdown(satasii_shutdown, NULL))
96 return 1;
Carl-Daniel Hailfingereaacd2d2011-11-09 23:40:00 +000097
98 register_par_programmer(&par_programmer_satasii, BUS_PARALLEL);
99
Rudolf Marek525339c2009-05-17 19:46:43 +0000100 return 0;
101}
102
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000103static void satasii_chip_writeb(const struct flashctx *flash, uint8_t val,
104 chipaddr addr)
Rudolf Marek525339c2009-05-17 19:46:43 +0000105{
Uwe Hermanneaefb482009-05-17 22:57:34 +0000106 uint32_t ctrl_reg, data_reg;
Rudolf Marek525339c2009-05-17 19:46:43 +0000107
Carl-Daniel Hailfinger1d3a2fe2010-07-27 22:03:46 +0000108 while ((ctrl_reg = pci_mmio_readl(sii_bar)) & (1 << 25)) ;
Rudolf Marek525339c2009-05-17 19:46:43 +0000109
Uwe Hermanneaefb482009-05-17 22:57:34 +0000110 /* Mask out unused/reserved bits, set writes and start transaction. */
Rudolf Marek525339c2009-05-17 19:46:43 +0000111 ctrl_reg &= 0xfcf80000;
112 ctrl_reg |= (1 << 25) | (0 << 24) | ((uint32_t) addr & 0x7ffff);
113
Carl-Daniel Hailfinger1d3a2fe2010-07-27 22:03:46 +0000114 data_reg = (pci_mmio_readl((sii_bar + 4)) & ~0xff) | val;
115 pci_mmio_writel(data_reg, (sii_bar + 4));
116 pci_mmio_writel(ctrl_reg, sii_bar);
Rudolf Marek525339c2009-05-17 19:46:43 +0000117
Carl-Daniel Hailfinger1d3a2fe2010-07-27 22:03:46 +0000118 while (pci_mmio_readl(sii_bar) & (1 << 25)) ;
Rudolf Marek525339c2009-05-17 19:46:43 +0000119}
120
Carl-Daniel Hailfinger8a3c60c2011-12-18 15:01:24 +0000121static uint8_t satasii_chip_readb(const struct flashctx *flash,
122 const chipaddr addr)
Rudolf Marek525339c2009-05-17 19:46:43 +0000123{
124 uint32_t ctrl_reg;
125
Carl-Daniel Hailfinger1d3a2fe2010-07-27 22:03:46 +0000126 while ((ctrl_reg = pci_mmio_readl(sii_bar)) & (1 << 25)) ;
Rudolf Marek525339c2009-05-17 19:46:43 +0000127
Uwe Hermanneaefb482009-05-17 22:57:34 +0000128 /* Mask out unused/reserved bits, set reads and start transaction. */
Rudolf Marek525339c2009-05-17 19:46:43 +0000129 ctrl_reg &= 0xfcf80000;
130 ctrl_reg |= (1 << 25) | (1 << 24) | ((uint32_t) addr & 0x7ffff);
131
Carl-Daniel Hailfinger1d3a2fe2010-07-27 22:03:46 +0000132 pci_mmio_writel(ctrl_reg, sii_bar);
Rudolf Marek525339c2009-05-17 19:46:43 +0000133
Carl-Daniel Hailfinger1d3a2fe2010-07-27 22:03:46 +0000134 while (pci_mmio_readl(sii_bar) & (1 << 25)) ;
Rudolf Marek525339c2009-05-17 19:46:43 +0000135
Carl-Daniel Hailfinger1d3a2fe2010-07-27 22:03:46 +0000136 return (pci_mmio_readl(sii_bar + 4)) & 0xff;
Rudolf Marek525339c2009-05-17 19:46:43 +0000137}