blob: 5c56293ae5a1ec9776c779a2c966eba68418e139 [file] [log] [blame]
Rudolf Marek525339c2009-05-17 19:46:43 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2009 Rudolf Marek <r.marek@assembler.cz>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
Uwe Hermanneaefb482009-05-17 22:57:34 +000018 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
Rudolf Marek525339c2009-05-17 19:46:43 +000019 */
20
21/* Datasheets can be found on http://www.siliconimage.com. Great thanks! */
22
23#include <stdlib.h>
Rudolf Marek525339c2009-05-17 19:46:43 +000024#include "flash.h"
25
26#define PCI_VENDOR_ID_SII 0x1095
27
28uint8_t *sii_bar;
Carl-Daniel Hailfingerad3cc552010-07-03 11:02:10 +000029static uint16_t id;
Rudolf Marek525339c2009-05-17 19:46:43 +000030
Carl-Daniel Hailfingerad3cc552010-07-03 11:02:10 +000031const struct pcidev_status satas_sii[] = {
Michael Karcher84486392010-02-24 00:04:40 +000032 {0x1095, 0x0680, OK, "Silicon Image", "PCI0680 Ultra ATA-133 Host Ctrl"},
33 {0x1095, 0x3112, OK, "Silicon Image", "SiI 3112 [SATALink/SATARaid] SATA Ctrl"},
34 {0x1095, 0x3114, OK, "Silicon Image", "SiI 3114 [SATALink/SATARaid] SATA Ctrl"},
35 {0x1095, 0x3124, NT, "Silicon Image", "SiI 3124 PCI-X SATA Ctrl"},
36 {0x1095, 0x3132, OK, "Silicon Image", "SiI 3132 SATA Raid II Ctrl"},
37 {0x1095, 0x3512, NT, "Silicon Image", "SiI 3512 [SATALink/SATARaid] SATA Ctrl"},
Uwe Hermanneaefb482009-05-17 22:57:34 +000038
Rudolf Marek525339c2009-05-17 19:46:43 +000039 {},
40};
41
42int satasii_init(void)
43{
44 uint32_t addr;
45 uint16_t reg_offset;
46
47 get_io_perms();
48
Carl-Daniel Hailfinger744132a2010-07-06 09:55:48 +000049 pcidev_init(PCI_VENDOR_ID_SII, PCI_BASE_ADDRESS_0, satas_sii);
50
Rudolf Marek525339c2009-05-17 19:46:43 +000051 id = pcidev_dev->device_id;
52
53 if ((id == 0x3132) || (id == 0x3124)) {
Uwe Hermanneaefb482009-05-17 22:57:34 +000054 addr = pci_read_long(pcidev_dev, PCI_BASE_ADDRESS_0) & ~0x07;
Rudolf Marek525339c2009-05-17 19:46:43 +000055 reg_offset = 0x70;
56 } else {
Uwe Hermanneaefb482009-05-17 22:57:34 +000057 addr = pci_read_long(pcidev_dev, PCI_BASE_ADDRESS_5) & ~0x07;
Rudolf Marek525339c2009-05-17 19:46:43 +000058 reg_offset = 0x50;
59 }
60
Uwe Hermanneaefb482009-05-17 22:57:34 +000061 sii_bar = physmap("SATA SIL registers", addr, 0x100) + reg_offset;
Rudolf Marek525339c2009-05-17 19:46:43 +000062
Uwe Hermanneaefb482009-05-17 22:57:34 +000063 /* Check if ROM cycle are OK. */
Urja Rannikko211fa972009-05-31 21:35:10 +000064 if ((id != 0x0680) && (!(mmio_readl(sii_bar) & (1 << 26))))
Sean Nelson05ce5422010-01-09 23:50:27 +000065 msg_pinfo("Warning: Flash seems unconnected.\n");
Rudolf Marek525339c2009-05-17 19:46:43 +000066
Carl-Daniel Hailfingerb22918c2009-06-01 02:08:58 +000067 buses_supported = CHIP_BUSTYPE_PARALLEL;
68
Rudolf Marek525339c2009-05-17 19:46:43 +000069 return 0;
70}
71
72int satasii_shutdown(void)
73{
Rudolf Marek525339c2009-05-17 19:46:43 +000074 pci_cleanup(pacc);
Carl-Daniel Hailfingerdb41c592009-08-09 21:50:24 +000075 release_io_perms();
Rudolf Marek525339c2009-05-17 19:46:43 +000076 return 0;
77}
78
Rudolf Marek525339c2009-05-17 19:46:43 +000079void satasii_chip_writeb(uint8_t val, chipaddr addr)
80{
Uwe Hermanneaefb482009-05-17 22:57:34 +000081 uint32_t ctrl_reg, data_reg;
Rudolf Marek525339c2009-05-17 19:46:43 +000082
83 while ((ctrl_reg = mmio_readl(sii_bar)) & (1 << 25)) ;
84
Uwe Hermanneaefb482009-05-17 22:57:34 +000085 /* Mask out unused/reserved bits, set writes and start transaction. */
Rudolf Marek525339c2009-05-17 19:46:43 +000086 ctrl_reg &= 0xfcf80000;
87 ctrl_reg |= (1 << 25) | (0 << 24) | ((uint32_t) addr & 0x7ffff);
88
Uwe Hermanneaefb482009-05-17 22:57:34 +000089 data_reg = (mmio_readl((sii_bar + 4)) & ~0xff) | val;
90 mmio_writel(data_reg, (sii_bar + 4));
Rudolf Marek525339c2009-05-17 19:46:43 +000091 mmio_writel(ctrl_reg, sii_bar);
92
93 while (mmio_readl(sii_bar) & (1 << 25)) ;
Rudolf Marek525339c2009-05-17 19:46:43 +000094}
95
96uint8_t satasii_chip_readb(const chipaddr addr)
97{
98 uint32_t ctrl_reg;
99
100 while ((ctrl_reg = mmio_readl(sii_bar)) & (1 << 25)) ;
101
Uwe Hermanneaefb482009-05-17 22:57:34 +0000102 /* Mask out unused/reserved bits, set reads and start transaction. */
Rudolf Marek525339c2009-05-17 19:46:43 +0000103 ctrl_reg &= 0xfcf80000;
104 ctrl_reg |= (1 << 25) | (1 << 24) | ((uint32_t) addr & 0x7ffff);
105
106 mmio_writel(ctrl_reg, sii_bar);
107
Uwe Hermanneaefb482009-05-17 22:57:34 +0000108 while (mmio_readl(sii_bar) & (1 << 25)) ;
Rudolf Marek525339c2009-05-17 19:46:43 +0000109
110 return (mmio_readl(sii_bar + 4)) & 0xff;
111}