blob: f38626c7c3301feb5448cf2a0ccd0c4bc146f043 [file] [log] [blame]
Carl-Daniel Hailfinger7a3bd8f2011-05-19 00:06:06 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2010 Carl-Daniel Hailfinger
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19
20#include "flash.h"
21#include "chipdrivers.h"
22#include "spi.h"
23
24/* Prettyprint the status register. Works for AMIC A25L series. */
25
26int spi_prettyprint_status_register_amic_a25l05p(struct flashchip *flash)
27{
28 uint8_t status;
29
30 status = spi_read_status_register();
31 msg_cdbg("Chip status register is %02x\n", status);
32
33 msg_cdbg("Chip status register: Status Register Write Disable "
34 "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
35 spi_prettyprint_status_register_bit(status, 6);
36 spi_prettyprint_status_register_bit(status, 5);
37 spi_prettyprint_status_register_bit(status, 4);
38 spi_prettyprint_status_register_bp3210(status, 1);
39 spi_prettyprint_status_register_welwip(status);
40 return 0;
41}
42
43int spi_prettyprint_status_register_amic_a25l40p(struct flashchip *flash)
44{
45 uint8_t status;
46
47 status = spi_read_status_register();
48 msg_cdbg("Chip status register is %02x\n", status);
49
50 msg_cdbg("Chip status register: Status Register Write Disable "
51 "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
52 spi_prettyprint_status_register_bit(status, 6);
53 spi_prettyprint_status_register_bit(status, 5);
54 spi_prettyprint_status_register_bp3210(status, 2);
55 spi_prettyprint_status_register_welwip(status);
56 return 0;
57}
58
59int spi_prettyprint_status_register_amic_a25l032(struct flashchip *flash)
60{
61 uint8_t status;
62
63 status = spi_read_status_register();
64 msg_cdbg("Chip status register is %02x\n", status);
65
66 msg_cdbg("Chip status register: Status Register Write Disable "
67 "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
68 msg_cdbg("Chip status register: Sector Protect Size (SEC) "
69 "is %i KB\n", (status & (1 << 6)) ? 4 : 64);
70 msg_cdbg("Chip status register: Top/Bottom (TB) "
71 "is %s\n", (status & (1 << 5)) ? "bottom" : "top");
72 spi_prettyprint_status_register_bp3210(status, 2);
73 spi_prettyprint_status_register_welwip(status);
74 msg_cdbg("Chip status register 2 is NOT decoded!\n");
75 return 0;
76}
77
78int spi_prettyprint_status_register_amic_a25lq032(struct flashchip *flash)
79{
80 uint8_t status;
81
82 status = spi_read_status_register();
83 msg_cdbg("Chip status register is %02x\n", status);
84
85 msg_cdbg("Chip status register: Status Register Write Disable "
86 "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
87 msg_cdbg("Chip status register: Sector Protect Size (SEC) "
88 "is %i KB\n", (status & (1 << 6)) ? 4 : 64);
89 msg_cdbg("Chip status register: Top/Bottom (TB) "
90 "is %s\n", (status & (1 << 5)) ? "bottom" : "top");
91 spi_prettyprint_status_register_bp3210(status, 2);
92 spi_prettyprint_status_register_welwip(status);
93 msg_cdbg("Chip status register 2 is NOT decoded!\n");
94 return 0;
95}
96
97/* FIXME: spi_disable_blockprotect is incorrect but works fine for chips using
98 * spi_prettyprint_status_register_amic_a25l05p or
99 * spi_prettyprint_status_register_amic_a25l40p.
100 * FIXME: spi_disable_blockprotect is incorrect and will fail for chips using
101 * spi_prettyprint_status_register_amic_a25l032 or
102 * spi_prettyprint_status_register_amic_a25lq032 if those have locks controlled
103 * by the second status register.
104 */