Refine status register and lock printing of Atmel and AMIC SPI chips
Add lock printing for AMIC A25L05PT, A25L05PU, A25L10PT, A25L10PU,
A25L20PT, A25L20PU, A25L40PT, A25L40PU, A25L80P, A25L16PT, A25L16PU,
A25L512, A25L010, A25L020, A25L040, A25L080, A25L016, A25L032, A25LQ032
to a25.c.
Add lock printing for Atmel AT26DF081A, AT26DF161, AT26DF161A,
AT26DF321.
Move Atmel AT25*/AT26* lock related functions originally added in r1115
from spi25.c to at25.c.
For SPI chips the lock printing was handled by one common function, but
sharing a common function which only is a big switch() statement doesn't
make sense, especially if we can define lock printing functions per
flash chip anyway.
The printlock function pointer in struct flashchip is used to print
status register and locking information, and serves as replacement for
implicit status register and lock printing during probe. That code will
later be changed to store locking info in a machine- accessible data
structure so flashrom can handle locked regions correctly.
Corresponding to flashrom svn r1316.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
diff --git a/a25.c b/a25.c
new file mode 100644
index 0000000..f38626c
--- /dev/null
+++ b/a25.c
@@ -0,0 +1,104 @@
+/*
+ * This file is part of the flashrom project.
+ *
+ * Copyright (C) 2010 Carl-Daniel Hailfinger
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include "flash.h"
+#include "chipdrivers.h"
+#include "spi.h"
+
+/* Prettyprint the status register. Works for AMIC A25L series. */
+
+int spi_prettyprint_status_register_amic_a25l05p(struct flashchip *flash)
+{
+ uint8_t status;
+
+ status = spi_read_status_register();
+ msg_cdbg("Chip status register is %02x\n", status);
+
+ msg_cdbg("Chip status register: Status Register Write Disable "
+ "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
+ spi_prettyprint_status_register_bit(status, 6);
+ spi_prettyprint_status_register_bit(status, 5);
+ spi_prettyprint_status_register_bit(status, 4);
+ spi_prettyprint_status_register_bp3210(status, 1);
+ spi_prettyprint_status_register_welwip(status);
+ return 0;
+}
+
+int spi_prettyprint_status_register_amic_a25l40p(struct flashchip *flash)
+{
+ uint8_t status;
+
+ status = spi_read_status_register();
+ msg_cdbg("Chip status register is %02x\n", status);
+
+ msg_cdbg("Chip status register: Status Register Write Disable "
+ "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
+ spi_prettyprint_status_register_bit(status, 6);
+ spi_prettyprint_status_register_bit(status, 5);
+ spi_prettyprint_status_register_bp3210(status, 2);
+ spi_prettyprint_status_register_welwip(status);
+ return 0;
+}
+
+int spi_prettyprint_status_register_amic_a25l032(struct flashchip *flash)
+{
+ uint8_t status;
+
+ status = spi_read_status_register();
+ msg_cdbg("Chip status register is %02x\n", status);
+
+ msg_cdbg("Chip status register: Status Register Write Disable "
+ "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
+ msg_cdbg("Chip status register: Sector Protect Size (SEC) "
+ "is %i KB\n", (status & (1 << 6)) ? 4 : 64);
+ msg_cdbg("Chip status register: Top/Bottom (TB) "
+ "is %s\n", (status & (1 << 5)) ? "bottom" : "top");
+ spi_prettyprint_status_register_bp3210(status, 2);
+ spi_prettyprint_status_register_welwip(status);
+ msg_cdbg("Chip status register 2 is NOT decoded!\n");
+ return 0;
+}
+
+int spi_prettyprint_status_register_amic_a25lq032(struct flashchip *flash)
+{
+ uint8_t status;
+
+ status = spi_read_status_register();
+ msg_cdbg("Chip status register is %02x\n", status);
+
+ msg_cdbg("Chip status register: Status Register Write Disable "
+ "(SRWD) is %sset\n", (status & (1 << 7)) ? "" : "not ");
+ msg_cdbg("Chip status register: Sector Protect Size (SEC) "
+ "is %i KB\n", (status & (1 << 6)) ? 4 : 64);
+ msg_cdbg("Chip status register: Top/Bottom (TB) "
+ "is %s\n", (status & (1 << 5)) ? "bottom" : "top");
+ spi_prettyprint_status_register_bp3210(status, 2);
+ spi_prettyprint_status_register_welwip(status);
+ msg_cdbg("Chip status register 2 is NOT decoded!\n");
+ return 0;
+}
+
+/* FIXME: spi_disable_blockprotect is incorrect but works fine for chips using
+ * spi_prettyprint_status_register_amic_a25l05p or
+ * spi_prettyprint_status_register_amic_a25l40p.
+ * FIXME: spi_disable_blockprotect is incorrect and will fail for chips using
+ * spi_prettyprint_status_register_amic_a25l032 or
+ * spi_prettyprint_status_register_amic_a25lq032 if those have locks controlled
+ * by the second status register.
+ */