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Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
6 * Copyright (C) 2005-2007 coresystems GmbH <stepan@coresystems.de>
7 * Copyright (C) 2006-2009 Carl-Daniel Hailfinger
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +000018 */
19
20#ifndef __FLASHCHIPS_H__
21#define __FLASHCHIPS_H__ 1
22
23/*
24 * Please keep this list sorted alphabetically by manufacturer. The first
25 * entry of each section should be the manufacturer ID, followed by the
Stefan Tauner5c316f92015-02-08 21:57:52 +000026 * list of devices from that manufacturer (sorted by device ID).
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +000027 *
Stefan Tauner03a9c3c2014-08-03 14:15:14 +000028 * Most LPC/FWH parts (parallel flash) have 8-bit device IDs if there is no
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +000029 * continuation code.
Stefan Tauner03a9c3c2014-08-03 14:15:14 +000030 * SPI parts have at least 16-bit device IDs if they support RDID.
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +000031 */
32
Stefan Taunerac1b4c82012-02-17 14:51:04 +000033#define GENERIC_MANUF_ID 0xFFFF /* Check if there is a vendor ID */
34#define GENERIC_DEVICE_ID 0xFFFF /* Only match the vendor ID */
35#define SFDP_DEVICE_ID 0xFFFE
36#define PROGMANUF_ID 0xFFFE /* dummy ID for opaque chips behind a programmer */
37#define PROGDEV_ID 0x01 /* dummy ID for opaque chips behind a programmer */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +000038
39#define ALLIANCE_ID 0x52 /* Alliance Semiconductor */
Mattias Mattssoneaf5ead2010-09-18 23:42:36 +000040#define ALLIANCE_AS29F002B 0x34
41#define ALLIANCE_AS29F002T 0xB0
42#define ALLIANCE_AS29F010 0x04
43#define ALLIANCE_AS29F040 0xA4
44#define ALLIANCE_AS29F200B 0x57
45#define ALLIANCE_AS29F200T 0x51
46#define ALLIANCE_AS29LV160B 0x49
47#define ALLIANCE_AS29LV160T 0xCA
48#define ALLIANCE_AS29LV400B 0xBA
49#define ALLIANCE_AS29LV400T 0xB9
50#define ALLIANCE_AS29LV800B 0x5B
51#define ALLIANCE_AS29LV800T 0xDA
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +000052
53#define AMD_ID 0x01 /* AMD */
Mattias Mattsson6eabe282010-09-15 23:31:03 +000054#define AMD_AM29DL400BT 0x0C
55#define AMD_AM29DL400BB 0x0F
56#define AMD_AM29DL800BT 0x4A
57#define AMD_AM29DL800BB 0xCB
58#define AMD_AM29F002BB 0x34 /* Same as Am29F002NBB */
59#define AMD_AM29F002BT 0xB0 /* Same as Am29F002NBT */
60#define AMD_AM29F004BB 0x7B
61#define AMD_AM29F004BT 0x77
62#define AMD_AM29F016D 0xAD
Stefan Taunerd1ca1e82016-01-31 23:17:35 +000063#define AMD_AM29F010 0x20 /* Same as Am29F010A and Am29F010B */
64#define AMD_AM29F040 0xA4 /* Same as AM29F040B */
65#define AMD_AM29F080 0xD5 /* Same as Am29F080B */
Mattias Mattsson6eabe282010-09-15 23:31:03 +000066#define AMD_AM29F200BB 0x57
67#define AMD_AM29F200BT 0x51
68#define AMD_AM29F400BB 0xAB
69#define AMD_AM29F400BT 0x23
70#define AMD_AM29F800BB 0x58
71#define AMD_AM29F800BT 0xD6
Carl-Daniel Hailfingerc753e5b2011-02-05 12:11:17 +000072#define AMD_AM29LV001BB 0x6D
73#define AMD_AM29LV001BT 0xED
Stefan Tauner6697f712014-08-06 15:09:15 +000074#define AMD_AM29LV010B 0x6E /* 1Mb, uniform */
Mattias Mattsson6eabe282010-09-15 23:31:03 +000075#define AMD_AM29LV002BB 0xC2
76#define AMD_AM29LV002BT 0x40
77#define AMD_AM29LV004BB 0xB6
78#define AMD_AM29LV004BT 0xB5
79#define AMD_AM29LV008BB 0x37
80#define AMD_AM29LV008BT 0x3E
81#define AMD_AM29LV040B 0x4F
82#define AMD_AM29LV080B 0x38 /* Same as Am29LV081B */
83#define AMD_AM29LV200BB 0xBF
84#define AMD_AM29LV200BT 0x3B
85#define AMD_AM29LV800BB 0x5B /* Same as Am29LV800DB */
86#define AMD_AM29LV400BT 0xB9
87#define AMD_AM29LV400BB 0xBA
88#define AMD_AM29LV800BT 0xDA /* Same as Am29LV800DT */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +000089
90#define AMIC_ID 0x7F37 /* AMIC */
91#define AMIC_ID_NOPREFIX 0x37 /* AMIC */
Daniel Lenskidf90d3a2010-07-22 11:44:38 +000092#define AMIC_A25L05PT 0x2020
93#define AMIC_A25L05PU 0x2010
94#define AMIC_A25L10PT 0x2021
95#define AMIC_A25L10PU 0x2011
96#define AMIC_A25L20PT 0x2022
97#define AMIC_A25L20PU 0x2012
98#define AMIC_A25L40PT 0x2013 /* Datasheet says T and U have
99 same device ID. Confirmed by
100 hardware testing. */
101#define AMIC_A25L40PU 0x2013
102#define AMIC_A25L80P 0x2014 /* Seems that no A25L80PT exists */
103#define AMIC_A25L16PT 0x2025
104#define AMIC_A25L16PU 0x2015
Dan Lenski11617122010-07-29 15:00:40 +0000105#define AMIC_A25L512 0x3010
106#define AMIC_A25L010 0x3011
107#define AMIC_A25L020 0x3012
108#define AMIC_A25L040 0x3013
109#define AMIC_A25L080 0x3014
110#define AMIC_A25L016 0x3015
111#define AMIC_A25L032 0x3016
Nikolay Nikolaevd07fde62013-06-28 21:29:21 +0000112#define AMIC_A25LQ16 0x4015
113#define AMIC_A25LQ032 0x4016 /* Same as A25LQ32A, but the latter supports SFDP */
114#define AMIC_A25LQ64 0x4017
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000115#define AMIC_A29002B 0x0d
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000116#define AMIC_A29002T 0x8C /* Same as A290021T */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000117#define AMIC_A29040B 0x86
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000118#define AMIC_A29400T 0xB0 /* Same as 294001T */
119#define AMIC_A29400U 0x31 /* Same as A294001U */
120#define AMIC_A29800T 0x0E
121#define AMIC_A29800U 0x8F
122#define AMIC_A29L004T 0x34 /* Same as A29L400T */
123#define AMIC_A29L004U 0xB5 /* Same as A29L400U */
124#define AMIC_A29L008T 0x1A /* Same as A29L800T */
125#define AMIC_A29L008U 0x9B /* Same as A29L800U */
126#define AMIC_A29L040 0x92
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000127#define AMIC_A49LF040A 0x9d
128
Stefan Taunerc9d8b272014-06-01 13:22:35 +0000129#define ATMEL_ID 0x1F /* Atmel (now used by Adesto) */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000130#define ATMEL_AT25DF021 0x4300
Steffen Mauch0b59b0d2018-06-02 23:46:03 +0200131#define ATMEL_AT25DF021A 0x4301
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000132#define ATMEL_AT25DF041A 0x4401
Stefan Taunercecb2c52013-06-20 22:55:41 +0000133#define ATMEL_AT25DF081 0x4502 /* EDI 0x00. AT25DL081 has same ID + EDI 0x0100 */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000134#define ATMEL_AT25DF081A 0x4501 /* Yes, 81A has a lower number than 81 */
135#define ATMEL_AT25DF161 0x4602
136#define ATMEL_AT25DF321 0x4700 /* Same as 26DF321 */
137#define ATMEL_AT25DF321A 0x4701
138#define ATMEL_AT25DF641 0x4800
Stefan Taunercecb2c52013-06-20 22:55:41 +0000139#define ATMEL_AT25DL161 0x4603 /* EDI 0x0100 */
140#define ATMEL_AT25DQ161 0x8600 /* EDI 0x0100 */
141#define ATMEL_AT25DQ321 0x8700 /* EDI 0x0100 */
Stefan Tauner0554ca52013-07-25 22:54:25 +0000142#define ATMEL_AT25F512 0x60 /* Needs AT25F_RDID. ID from PCN and actual HW. Seems to be a relabeled AT25F1024. */
Stefan Tauner57794ac2012-12-29 15:04:20 +0000143#define ATMEL_AT25F512A 0x65 /* Needs AT25F_RDID */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000144#define ATMEL_AT25F512B 0x6500
Stefan Tauner57794ac2012-12-29 15:04:20 +0000145#define ATMEL_AT25F1024 0x60 /* Needs AT25F_RDID */
146#define ATMEL_AT25F2048 0x63 /* Needs AT25F_RDID */
147#define ATMEL_AT25F4096 0x64 /* Needs AT25F_RDID */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000148#define ATMEL_AT25FS010 0x6601
149#define ATMEL_AT25FS040 0x6604
Elyes HAOUASac01baa2018-05-28 16:52:21 +0200150#define ATMEL_AT25SF041 0x8401
Evan Jensen291c1012018-05-17 14:30:19 -0700151#define ATMEL_AT25SF081 0x8501
152#define ATMEL_AT25SF161 0x8601
Hal Martin49e23d22018-05-27 14:18:43 +0200153#define ATMEL_AT25SL128A 0x4218
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000154#define ATMEL_AT26DF041 0x4400
155#define ATMEL_AT26DF081 0x4500 /* guessed, no datasheet available */
Stefan Taunerc0aaf952011-05-19 02:58:17 +0000156#define ATMEL_AT26DF081A 0x4501
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000157#define ATMEL_AT26DF161 0x4600
Stefan Taunerc0aaf952011-05-19 02:58:17 +0000158#define ATMEL_AT26DF161A 0x4601
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000159#define ATMEL_AT26F004 0x0400
Stefan Tauner6697f712014-08-06 15:09:15 +0000160#define ATMEL_AT29LV512 0x3D
161#define ATMEL_AT29LV010A 0x35 /* Same as AT29BV010A, the latter works down to 2.7V */
162#define ATMEL_AT29LV020 0xBA
163#define ATMEL_AT29BV040A 0xC4
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000164#define ATMEL_AT29C040A 0xA4
165#define ATMEL_AT29C010A 0xD5
166#define ATMEL_AT29C020 0xDA
167#define ATMEL_AT29C512 0x5D
168#define ATMEL_AT45BR3214B /* No ID available */
169#define ATMEL_AT45CS1282 0x2920
170#define ATMEL_AT45D011 /* No ID available */
171#define ATMEL_AT45D021A /* No ID available */
172#define ATMEL_AT45D041A /* No ID available */
173#define ATMEL_AT45D081A /* No ID available */
174#define ATMEL_AT45D161 /* No ID available */
Aidan Thorntondb4e87d2013-08-27 18:01:53 +0000175#define ATMEL_AT45DB011 /* No ID (opcode) available for AT45DB011, AT45DB011B */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000176#define ATMEL_AT45DB011D 0x2200
Aidan Thorntondb4e87d2013-08-27 18:01:53 +0000177#define ATMEL_AT45DB021 /* No ID (opcode) available for AT45DB021, AT45DB021A, AT45DB021B */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000178#define ATMEL_AT45DB021D 0x2300
Aidan Thorntondb4e87d2013-08-27 18:01:53 +0000179#define ATMEL_AT45DB021E /* same as above but with EDI 0x0100 */
180#define ATMEL_AT45DB041 /* No ID (opcode) available for AT45DB041, AT45DB041A, AT45DB041B */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000181#define ATMEL_AT45DB041D 0x2400
Aidan Thorntondb4e87d2013-08-27 18:01:53 +0000182#define ATMEL_AT45DB041E /* same as above but with EDI 0x0100 */
183#define ATMEL_AT45DB081 /* No ID (opcode) available for AT45DB081, AT45DB081A, AT45DB081B */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000184#define ATMEL_AT45DB081D 0x2500
Aidan Thorntondb4e87d2013-08-27 18:01:53 +0000185#define ATMEL_AT45DB081E /* same as above but with EDI 0x0100 */
186#define ATMEL_AT45DB161 /* No ID (opcode) available for AT45DB161, AT45DB161B */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000187#define ATMEL_AT45DB161D 0x2600
Aidan Thorntondb4e87d2013-08-27 18:01:53 +0000188#define ATMEL_AT45DB161E /* same as above but with EDI 0x0100 */
189#define ATMEL_AT45DB321 /* No ID (opcode) available for AT45DB321, AT45DB321B */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000190#define ATMEL_AT45DB321C 0x2700
Aidan Thorntondb4e87d2013-08-27 18:01:53 +0000191#define ATMEL_AT45DB321E /* same as above but with EDI 0x0100 */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000192#define ATMEL_AT45DB321D 0x2701 /* Buggy data sheet */
Aidan Thorntondb4e87d2013-08-27 18:01:53 +0000193#define ATMEL_AT45DB642 /* No ID (opcode) available for AT45DB642 */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000194#define ATMEL_AT45DB642D 0x2800
Stefan Tauner6697f712014-08-06 15:09:15 +0000195#define ATMEL_AT49BV512 0x03 /* Same as AT49F512 */
196#define ATMEL_AT49F001N 0x05 /* Same as AT49F001 */
197#define ATMEL_AT49F001NT 0x04 /* Same as AT49F001T */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000198#define ATMEL_AT49F002N 0x07 /* for AT49F002(N) */
Uwe Hermannc74e9772011-09-08 19:55:18 +0000199#define ATMEL_AT49LH002 0xE9
Stefan Tauner7de93932014-08-03 13:05:45 +0000200#define ATMEL_AT49LH00B4 0xED
201#define ATMEL_AT49LH004 0xEE
David Borgf5a30f62012-04-15 13:16:32 +0000202#define ATMEL_AT49F002NT 0x08 /* for AT49F002(N)T */
Stefan Tauner6697f712014-08-06 15:09:15 +0000203#define ATMEL_AT49F010 0x17 /* Same as AT49HF010 (some erroneous datasheets say 0x87), AT49BV010, AT49HBV010, AT49HLV010 */
David Borgf5a30f62012-04-15 13:16:32 +0000204#define ATMEL_AT49F020 0x0B
205#define ATMEL_AT49F040 0x13
Andrew Morgan8dd97f92012-08-13 23:43:46 +0000206#define ATMEL_AT49F080 0x23
207#define ATMEL_AT49F080T 0x27
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000208
Joshua Roysf1324e02010-09-16 00:51:51 +0000209/* Bright Microelectronics has the same manufacturer ID as Hyundai... */
210#define BRIGHT_ID 0xAD /* Bright Microelectronics */
211#define BRIGHT_BM29F040 0x40
212#define BRIGHT_BM29F400B 0xAB
213#define BRIGHT_BM29F400T 0xAD
214
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000215#define CATALYST_ID 0x31 /* Catalyst */
Andrew Morganca081462011-09-13 22:05:44 +0000216#define CATALYST_CAT28F512 0xB8
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000217
Stefan Tauner352e50b2013-02-22 15:58:45 +0000218#define ESMT_ID 0x8C /* Elite Semiconductor Memory Technology (ESMT) / EFST Elite Flash Storage */
219#define ESMT_F25L008A 0x2014
Stefan Tauner85f09f72014-05-27 21:27:14 +0000220#define ESMT_F25L32PA 0x2016
Stefan Tauner352e50b2013-02-22 15:58:45 +0000221#define ESMT_F25D08QA 0x2534
Stefan Tauner0554ca52013-07-25 22:54:25 +0000222#define ESMT_F25L16QA2S 0x4015
223#define ESMT_F25L32QA 0x4016
224#define ESMT_F25L32QA2S 0x4116
225#define ESMT_F25L64QA 0x4117
226#define ESMT_F25L128QA 0x4118
Stefan Tauner352e50b2013-02-22 15:58:45 +0000227#define ESMT_F49B002UA 0x00
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000228
229/*
230 * EN25 chips are SPI, first byte of device ID is memory type,
231 * second byte of device ID is log(bitsize)-9.
232 * Vendor and device ID of EN29 series are both prefixed with 0x7F, which
233 * is the continuation code for IDs in bank 2.
234 * Vendor ID of EN25 series is NOT prefixed with 0x7F, this results in
235 * a collision with Mitsubishi. Mitsubishi once manufactured flash chips.
236 * Let's hope they are not manufacturing SPI flash chips as well.
237 */
238#define EON_ID 0x7F1C /* EON Silicon Devices */
239#define EON_ID_NOPREFIX 0x1C /* EON, missing 0x7F prefix */
Stefan Taunerb175af52015-01-24 15:06:27 +0000240#define EON_EN25B05 0x2010 /* Same as EN25P05, can be distinguished by RES/REMS: */
241#define EON_EN25P05 0x05
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000242#define EON_EN25B05T 0x25
243#define EON_EN25B05B 0x95
Stefan Taunerb175af52015-01-24 15:06:27 +0000244#define EON_EN25B10 0x2011 /* Same as EN25P10, can be distinguished by RES/REMS: */
245#define EON_EN25P10 0x10
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000246#define EON_EN25B10T 0x40
247#define EON_EN25B10B 0x30
Stefan Taunerb175af52015-01-24 15:06:27 +0000248#define EON_EN25B20 0x2012 /* Same as EN25P20, can be distinguished by RES/REMS: */
249#define EON_EN25P20 0x11
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000250#define EON_EN25B20T 0x41
251#define EON_EN25B20B 0x31
Stefan Taunerb175af52015-01-24 15:06:27 +0000252#define EON_EN25B40 0x2013 /* Same as EN25P40, can be distinguished by RES/REMS: */
253#define EON_EN25P40 0x12
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000254#define EON_EN25B40T 0x42
255#define EON_EN25B40B 0x32
Stefan Taunerb175af52015-01-24 15:06:27 +0000256#define EON_EN25B80 0x2014 /* Same as EN25P80, can be distinguished by RES/REMS: */
257#define EON_EN25P80 0x13
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000258#define EON_EN25B80T 0x43
259#define EON_EN25B80B 0x33
Stefan Taunerb175af52015-01-24 15:06:27 +0000260#define EON_EN25B16 0x2015 /* Same as EN25P16, can be distinguished by RES/REMS: */
261#define EON_EN25P16 0x14
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000262#define EON_EN25B16T 0x44
263#define EON_EN25B16B 0x34
Stefan Taunerb175af52015-01-24 15:06:27 +0000264#define EON_EN25B32 0x2016 /* Same as EN25P32, can be distinguished by RES/REMS: */
265#define EON_EN25P32 0x15
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000266#define EON_EN25B32T 0x45
267#define EON_EN25B32B 0x35
Stefan Taunerb175af52015-01-24 15:06:27 +0000268#define EON_EN25B64 0x2017 /* Same as EN25P64, can be distinguished by RES/REMS: */
269#define EON_EN25P64 0x16
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000270#define EON_EN25B64T 0x46
271#define EON_EN25B64B 0x36
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000272#define EON_EN25F05 0x3110
273#define EON_EN25F10 0x3111
274#define EON_EN25F20 0x3112
275#define EON_EN25F40 0x3113
276#define EON_EN25F80 0x3114
277#define EON_EN25F16 0x3115
278#define EON_EN25F32 0x3116
Stefan Tauner6697f712014-08-06 15:09:15 +0000279#define EON_EN25F64 0x3117
David Hendricks6d715302011-07-24 22:21:57 +0000280#define EON_EN25Q40 0x3013
281#define EON_EN25Q80 0x3014
282#define EON_EN25Q16 0x3015 /* Same as EN25D16 */
283#define EON_EN25Q32 0x3016 /* Same as EN25Q32A and EN25Q32B */
284#define EON_EN25Q64 0x3017
285#define EON_EN25Q128 0x3018
286#define EON_EN25QH16 0x7015
Stefan Tauner2cef9162012-05-14 01:51:46 +0000287#define EON_EN25QH32 0x7016
Nikolay Nikolaevc08542b2013-06-28 21:29:14 +0000288#define EON_EN25QH64 0x7017
289#define EON_EN25QH128 0x7018
290#define EON_EN25QH256 0x7019
Nikolay Nikolaevd0e3ea12013-06-28 21:29:08 +0000291#define EON_EN25S10 0x3811
292#define EON_EN25S20 0x3812
293#define EON_EN25S40 0x3813
294#define EON_EN25S80 0x3814
295#define EON_EN25S16 0x3815
296#define EON_EN25S32 0x3816
297#define EON_EN25S64 0x3817
Stefan Tauner0554ca52013-07-25 22:54:25 +0000298#define EON_EN25T80 0x5114
299#define EON_EN25T16 0x5115
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000300#define EON_EN29F512 0x7F21
301#define EON_EN29F010 0x20
302#define EON_EN29F040A 0x7F04
303#define EON_EN29LV010 0x7F6E
Denis 'GNUtoo' Cariklib5f9d5c2014-12-07 21:57:53 +0000304#define EON_EN29LV040 0x4F /* Same as EN29LV040A */
Rudolf Marek47eff6b2012-04-14 22:51:40 +0000305#define EON_EN29LV640B 0xCB
Stefan Tauner5c316f92015-02-08 21:57:52 +0000306#define EON_EN29LV640T 0xC9
307#define EON_EN29LV640U 0x7E
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000308#define EON_EN29F002T 0x7F92 /* Same as EN29F002A */
309#define EON_EN29F002B 0x7F97 /* Same as EN29F002AN */
Stefan Tauner03a9c3c2014-08-03 14:15:14 +0000310#define EON_EN29GL064HL 0x7E0C01 /* Uniform Sectors, WP protects Top OR Bottom sector */
311#define EON_EN29GL064T 0x7E1001 /* Same ID as EN29GL064AT */
312#define EON_EN29GL064B 0x7E1000 /* Same ID as EN29GL064AB */
313#define EON_EN29GL128HL 0x7F2101 /* Uniform Sectors, WP protects Top OR Bottom sector */
314#define EON_EN29GL256HL 0x7F2201 /* Uniform Sectors, WP protects Top OR Bottom sector */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000315
Stefan Tauner0554ca52013-07-25 22:54:25 +0000316#define EXCEL_ID 0x7F7F7F7F4A /* Excel Semiconductor Inc. (ESI) resides in bank 5 */
317#define EXCEL_ID_NOPREFIX 0x4A /* ESI, missing 0x7F prefix */
318#define EXCEL_ES25P40 0x2013
319#define EXCEL_ES25P80 0x2014
320#define EXCEL_ES25P16 0x2015
321
Stefan Tauner352e50b2013-02-22 15:58:45 +0000322#define FIDELIX_ID 0xF8 /* Fidelix */
323#define FIDELIX_FM25M16 0x4215
324#define FIDELIX_FM25M32 0x4216
325#define FIDELIX_FM25M64 0x4217
326#define FIDELIX_FM25Q08 0x3214
327#define FIDELIX_FM25Q16 0x3215 /* Same as FM25S16 (which is apparently single I/O only) */
328#define FIDELIX_FM25Q32 0x3216
329#define FIDELIX_FM25Q64 0x3217
330
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000331#define FUJITSU_ID 0x04 /* Fujitsu */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000332#define FUJITSU_MBM29DL400BC 0x0F
333#define FUJITSU_MBM29DL400TC 0x0C
334#define FUJITSU_MBM29DL800BA 0xCB
335#define FUJITSU_MBM29DL800TA 0x4A
336#define FUJITSU_MBM29F002BC 0x34
337#define FUJITSU_MBM29F002TC 0xB0
338#define FUJITSU_MBM29F004BC 0x7B
339#define FUJITSU_MBM29F004TC 0x77
340#define FUJITSU_MBM29F040C 0xA4
341#define FUJITSU_MBM29F080A 0xD5
342#define FUJITSU_MBM29F200BC 0x57
343#define FUJITSU_MBM29F200TC 0x51
344#define FUJITSU_MBM29F400BC 0xAB
345#define FUJITSU_MBM29F400TC 0x23
346#define FUJITSU_MBM29F800BA 0x58
347#define FUJITSU_MBM29F800TA 0xD6
348#define FUJITSU_MBM29LV002BC 0xC2
349#define FUJITSU_MBM29LV002TC 0x40
350#define FUJITSU_MBM29LV004BC 0xB6
351#define FUJITSU_MBM29LV004TC 0xB5
352#define FUJITSU_MBM29LV008BA 0x37
353#define FUJITSU_MBM29LV008TA 0x3E
354#define FUJITSU_MBM29LV080A 0x38
355#define FUJITSU_MBM29LV200BC 0xBF
356#define FUJITSU_MBM29LV200TC 0x3B
357#define FUJITSU_MBM29LV400BC 0xBA
358#define FUJITSU_MBM29LV400TC 0xB9
359#define FUJITSU_MBM29LV800BA 0x5B /* Same as MBM29LV800BE */
360#define FUJITSU_MBM29LV800TA 0xDA /* Same as MBM29LV800TE */
Stefan Tauner6db8bad2013-08-25 13:31:43 +0000361#define FUJITSU_MBM29LV160BE 0x49 /* 16 b mode 0x2249 */
362#define FUJITSU_MBM29LV160TE 0xC4 /* 16 b mode 0x22C4 */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000363
Justin Chevrier1525b2a2012-04-14 21:59:23 +0000364#define GIGADEVICE_ID 0xC8 /* GigaDevice */
Nikolay Nikolaev3f3390b2013-06-28 21:28:56 +0000365#define GIGADEVICE_GD25T80 0x3114
366#define GIGADEVICE_GD25Q512 0x4010
367#define GIGADEVICE_GD25Q10 0x4011
368#define GIGADEVICE_GD25Q20 0x4012 /* Same as GD25QB */
369#define GIGADEVICE_GD25Q40 0x4013 /* Same as GD25QB */
Stefan Tauner352e50b2013-02-22 15:58:45 +0000370#define GIGADEVICE_GD25Q80 0x4014 /* Same as GD25Q80B (which has OTP) */
371#define GIGADEVICE_GD25Q16 0x4015 /* Same as GD25Q16B (which has OTP) */
372#define GIGADEVICE_GD25Q32 0x4016 /* Same as GD25Q32B */
373#define GIGADEVICE_GD25Q64 0x4017 /* Same as GD25Q64B */
Hatim Kanchwalae0c7abf2016-02-21 00:21:11 +0000374#define GIGADEVICE_GD25Q128 0x4018 /* GD25Q128B and GD25Q128C only, can be distinguished by SFDP */
Hatim Kanchwalad0595352016-03-06 14:33:49 +0000375#define GIGADEVICE_GD25VQ21B 0x4212
376#define GIGADEVICE_GD25VQ41B 0x4213 /* Same as GD25VQ40C, can be distinguished by SFDP */
377#define GIGADEVICE_GD25VQ80C 0x4214
378#define GIGADEVICE_GD25VQ16C 0x4215
Nikolay Nikolaev3f3390b2013-06-28 21:28:56 +0000379#define GIGADEVICE_GD25LQ40 0x6013
380#define GIGADEVICE_GD25LQ80 0x6014
381#define GIGADEVICE_GD25LQ16 0x6015
Bryan Freed5bfef9d2012-09-17 00:05:44 +0000382#define GIGADEVICE_GD25LQ32 0x6016
Nikolay Nikolaev3f3390b2013-06-28 21:28:56 +0000383#define GIGADEVICE_GD25LQ64 0x6017 /* Same as GD25LQ64B (which is faster) */
Alan Green188127e2019-08-06 16:10:34 +1000384#define GIGADEVICE_GD25LQ128CD 0x6018
Stefan Tauner03a9c3c2014-08-03 14:15:14 +0000385#define GIGADEVICE_GD29GL064CAB 0x7E0601
Justin Chevrier1525b2a2012-04-14 21:59:23 +0000386
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000387#define HYUNDAI_ID 0xAD /* Hyundai */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000388#define HYUNDAI_HY29F400T 0x23 /* Same as HY29F400AT */
389#define HYUNDAI_HY29F800B 0x58 /* Same as HY29F800AB */
390#define HYUNDAI_HY29LV800B 0x5B
391#define HYUNDAI_HY29F040A 0xA4
392#define HYUNDAI_HY29F400B 0xAB /* Same as HY29F400AB */
393#define HYUNDAI_HY29F002B 0x34
394#define HYUNDAI_HY29F002T 0xB0
395#define HYUNDAI_HY29LV400T 0xB9
396#define HYUNDAI_HY29LV400B 0xBA
397#define HYUNDAI_HY29F080 0xD5
398#define HYUNDAI_HY29F800T 0xD6 /* Same as HY29F800AT */
399#define HYUNDAI_HY29LV800T 0xDA
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000400
401#define IMT_ID 0x7F1F /* Integrated Memory Technologies */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000402#define IMT_IM29F004B 0xAE
403#define IMT_IM29F004T 0xAF
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000404
405#define INTEL_ID 0x89 /* Intel */
Mattias Mattssoncbee4a72010-10-05 20:28:36 +0000406#define INTEL_28F320J5 0x14
407#define INTEL_28F640J5 0x15
408#define INTEL_28F320J3 0x16
409#define INTEL_28F640J3 0x17
410#define INTEL_28F128J3 0x18
411#define INTEL_28F256J3 0x1D
412#define INTEL_28F400T 0x70 /* 28F400BV/BX/CE/CV-T */
413#define INTEL_28F400B 0x71 /* 28F400BV/BX/CE/CV-B */
414#define INTEL_28F200T 0x74 /* 28F200BL/BV/BX/CV-T */
415#define INTEL_28F200B 0x75 /* 28F200BL/BV/BX/CV-B */
416#define INTEL_28F004T 0x78 /* 28F004B5/BE/BV/BX-T */
417#define INTEL_28F004B 0x79 /* 28F004B5/BE/BV/BX-B */
418#define INTEL_28F002T 0x7C /* 28F002BC/BL/BV/BX-T */
419#define INTEL_28F002B 0x7D /* 28F002BL/BV/BX-B */
420#define INTEL_28F001T 0x94 /* 28F001BN/BX-T */
421#define INTEL_28F001B 0x95 /* 28F001BN/BX-B */
422#define INTEL_28F008T 0x98 /* 28F008BE/BV-T */
423#define INTEL_28F008B 0x99 /* 28F008BE/BV-B */
424#define INTEL_28F800T 0x9C /* 28F800B5/BV/CE/CV-T */
425#define INTEL_28F800B 0x9D /* 28F800B5/BV/CE/CV-B */
426#define INTEL_28F016SV 0xA0 /* 28F016SA/SV */
427#define INTEL_28F008SA 0xA2
428#define INTEL_28F008S3 0xA6 /* 28F008S3/S5/SC */
429#define INTEL_28F004S3 0xA7 /* 28F008S3/S5/SC */
430#define INTEL_28F016XS 0xA8
431#define INTEL_28F016S3 0xAA /* 28F016S3/S5/SC */
432#define INTEL_82802AC 0xAC
433#define INTEL_82802AB 0xAD
434#define INTEL_28F010 0xB4
435#define INTEL_28F512 0xB8
436#define INTEL_28F256A 0xB9
437#define INTEL_28F020 0xBD
438#define INTEL_28F016B3T 0xD0 /* 28F016B3-T */
439#define INTEL_28F016B3B 0xD1 /* 28F016B3-B */
440#define INTEL_28F008B3T 0xD2 /* 28F008B3-T */
441#define INTEL_28F008B3B 0xD3 /* 28F008B3-B */
442#define INTEL_28F004B3T 0xD4 /* 28F004B3-T */
443#define INTEL_28F004B3B 0xD5 /* 28F004B3-B */
Stefan Tauner54aaa4a2012-12-29 15:04:12 +0000444#define INTEL_25F160S33B8 0x8911 /* Same as 25F016S33B8 */
445#define INTEL_25F320S33B8 0x8912
446#define INTEL_25F640S33B8 0x8913
447#define INTEL_25F160S33T8 0x8915 /* Same as 25F016S33T8 */
448#define INTEL_25F320S33T8 0x8916
449#define INTEL_25F640S33T8 0x8917
Mattias Mattssoncbee4a72010-10-05 20:28:36 +0000450
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000451#define SHARP_LH28F008SA 0xA2 /* Sharp chip, Intel Vendor ID */
452#define SHARP_LH28F008SC 0xA6 /* Sharp chip, Intel Vendor ID */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000453
Stefan Tauner03a9c3c2014-08-03 14:15:14 +0000454#define ISSI_ID 0xD5 /* ISSI Integrated Silicon Solutions, see also PMC. */
David Hendricks3083ed92017-05-02 13:25:56 -0700455#define ISSI_ID_SPI 0x9D /* ISSI ID used for SPI flash, see also PMC_ID_NOPREFIX */
Angel Pons2ef47f32018-09-30 16:47:30 +0200456#define ISSI_IS25LP064 0x6017
David Hendricks3083ed92017-05-02 13:25:56 -0700457#define ISSI_IS25LP128 0x6018
David Hendricks61818dc2018-10-28 01:02:21 +0000458#define ISSI_IS25LP256 0x6019
Nico Huberb27b8d12018-10-02 20:46:21 +0200459#define ISSI_IS25WP032 0x7016
460#define ISSI_IS25WP064 0x7017
David Hendricks3083ed92017-05-02 13:25:56 -0700461#define ISSI_IS25WP128 0x7018
David Hendricks61818dc2018-10-28 01:02:21 +0000462#define ISSI_IS25WP256 0x7019
Stefan Tauner03a9c3c2014-08-03 14:15:14 +0000463#define ISSI_PMC_IS29GL032B 0xF9
464#define ISSI_PMC_IS29GL032T 0xF6
465#define ISSI_PMC_IS29GL064B 0x7E1000
466#define ISSI_PMC_IS29GL064T 0x7E1001
467#define ISSI_PMC_IS29GL064HL 0x7E0C01
468#define ISSI_PMC_IS29GL128HL 0x7E2101
469#define ISSI_PMC_IS29GL256HL 0x7E2201
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000470
Michael Coppola4e7f36e2014-05-03 23:01:18 +0000471#define MACRONIX_ID 0xC2 /* Macronix (MX) */
472/* Mask ROMs */
Michael Coppola583ea322014-08-20 18:56:35 +0000473#define MACRONIX_MX23L1654 0x0515
Michael Coppola4e7f36e2014-05-03 23:01:18 +0000474#define MACRONIX_MX23L3254 0x0516
Michael Coppola583ea322014-08-20 18:56:35 +0000475#define MACRONIX_MX23L6454 0x0517
476#define MACRONIX_MX23L12854 0x0518
Michael Coppola4e7f36e2014-05-03 23:01:18 +0000477/* MX25 chips are SPI, first byte of device ID is memory type,
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000478 * second byte of device ID is log(bitsize)-9.
479 * Generalplus SPI chips seem to be compatible with Macronix
Michael Coppola4e7f36e2014-05-03 23:01:18 +0000480 * and use the same set of IDs. */
Stefan Taunerf656e802013-02-02 15:35:44 +0000481#define MACRONIX_MX25L512 0x2010 /* Same as MX25L512E, MX25V512, MX25V512C */
482#define MACRONIX_MX25L1005 0x2011 /* Same as MX25L1005C, MX25L1006E */
Stefan Tauner5c316f92015-02-08 21:57:52 +0000483#define MACRONIX_MX25L2005 0x2012 /* Same as MX25L2005C, MX25L2006E */
484#define MACRONIX_MX25L4005 0x2013 /* Same as MX25L4005A, MX25L4005C, MX25L4006E */
Stefan Tauner74dc73f2015-03-01 22:04:38 +0000485#define MACRONIX_MX25L8005 0x2014 /* Same as MX25V8005, MX25L8006E, MX25L8008E, FIXME: MX25L8073E (4k 0x20) */
486#define MACRONIX_MX25L1605 0x2015 /* MX25L1605 (64k 0x20); MX25L1605A/MX25L1606E/MX25L1608E (4k 0x20, 64k 0x52); MX25L1605D/MX25L1608D/MX25L1673E (4k 0x20) */
487#define MACRONIX_MX25L3205 0x2016 /* MX25L3205, MX25L3205A (64k 0x20); MX25L3205D/MX25L3208D (4k 0x20); MX25L3206E/MX25L3208E (4k 0x20, 64k 0x52); MX25L3273E (4k 0x20, 32k 0x52) */
488#define MACRONIX_MX25L6405 0x2017 /* MX25L6405, MX25L6405D (64k 0x20); MX25L6406E/MX25L6408E (4k 0x20); MX25L6436E/MX25L6445E/MX25L6465E/MX25L6473E (4k 0x20, 32k 0x52) */
Stefan Tauner5c316f92015-02-08 21:57:52 +0000489#define MACRONIX_MX25L12805D 0x2018 /* MX25L12805D (no 32k); MX25L12865E, MX25L12835F, MX25L12845E (32k 0x52) */
Stefan Tauner0554ca52013-07-25 22:54:25 +0000490#define MACRONIX_MX25L25635F 0x2019 /* Same as MX25L25639F, but the latter seems to not support REMS */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000491#define MACRONIX_MX25L1635D 0x2415
492#define MACRONIX_MX25L1635E 0x2515 /* MX25L1635{E} */
Hemanth Guruva Reddya136d422019-07-11 11:08:27 +0200493#define MACRONIX_MX66L51235F 0x201a /* MX66L51235F, MX25L51245G */
Angel Ponsf112e242018-09-30 20:14:17 +0200494#define MACRONIX_MX25U8032E 0x2534
Stefan Taunerf656e802013-02-02 15:35:44 +0000495#define MACRONIX_MX25U1635E 0x2535
496#define MACRONIX_MX25U3235E 0x2536 /* Same as MX25U6435F */
497#define MACRONIX_MX25U6435E 0x2537 /* Same as MX25U6435F */
Stefan Tauner0554ca52013-07-25 22:54:25 +0000498#define MACRONIX_MX25U12835E 0x2538 /* Same as MX25U12835F */
499#define MACRONIX_MX25U25635F 0x2539
Daniel Thompsoncadd4202018-06-04 13:52:22 +0100500#define MACRONIX_MX25U51245G 0x253a
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000501#define MACRONIX_MX25L3235D 0x5E16 /* MX25L3225D/MX25L3235D/MX25L3237D */
Stefan Tauner40bc96f2015-01-10 09:33:14 +0000502#define MACRONIX_MX25L6495F 0x9517
Michael Coppola4e7f36e2014-05-03 23:01:18 +0000503
Nathan Rennie-Waldock5a7f9422018-08-10 15:35:23 +0100504#define MACRONIX_MX25R6435F 0x2817
505
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000506#define MACRONIX_MX29F001B 0x19
507#define MACRONIX_MX29F001T 0x18
Sylvain "ythier" Hitier3093f8f2011-09-03 11:22:27 +0000508#define MACRONIX_MX29F002B 0x34 /* Same as MX29F002NB; N has reset pin n/c. */
509#define MACRONIX_MX29F002T 0xB0 /* Same as MX29F002NT; N has reset pin n/c. */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000510#define MACRONIX_MX29F004B 0x46
511#define MACRONIX_MX29F004T 0x45
Daniele Forsi6a18a932014-07-13 14:53:45 +0000512#define MACRONIX_MX29F022B 0x37 /* Same as MX29F022NB */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000513#define MACRONIX_MX29F022T 0x36 /* Same as MX29F022NT */
514#define MACRONIX_MX29F040 0xA4 /* Same as MX29F040C */
515#define MACRONIX_MX29F080 0xD5
516#define MACRONIX_MX29F200B 0x57 /* Same as MX29F200CB */
517#define MACRONIX_MX29F200T 0x51 /* Same as MX29F200CT */
518#define MACRONIX_MX29F400B 0xAB /* Same as MX29F400CB */
519#define MACRONIX_MX29F400T 0x23 /* Same as MX29F400CT */
520#define MACRONIX_MX29F800B 0x58
521#define MACRONIX_MX29F800T 0xD6
Stefan Tauner03a9c3c2014-08-03 14:15:14 +0000522#define MACRONIX_MX29GL320EB 0x7E1A00
523#define MACRONIX_MX29GL320ET 0x7E1A01
524#define MACRONIX_MX29GL320EHL 0x7E1D00
525#define MACRONIX_MX29GL640EB 0x7E1000
526#define MACRONIX_MX29GL640ET 0x7E1001
527#define MACRONIX_MX29GL640EHL 0x7E0C01
528#define MACRONIX_MX29GL128F 0x7E2101 /* Same as MX29GL128E */
529#define MACRONIX_MX29GL256F 0x7E2201 /* Same as MX29GL256E */
530#define MACRONIX_MX29GL512F 0x7E2301
531#define MACRONIX_MX68GL1G0F 0x7E2801
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000532#define MACRONIX_MX29LV002CB 0x5A
533#define MACRONIX_MX29LV002CT 0x59
534#define MACRONIX_MX29LV004B 0xB6 /* Same as MX29LV004CB */
535#define MACRONIX_MX29LV004T 0xB5 /* Same as MX29LV004CT */
536#define MACRONIX_MX29LV008B 0x37 /* Same as MX29LV008CB */
537#define MACRONIX_MX29LV008T 0x3E /* Same as MX29LV008CT */
538#define MACRONIX_MX29LV040 0x4F /* Same as MX29LV040C */
539#define MACRONIX_MX29LV081 0x38
540#define MACRONIX_MX29LV128DB 0x7A
541#define MACRONIX_MX29LV128DT 0x7E
542#define MACRONIX_MX29LV160DB 0x49 /* Same as MX29LV161DB/MX29LV160CB */
543#define MACRONIX_MX29LV160DT 0xC4 /* Same as MX29LV161DT/MX29LV160CT */
544#define MACRONIX_MX29LV320DB 0xA8 /* Same as MX29LV321DB */
545#define MACRONIX_MX29LV320DT 0xA7 /* Same as MX29LV321DT */
546#define MACRONIX_MX29LV400B 0xBA /* Same as MX29LV400CB */
547#define MACRONIX_MX29LV400T 0xB9 /* Same as MX29LV400CT */
548#define MACRONIX_MX29LV640DB 0xCB /* Same as MX29LV640EB */
549#define MACRONIX_MX29LV640DT 0xC9 /* Same as MX29LV640ET */
550#define MACRONIX_MX29LV800B 0x5B /* Same as MX29LV800CB */
551#define MACRONIX_MX29LV800T 0xDA /* Same as MX29LV800CT */
552#define MACRONIX_MX29SL402CB 0xF1
553#define MACRONIX_MX29SL402CT 0x70
554#define MACRONIX_MX29SL800CB 0x6B /* Same as MX29SL802CB */
555#define MACRONIX_MX29SL800CT 0xEA /* Same as MX29SL802CT */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000556
Stefan Taunerb6b00e92013-06-28 21:28:43 +0000557/* Nantronics Semiconductors is listed in JEP106AJ in bank 7, so it should have 6 continuation codes in front
558 * of the manufacturer ID of 0xD5. http://www.nantronicssemi.com */
559#define NANTRONICS_ID 0x7F7F7F7F7F7FD5 /* Nantronics */
560#define NANTRONICS_ID_NOPREFIX 0xD5 /* Nantronics, missing prefix */
561#define NANTRONICS_N25S10 0x3011
562#define NANTRONICS_N25S20 0x3012
563#define NANTRONICS_N25S40 0x3013
564#define NANTRONICS_N25S80 0x3014
565#define NANTRONICS_N25S16 0x3015
566
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000567/*
568 * Programmable Micro Corp is listed in JEP106W in bank 2, so it should
569 * have a 0x7F continuation code prefix.
Stefan Tauner03a9c3c2014-08-03 14:15:14 +0000570 * Apparently PMC was renamed to "Chingis Technology Corporation" http://www.chingistek.com which is now a
571 * subsidiary of ISSI. They continue to use the PMC manufacturer ID (instead of ISSI's) nevertheless, even for
572 * new chips with IS* model numbers.
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000573 */
574#define PMC_ID 0x7F9D /* PMC */
575#define PMC_ID_NOPREFIX 0x9D /* PMC, missing 0x7F prefix */
Stefan Tauner3f5e35d2013-04-19 01:58:33 +0000576#define PMC_PM25LD256C 0x2F
577#define PMC_PM25LD512 0x20 /* Same as Pm25LD512C, but the latter has more locking options. */
578#define PMC_PM25LD010 0x21 /* Same as Pm25LD010C, but the latter has more locking options. */
579#define PMC_PM25LD020 0x22 /* Same as Pm25LD020C, but the latter has more locking options. */
Steven Honeyman81a8fb72015-06-02 22:32:24 +0000580#define PMC_PM25LQ020 0x42
581#define PMC_PM25LQ040 0x43
582#define PMC_PM25LQ080 0x44
583#define PMC_PM25LQ016 0x45
584#define PMC_PM25LQ032C 0x46
Stefan Tauner3f5e35d2013-04-19 01:58:33 +0000585#define PMC_PM25LV512 0x7B /* Same as Pm25LV512A */
586#define PMC_PM25LV010 0x7C /* Same as Pm25LV010A, but the former does not support RDID but RES3 only. */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000587#define PMC_PM25LV020 0x7D
Stefan Taunerf4451612013-04-19 01:59:15 +0000588#define PMC_PM25LV040 0x7E /* Same as PM25LD040(C), but the latter supports more features. */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000589#define PMC_PM25LV080B 0x13
590#define PMC_PM25LV016B 0x14
591#define PMC_PM29F002T 0x1D
592#define PMC_PM29F002B 0x2D
Stefan Tauner352e50b2013-02-22 15:58:45 +0000593#define PMC_PM39LV512 0x1B /* Same as IS39LV512 */
594#define PMC_PM39F010 0x1C /* Same as Pm39LV010, IS39LV010 */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000595#define PMC_PM39LV020 0x3D
Stefan Tauner352e50b2013-02-22 15:58:45 +0000596#define PMC_PM39LV040 0x3E /* Same as IS39LV040 */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000597#define PMC_PM39F020 0x4D
598#define PMC_PM39F040 0x4E
599#define PMC_PM49FL002 0x6D
600#define PMC_PM49FL004 0x6E
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000601
Elyes HAOUAS124ef382018-03-27 12:15:09 +0200602/*
Sean Nelson118e1d62009-11-24 02:08:11 +0000603 * The Sanyo chip found so far uses SPI, first byte is manufacture code,
604 * second byte is the device code,
605 * third byte is a dummy byte.
606 */
Stefan Tauner6697f712014-08-06 15:09:15 +0000607#define SANYO_ID 0x62 /* Sanyo */
Sean Nelson118e1d62009-11-24 02:08:11 +0000608#define SANYO_LE25FW203A 0x1600
Nikolay Nikolaev384de8e2013-06-28 21:28:49 +0000609#define SANYO_LE25FW403A 0x1100
Stefan Taunera60d4082014-06-04 16:17:03 +0000610#define SANYO_LE25FW106 0x15
Nikolay Nikolaev384de8e2013-06-28 21:28:49 +0000611#define SANYO_LE25FW406 0x07 /* RES2 */
612#define SANYO_LE25FW418A 0x10 /* RES2 and some weird 1 byte RDID variant */
Stefan Tauner33491b82014-05-18 21:36:04 +0000613#define SANYO_LE25FW406A 0x1A /* RES2, no datasheet */
Angel Ponsf2cd3252018-09-30 19:03:45 +0200614#define SANYO_LE25FU106B 0x1D
615#define SANYO_LE25FU206 0x44
616#define SANYO_LE25FU206A 0x0612
Jurij Mundaa1e53742014-05-14 13:19:50 +0000617#define SANYO_LE25FU406B 0x1E /* LE25FW418A without HD_READ mode option variant */
Stefan Tauner2f055df2015-12-25 22:13:15 +0000618#define SANYO_LE25FU406C 0x0613 /* Also known as LE25U40CMC apparently */
Nikolay Nikolaev384de8e2013-06-28 21:28:49 +0000619#define SANYO_LE25FW806 0x26 /* RES2 and some weird 1 byte RDID variant */
620#define SANYO_LE25FW808 0x20 /* RES2 and some weird 1 byte RDID variant */
Sean Nelson118e1d62009-11-24 02:08:11 +0000621
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000622#define SHARP_ID 0xB0 /* Sharp */
Stefan Tauner352e50b2013-02-22 15:58:45 +0000623#define SHARP_LH28F008BJ__PT 0xEC
624#define SHARP_LH28F008BJ__PB 0xED
625#define SHARP_LH28F800BV__BTL 0x4B
626#define SHARP_LH28F800BV__BV 0x4D
627#define SHARP_LH28F800BV__TV 0x4C
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000628#define SHARP_LHF00L02 0xC9 /* Same as LHF00L06/LHF00L07 */
629#define SHARP_LHF00L04 0xCF /* Same as LHF00L03/LHF00L05 */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000630
Stefan Tauner03a9c3c2014-08-03 14:15:14 +0000631/* Spansion was previously a joint venture of AMD and Fujitsu. */
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000632#define SPANSION_ID 0x01 /* Spansion, same ID as AMD */
Stefan Tauner03a9c3c2014-08-03 14:15:14 +0000633/* S25 chips are SPI. The first device ID byte is memory type and
634 * the second device ID byte is memory capacity. */
Rudy Hostf4e57772010-11-29 00:37:49 +0000635#define SPANSION_S25FL004A 0x0212
Michael Karcher23ff4602010-01-12 23:29:30 +0000636#define SPANSION_S25FL008A 0x0213
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000637#define SPANSION_S25FL016A 0x0214
Stefan Taunere34e3e82013-01-01 00:06:51 +0000638#define SPANSION_S25FL032A 0x0215 /* Same as S25FL032P, but the latter supports EDI and CFI */
639#define SPANSION_S25FL064A 0x0216 /* Same as S25FL064P, but the latter supports EDI and CFI */
Jernej Škrabece814a9b2014-12-12 00:32:03 +0000640#define SPANSION_S25FL128 0x2018 /* Same ID for various S25FL127S, S25FL128P, S25FL128S and S25FL129P (including dual-die S70FL256P) variants (EDI supported) */
Nikolay Nikolaevc80c4a32013-06-28 21:29:44 +0000641#define SPANSION_S25FL256 0x0219
642#define SPANSION_S25FL512 0x0220
Nikolay Nikolaev0ec2f7e2013-06-28 21:29:36 +0000643#define SPANSION_S25FL204 0x4013
644#define SPANSION_S25FL208 0x4014
645#define SPANSION_S25FL216 0x4015 /* Same as S25FL216K, but the latter supports OTP, 3 status regs, quad I/O, SFDP etc. */
Nikolay Martynov598968a2014-05-04 21:44:13 +0000646#define SPANSION_S25FL132K 0x4016
647#define SPANSION_S25FL164K 0x4017
648
Stefan Tauner03a9c3c2014-08-03 14:15:14 +0000649/* Spansion 29GL families got a suffix indicating the process technology but share the same 3-Byte IDs. They can
650 * however be differentiated by CFI byte 45h. Some versions exist which have special top or bottom boot sectors
651 * and various WP configurations (not heeded in the table below).
652 *
653 * Suf. Process Sector Sz Rd Page Wr Page Data Width OTP Sz Min Size Max Size
654 * A 200 nm 64 kB 8 B 32 B x8/x16 256 B 16Mb/ 2MB 64Mb/ 8MB
655 * M 230 nm 64 kB 8 B 32 B x8/x16 256 B 32Mb/ 4MB 256Mb/ 32MB
656 * N* 110 nm 64 kB 16 B 32 B x8/x16 256 B 32Mb/ 4MB 64Mb/ 8MB
657 * N* 110 nm 128 kB 16 B 32 B x8/x16 256 B 128Mb/16MB 256Mb/ 64MB
658 * P 90 nm 128 kB 16 B 64 B x8/x16 256 B 128Mb/16MB 2Gb/256MB
659 * S 65 nm 128 kB 32 B 512 B x8 only 512 B 128Mb/16MB 2Gb/256MB
660 *
661 * For the N series there are two subgroups: the 4 and 8MB devices (S29GL032N, S29GL064N) have 64 kB erase
662 * sectors while the bigger chips got 128 kB sectors.
663 * Each series includes multiple models varying in speedgrade, boot block configurations etc.
664 */
665#define SPANSION_S29GL016_1 0xC4 /* Top Boot Sector, WP protects Top 2 sectors */
666#define SPANSION_S29GL016_2 0x49 /* Bottom Boot Sector, WP protects Bottom 2 sectors */
667/* Same IDs for S29GL032A, S29GL032M, S29GL032N (variations) */
668#define SPANSION_S29GL032_1289 0x7E1D00 /* Uniform Sectors, WP protects Top OR Bottom sector */
669#define SPANSION_S29GL032_3 0x7E1A01 /* Top Boot Sector, WP protects Top 2 sectors */
670#define SPANSION_S29GL032_4 0x7E1A00 /* Bottom Boot Sector, WP protects Bottom 2 sectors */
671/* Same IDs for S29GL064A, S29GL064M, S29GL064N, S29GL064S (variations) */
672#define SPANSION_S29GL064_1289 0x7E0C01 /* Uniform Sectors, WP protects Top OR Bottom sector */
673#define SPANSION_S29GL064_3 0x7E1001 /* Top Boot Sector, WP protects Top 2 sectors */
674#define SPANSION_S29GL064_4 0x7E1000 /* Bottom Boot Sector, WP protects Bottom 2 sectors */
675#define SPANSION_S29GL064_567 0x7E1301 /* x16 only, Uniform Sectors */
676
677#define SPANSION_S29GL128 0x7E2101 /* Same ID for S29GL128M, S29GL128N, S29GL128P, S29GL128S */
678#define SPANSION_S29GL256 0x7E2201 /* Same ID for S29GL256M, S29GL256N, S29GL256P, S29GL256S */
679#define SPANSION_S29GL512 0x7E2301 /* Same ID for S29GL512P, S29GL512S */
680#define SPANSION_S29GL01G 0x7E2801 /* Same ID for S29GL01GP, S29GL01GS */
681#define SPANSION_S70GL02G 0x7E4801 /* Same ID for S70GL02GP, S70GL02GS; based on two S29GL01G dies respectively */
682
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000683/*
684 * SST25 chips are SPI, first byte of device ID is memory type, second
685 * byte of device ID is related to log(bitsize) at least for some chips.
686 */
687#define SST_ID 0xBF /* SST */
Idwer Volleringf3607d12014-05-07 15:25:04 +0000688#define SST_SST25LF020_REMS 0x43 /* REMS or RES opcode */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000689#define SST_SST25WF512 0x2501
690#define SST_SST25WF010 0x2502
691#define SST_SST25WF020 0x2503
692#define SST_SST25WF040 0x2504
Jason Harper43ddef02014-05-04 00:55:24 +0000693#define SST_SST25WF080 0x2505
Ben Gardnerbcf61092015-11-22 02:23:31 +0000694/* There exist some successors to members of the SST25WF family with alphabetic suffixes. Their datasheets show
695 * a 4 byte long response w/o a vendor ID. The first byte is 0x62 that is actually Sanyo's and might be due to
696 * a collaboration in the mid 2000ies between Sanyo and SST. */
697#define SST_SST25WF020A 0x1612
698#define SST_SST25WF040B 0x1613
699#define SST_SST25WF080B 0x1614
Stefan Tauner6697f712014-08-06 15:09:15 +0000700#define SST_SST25VF512_REMS 0x48 /* REMS or RES opcode, same as SST25VF512A */
701#define SST_SST25VF010_REMS 0x49 /* REMS or RES opcode, same as SST25VF010A */
Idwer Volleringf3607d12014-05-07 15:25:04 +0000702#define SST_SST25VF020_REMS 0x43 /* REMS or RES opcode, same as SST25LF020A */
Cory Henderson370f5822013-10-19 23:09:16 +0000703#define SST_SST25VF020B 0x258C
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000704#define SST_SST25VF040_REMS 0x44 /* REMS or RES opcode, same as SST25LF040A */
705#define SST_SST25VF040B 0x258D
706#define SST_SST25VF040B_REMS 0x8D /* REMS or RES opcode */
Sylvain "ythier" Hitier3093f8f2011-09-03 11:22:27 +0000707#define SST_SST25VF080_REMS 0x80 /* REMS or RES opcode, same as SST25LF080A */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000708#define SST_SST25VF080B 0x258E
709#define SST_SST25VF080B_REMS 0x8E /* REMS or RES opcode */
710#define SST_SST25VF016B 0x2541
711#define SST_SST25VF032B 0x254A
712#define SST_SST25VF032B_REMS 0x4A /* REMS or RES opcode */
713#define SST_SST25VF064C 0x254B
714#define SST_SST26VF016 0x2601
715#define SST_SST26VF032 0x2602
Wei Hu25584de2018-04-30 14:02:08 -0700716#define SST_SST26VF016B 0x2641
717#define SST_SST26VF032B 0x2642
Stefan Taunerc2eec2c2014-05-03 21:33:01 +0000718#define SST_SST26VF064B 0x2643
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000719#define SST_SST27SF512 0xA4
720#define SST_SST27SF010 0xA5
721#define SST_SST27SF020 0xA6
722#define SST_SST27VF010 0xA9
723#define SST_SST27VF020 0xAA
724#define SST_SST28SF040 0x04
Stefan Tauner6697f712014-08-06 15:09:15 +0000725#define SST_SST29LE512 0x3D /* Same as SST29VE512 */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000726#define SST_SST29EE512 0x5D
727#define SST_SST29EE010 0x07
728#define SST_SST29LE010 0x08 /* Same as SST29VE010 */
729#define SST_SST29EE020A 0x10 /* Same as SST29EE020 */
730#define SST_SST29LE020 0x12 /* Same as SST29VE020 */
731#define SST_SST29SF020 0x24
732#define SST_SST29VF020 0x25
733#define SST_SST29SF040 0x13
734#define SST_SST29VF040 0x14
735#define SST_SST39SF512 0xB4
736#define SST_SST39SF010 0xB5
737#define SST_SST39SF020 0xB6 /* Same as 39SF020A */
738#define SST_SST39SF040 0xB7
739#define SST_SST39VF512 0xD4
740#define SST_SST39VF010 0xD5
741#define SST_SST39VF020 0xD6 /* Same as 39LF020 */
742#define SST_SST39VF040 0xD7 /* Same as 39LF040 */
743#define SST_SST39VF080 0xD8 /* Same as 39LF080/39VF080/39VF088 */
Stefan Tauner6697f712014-08-06 15:09:15 +0000744#define SST_SST45VF512 0x41 /* REMS, read opcode 0xFF */
745#define SST_SST45LF010 0x42 /* REMS, read opcode 0xFF, 'funny' other opcodes */
746#define SST_SST45VF010 0x45 /* REMS, read opcode 0xFF */
747#define SST_SST45VF020 0x43 /* REMS, read opcode 0xFF */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000748#define SST_SST49LF040B 0x50
749#define SST_SST49LF040 0x51
750#define SST_SST49LF020 0x61
751#define SST_SST49LF020A 0x52
752#define SST_SST49LF030A 0x1C
753#define SST_SST49LF080A 0x5B
754#define SST_SST49LF002A 0x57
755#define SST_SST49LF003A 0x1B
756#define SST_SST49LF004A 0x60 /* Same as 49LF004B */
757#define SST_SST49LF008A 0x5A
758#define SST_SST49LF004C 0x54
759#define SST_SST49LF008C 0x59
760#define SST_SST49LF016C 0x5C
761#define SST_SST49LF160C 0x4C
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000762
763/*
764 * ST25P chips are SPI, first byte of device ID is memory type, second
765 * byte of device ID is related to log(bitsize) at least for some chips.
766 */
Sylvain "ythier" Hitier3093f8f2011-09-03 11:22:27 +0000767#define ST_ID 0x20 /* ST / SGS/Thomson / Numonyx (later acquired by Micron) */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000768#define ST_M25P05A 0x2010
Stefan Tauneraf111e22017-10-08 05:44:10 +0200769#define ST_M25P05_RES 0x05
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000770#define ST_M25P10A 0x2011
Stefan Tauneraf111e22017-10-08 05:44:10 +0200771#define ST_M25P10_RES 0x10
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000772#define ST_M25P20 0x2012
Kyösti Mälkkic54adc52013-03-04 01:20:28 +0000773#define ST_M25P20_RES 0x11
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000774#define ST_M25P40 0x2013
775#define ST_M25P40_RES 0x12
776#define ST_M25P80 0x2014
777#define ST_M25P16 0x2015
778#define ST_M25P32 0x2016
779#define ST_M25P64 0x2017
780#define ST_M25P128 0x2018
Nikolay Nikolaev01dac172013-06-28 21:29:03 +0000781#define ST_M45PE10 0x4011
782#define ST_M45PE20 0x4012
783#define ST_M45PE40 0x4013
784#define ST_M45PE80 0x4014
785#define ST_M45PE16 0x4015
Nikolay Nikolaevb8e212c2013-06-28 21:29:27 +0000786#define ST_M25PX80 0x7114
Carl Worthd1dd72c2011-03-06 18:45:40 +0000787#define ST_M25PX16 0x7115
Jason Shriver4119e9b2010-09-14 13:16:01 +0000788#define ST_M25PX32 0x7116
789#define ST_M25PX64 0x7117
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000790#define ST_M25PE10 0x8011
791#define ST_M25PE20 0x8012
792#define ST_M25PE40 0x8013
793#define ST_M25PE80 0x8014
794#define ST_M25PE16 0x8015
795#define ST_M50FLW040A 0x08
796#define ST_M50FLW040B 0x28
797#define ST_M50FLW080A 0x80
798#define ST_M50FLW080B 0x81
799#define ST_M50FW002 0x29
800#define ST_M50FW040 0x2C
801#define ST_M50FW080 0x2D
802#define ST_M50FW016 0x2E
Stefan Tauner8c4602b2013-09-12 08:29:00 +0000803#define ST_M50LPW080 0x2F
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000804#define ST_M50LPW116 0x30
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000805#define ST_M29F002B 0x34 /* Same as M29F002BB */
806#define ST_M29F002T 0xB0 /* Same as M29F002BT/M29F002NT/M29F002BNT */
807#define ST_M29F040B 0xE2 /* Same as M29F040 */
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000808#define ST_M29F080 0xF1
809#define ST_M29F200BT 0xD3
810#define ST_M29F200BB 0xD4
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000811#define ST_M29F400BT 0xD5 /* Same as M29F400T */
812#define ST_M29F400BB 0xD6 /* Same as M29F400B */
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000813#define ST_M29F800DB 0x58
814#define ST_M29F800DT 0xEC
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000815#define ST_M29W010B 0x23
816#define ST_M29W040B 0xE3
Jeffrey A. Kentba7c9222010-02-01 05:49:46 +0000817#define ST_M29W512B 0x27
Stefan Tauner5c316f92015-02-08 21:57:52 +0000818#define ST_M28W160ECB 0x88CF
819#define ST_M28W160ECT 0x88CE
820#define ST_M28W320FCB 0x88BB
821#define ST_M28W320FCT 0x88BA
822#define ST_M28W640HCB 0x8849
823#define ST_M28W640HCT 0x8848
824#define ST_M29DW127G 0x7E2004
825#define ST_M29W128GH 0x7E2101
826#define ST_M29W128GL 0x7E2100
827#define ST_M29W160EB 0x2249
828#define ST_M29W160ET 0x22C4
829#define ST_M29W256GH 0x7E21xx
830#define ST_M29W256GL 0x7E21xx
831#define ST_M29W320DB 0x88CB
832#define ST_M29W320DT 0x88CA
833#define ST_M29W400FB 0x00EF
834#define ST_M29W400FT 0x00EE
835#define ST_M29W512GH 0x7E2301
836#define ST_M29W640FB 0x22FD
837#define ST_M29W640FT 0x22ED
838#define ST_M29W640GB 0x7E1000
839#define ST_M29W640GH 0x7E0C01
840#define ST_M29W640GL 0x7E0C00
841#define ST_M29W640GT 0x7E1001
842#define ST_M29W800FB 0x225B
843#define ST_M29W800FT 0x22D7
844#define ST_M58BW16FB 0x8839
845#define ST_M58BW16FT 0x883A
846#define ST_M58BW32FB 0x8837
847#define ST_M58BW32FT 0x8838
848#define ST_M58WR016KB 0x8813
849#define ST_M58WR016KT 0x8812
850#define ST_M58WR032KB 0x8815
851#define ST_M58WR032KT 0x8814
852#define ST_M58WR064KB 0x8811
853#define ST_M58WR064KT 0x8810
854#define ST_MT28GU01G___1 0x88B0
855#define ST_MT28GU01G___2 0x88B1
856#define ST_MT28GU256___1 0x8901
857#define ST_MT28GU256___2 0x8904
858#define ST_MT28GU512___1 0x887E
859#define ST_MT28GU512___2 0x8881
Nikolay Nikolaev6f59b0b2013-06-28 21:29:51 +0000860#define ST_N25Q016__1E 0xBB15 /* N25Q016, 1.8V, (uniform sectors expected) */
861#define ST_N25Q032__3E 0xBA16 /* N25Q032, 3.0V, (uniform sectors expected) */
862#define ST_N25Q032__1E 0xBB16 /* N25Q032, 1.8V, (uniform sectors expected) */
863#define ST_N25Q064__3E 0xBA17 /* N25Q064, 3.0V, (uniform sectors expected) */
864#define ST_N25Q064__1E 0xBB17 /* N25Q064, 1.8V, (uniform sectors expected) */
865#define ST_N25Q128__3E 0xBA18 /* N25Q128, 3.0V, (uniform sectors expected) */
866#define ST_N25Q128__1E 0xBB18 /* N25Q128, 1.8V, (uniform sectors expected) */
867#define ST_N25Q256__3E 0xBA19 /* N25Q256, 3.0V, (uniform sectors expected) */
868#define ST_N25Q256__1E 0xBB19 /* N25Q256, 1.8V, (uniform sectors expected) */
869#define ST_N25Q512__3E 0xBA20 /* N25Q512, 3.0V, (uniform sectors expected) */
870#define ST_N25Q512__1E 0xBB20 /* N25Q512, 1.8V, (uniform sectors expected) */
871#define ST_N25Q00A__3E 0xBA21 /* N25Q00A, 3.0V, (uniform sectors expected) */
Stefan Tauner23e10b82016-01-23 16:16:49 +0000872#define ST_NP5Q032 0xDA16 /* Phase-change memory (PCM), 3V */
873#define ST_NP5Q064 0xDA17 /* Phase-change memory (PCM), 3V */
874#define ST_NP5Q128 0xDA18 /* Phase-change memory (PCM), 3V */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000875
Mattias Mattsson4c066502010-07-29 20:01:13 +0000876#define SYNCMOS_MVC_ID 0x40 /* SyncMOS (SM) and Mosel Vitelic Corporation (MVC) */
877#define MVC_V29C51000T 0x00
878#define MVC_V29C51400T 0x13
879#define MVC_V29LC51000 0x20
880#define MVC_V29LC51001 0x60
881#define MVC_V29LC51002 0x82
882#define MVC_V29C51000B 0xA0
883#define MVC_V29C51400B 0xB3
884#define SM_MVC_29C51001T 0x01 /* Identical chips: {F,S,V}29C51001T */
885#define SM_MVC_29C51002T 0x02 /* Identical chips: {F,S,V}29C51002T */
886#define SM_MVC_29C51004T 0x03 /* Identical chips: {F,S,V}29C51004T */
887#define SM_MVC_29C31004T 0x63 /* Identical chips: {S,V}29C31004T */
888#define SM_MVC_29C31004B 0x73 /* Identical chips: {S,V}29C31004B */
889#define SM_MVC_29C51001B 0xA1 /* Identical chips: {F,S,V}29C51001B */
890#define SM_MVC_29C51002B 0xA2 /* Identical chips: {F,S,V}29C51002B */
891#define SM_MVC_29C51004B 0xA3 /* Identical chips: {F,S,V}29C51004B */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000892
Stefan Tauner6697f712014-08-06 15:09:15 +0000893#define TENX_ID 0x7F7F5E /* Tenx Technologies */
894#define TENX_ID_NOPREFIX 0x5E
895#define TENX_ICE25P05 0x01 /* Maybe? */
896
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000897#define TI_ID 0x97 /* Texas Instruments */
898#define TI_OLD_ID 0x01 /* TI chips from last century */
899#define TI_TMS29F002RT 0xB0
900#define TI_TMS29F002RB 0x34
901
902/*
903 * W25X chips are SPI, first byte of device ID is memory type, second
904 * byte of device ID is related to log(bitsize).
905 */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000906#define WINBOND_NEX_ID 0xEF /* Winbond (ex Nexcom) serial flashes */
David Hendricksc9ee0ed2018-02-11 17:40:53 -0800907#define WINBOND_NEX_W25P80 0x2014
908#define WINBOND_NEX_W25P16 0x2015
909#define WINBOND_NEX_W25P32 0x2016
Mattias Mattssona745cf42010-09-14 23:56:56 +0000910#define WINBOND_NEX_W25X10 0x3011
911#define WINBOND_NEX_W25X20 0x3012
912#define WINBOND_NEX_W25X40 0x3013
913#define WINBOND_NEX_W25X80 0x3014
914#define WINBOND_NEX_W25X16 0x3015
915#define WINBOND_NEX_W25X32 0x3016
916#define WINBOND_NEX_W25X64 0x3017
Yung-Chieh Lob13d4e62013-06-09 14:00:46 +0000917#define WINBOND_NEX_W25Q40_V 0x4013 /* W25Q40BV; W25Q40BL (2.3-3.6V) */
918#define WINBOND_NEX_W25Q80_V 0x4014 /* W25Q80BV */
919#define WINBOND_NEX_W25Q16_V 0x4015 /* W25Q16CV; W25Q16DV */
920#define WINBOND_NEX_W25Q32_V 0x4016 /* W25Q32BV; W25Q32FV in SPI mode (default) */
921#define WINBOND_NEX_W25Q64_V 0x4017 /* W25Q64BV, W25Q64CV; W25Q64FV in SPI mode (default) */
922#define WINBOND_NEX_W25Q128_V 0x4018 /* W25Q128BV; W25Q128FV in SPI mode (default) */
David Hendricks49876792018-10-27 20:19:42 +0000923#define WINBOND_NEX_W25Q256_V 0x4019 /* W25Q256FV or W25Q256JV_Q (QE=1) */
Yung-Chieh Lob13d4e62013-06-09 14:00:46 +0000924#define WINBOND_NEX_W25Q20_W 0x5012 /* W25Q20BW */
Nico Huber25683572018-03-30 13:50:13 +0200925#define WINBOND_NEX_W25Q40BW 0x5013 /* W25Q40BW */
David Hendricksc699f5c2018-03-11 17:29:49 -0700926#define WINBOND_NEX_W25Q80BW 0x5014 /* W25Q80BW */
Nico Huber25683572018-03-30 13:50:13 +0200927#define WINBOND_NEX_W25Q40EW 0x6013 /* W25Q40EW */
Stanislav Sedovf5775442018-03-07 14:16:51 -0800928#define WINBOND_NEX_W25Q80EW 0x6014 /* W25Q80EW */
Yung-Chieh Lob13d4e62013-06-09 14:00:46 +0000929#define WINBOND_NEX_W25Q16_W 0x6015 /* W25Q16DW */
930#define WINBOND_NEX_W25Q32_W 0x6016 /* W25Q32DW; W25Q32FV in QPI mode */
931#define WINBOND_NEX_W25Q64_W 0x6017 /* W25Q64DW; W25Q64FV in QPI mode */
Nico Huber70eed9f2017-04-24 22:19:27 +0200932#define WINBOND_NEX_W25Q128_W 0x6018 /* W25Q128FW; W25Q128FV in QPI mode */
Patrick Rudolph34323492018-10-04 14:59:40 +0200933#define WINBOND_NEX_W25Q128_V_M 0x7018 /* W25Q128JVSM */
David Hendricks49876792018-10-27 20:19:42 +0000934#define WINBOND_NEX_W25Q256JV_M 0x7019 /* W25Q256JV_M (QE=0) */
Mattias Mattssona745cf42010-09-14 23:56:56 +0000935
936#define WINBOND_ID 0xDA /* Winbond */
937#define WINBOND_W19B160BB 0x49
938#define WINBOND_W19B160BT 0xC4
Stefan Tauner6697f712014-08-06 15:09:15 +0000939#define WINBOND_W19B320SB 0x2A /* Same as W19L320SB */
940#define WINBOND_W19B320ST 0xBA /* Same as W19L320ST */
Mattias Mattssona745cf42010-09-14 23:56:56 +0000941#define WINBOND_W19B322MB 0x92
942#define WINBOND_W19B322MT 0x10
943#define WINBOND_W19B323MB 0x94
944#define WINBOND_W19B323MT 0x13
945#define WINBOND_W19B324MB 0x97
946#define WINBOND_W19B324MT 0x16
Stefan Tauner6697f712014-08-06 15:09:15 +0000947#define WINBOND_W29C010 0xC1 /* Same as W29C010M, W29C011A, W29EE011, W29EE012, and ASD AE29F1008 */
948#define WINBOND_W29C020 0x45 /* Same as W29C020C, W29C022 and ASD AE29F2008 */
949#define WINBOND_W29C040 0x46 /* Same as W29C040P */
950#define WINBOND_W29C512A 0xC8 /* Same as W29EE512 */
Stefan Tauner03a9c3c2014-08-03 14:15:14 +0000951#define WINBOND_W29GL032CHL 0x7E1D01 /* Uniform Sectors, WP protects Top OR Bottom sector */
952#define WINBOND_W29GL032CB 0x7E1A00 /* Top Boot Sector, WP protects Top 2 sectors */
953#define WINBOND_W29GL032CT 0x7E1A01 /* Bottom Boot Sector, WP protects Bottom 2 sectors */
954#define WINBOND_W29GL064CHL 0x7E0C01 /* Uniform Sectors, WP protects Top OR Bottom sector */
955#define WINBOND_W29GL064CB 0x7E1000 /* Top Boot Sector, WP protects Top 2 sectors */
956#define WINBOND_W29GL064CT 0x7E1001 /* Bottom Boot Sector, WP protects Bottom 2 sectors */
957#define WINBOND_W29GL128CHL 0x7E2101 /* Uniform Sectors, WP protects Top OR Bottom sector */
958#define WINBOND_W29GL256HL 0x7E2201 /* Same ID for W29GL0256P and W29GL0256S; uniform Sectors, WP protects Top OR Bottom sector */
Kyösti Mälkkic31243e2012-10-28 01:50:08 +0000959#define WINBOND_W39F010 0xA1
Mattias Mattssona745cf42010-09-14 23:56:56 +0000960#define WINBOND_W39L010 0x31
961#define WINBOND_W39L020 0xB5
962#define WINBOND_W39L040 0xB6
963#define WINBOND_W39L040A 0xD6
964#define WINBOND_W39L512 0x38
965#define WINBOND_W39V040A 0x3D
966#define WINBOND_W39V040FA 0x34
Stefan Tauner6697f712014-08-06 15:09:15 +0000967#define WINBOND_W39V040B 0x54 /* Same as W39V040FB */
968#define WINBOND_W39V040C 0x50 /* Same as W39V040FC */
Mattias Mattssona745cf42010-09-14 23:56:56 +0000969#define WINBOND_W39V080A 0xD0
970#define WINBOND_W39V080FA 0xD3
Stefan Tauner6697f712014-08-06 15:09:15 +0000971#define WINBOND_W39V080FA_DM 0x93 /* W39V080FA dual mode */
972#define WINBOND_W49F002 0x25 /* Same as W49F002B */
973#define WINBOND_W49F002U 0x0B /* Same as W49F002N and ASD AE49F2008 */
Mattias Mattssona745cf42010-09-14 23:56:56 +0000974#define WINBOND_W49F020 0x8C
975#define WINBOND_W49V002A 0xB0
976#define WINBOND_W49V002FA 0x32
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000977
nybashcbb46e22018-02-11 17:53:49 -0800978#define ZETTADEVICE_ID 0xBA /* Zetta Device */
David Hendricksa72d5a92018-02-11 17:58:44 -0800979#define ZETTADEVICE_ZD25D20 0x2012
nybashcbb46e22018-02-11 17:53:49 -0800980#define ZETTADEVICE_ZD25D40 0x2013
981
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000982#endif /* !FLASHCHIPS_H */