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Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
6 * Copyright (C) 2005-2007 coresystems GmbH <stepan@coresystems.de>
7 * Copyright (C) 2006-2009 Carl-Daniel Hailfinger
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23
24#ifndef __FLASHCHIPS_H__
25#define __FLASHCHIPS_H__ 1
26
27/*
28 * Please keep this list sorted alphabetically by manufacturer. The first
29 * entry of each section should be the manufacturer ID, followed by the
30 * list of devices from that manufacturer (sorted by device IDs).
31 *
32 * All LPC/FWH parts (parallel flash) have 8-bit device IDs if there is no
33 * continuation code.
34 * SPI parts have 16-bit device IDs if they support RDID.
35 */
36
Carl-Daniel Hailfinger01d49ed2009-11-20 01:12:45 +000037#define GENERIC_MANUF_ID 0xffff /* Check if there is a vendor ID */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +000038#define GENERIC_DEVICE_ID 0xffff /* Only match the vendor ID */
39
40#define ALLIANCE_ID 0x52 /* Alliance Semiconductor */
Mattias Mattssoneaf5ead2010-09-18 23:42:36 +000041#define ALLIANCE_AS29F002B 0x34
42#define ALLIANCE_AS29F002T 0xB0
43#define ALLIANCE_AS29F010 0x04
44#define ALLIANCE_AS29F040 0xA4
45#define ALLIANCE_AS29F200B 0x57
46#define ALLIANCE_AS29F200T 0x51
47#define ALLIANCE_AS29LV160B 0x49
48#define ALLIANCE_AS29LV160T 0xCA
49#define ALLIANCE_AS29LV400B 0xBA
50#define ALLIANCE_AS29LV400T 0xB9
51#define ALLIANCE_AS29LV800B 0x5B
52#define ALLIANCE_AS29LV800T 0xDA
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +000053
54#define AMD_ID 0x01 /* AMD */
Mattias Mattsson6eabe282010-09-15 23:31:03 +000055#define AMD_AM29DL400BT 0x0C
56#define AMD_AM29DL400BB 0x0F
57#define AMD_AM29DL800BT 0x4A
58#define AMD_AM29DL800BB 0xCB
59#define AMD_AM29F002BB 0x34 /* Same as Am29F002NBB */
60#define AMD_AM29F002BT 0xB0 /* Same as Am29F002NBT */
61#define AMD_AM29F004BB 0x7B
62#define AMD_AM29F004BT 0x77
63#define AMD_AM29F016D 0xAD
64#define AMD_AM29F010B 0x20 /* Same as Am29F010A */
65#define AMD_AM29F040B 0xA4
66#define AMD_AM29F080B 0xD5
67#define AMD_AM29F200BB 0x57
68#define AMD_AM29F200BT 0x51
69#define AMD_AM29F400BB 0xAB
70#define AMD_AM29F400BT 0x23
71#define AMD_AM29F800BB 0x58
72#define AMD_AM29F800BT 0xD6
Carl-Daniel Hailfingerc753e5b2011-02-05 12:11:17 +000073#define AMD_AM29LV001BB 0x6D
74#define AMD_AM29LV001BT 0xED
Mattias Mattsson6eabe282010-09-15 23:31:03 +000075#define AMD_AM29LV002BB 0xC2
76#define AMD_AM29LV002BT 0x40
77#define AMD_AM29LV004BB 0xB6
78#define AMD_AM29LV004BT 0xB5
79#define AMD_AM29LV008BB 0x37
80#define AMD_AM29LV008BT 0x3E
81#define AMD_AM29LV040B 0x4F
82#define AMD_AM29LV080B 0x38 /* Same as Am29LV081B */
83#define AMD_AM29LV200BB 0xBF
84#define AMD_AM29LV200BT 0x3B
85#define AMD_AM29LV800BB 0x5B /* Same as Am29LV800DB */
86#define AMD_AM29LV400BT 0xB9
87#define AMD_AM29LV400BB 0xBA
88#define AMD_AM29LV800BT 0xDA /* Same as Am29LV800DT */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +000089
90#define AMIC_ID 0x7F37 /* AMIC */
91#define AMIC_ID_NOPREFIX 0x37 /* AMIC */
Daniel Lenskidf90d3a2010-07-22 11:44:38 +000092#define AMIC_A25L05PT 0x2020
93#define AMIC_A25L05PU 0x2010
94#define AMIC_A25L10PT 0x2021
95#define AMIC_A25L10PU 0x2011
96#define AMIC_A25L20PT 0x2022
97#define AMIC_A25L20PU 0x2012
98#define AMIC_A25L40PT 0x2013 /* Datasheet says T and U have
99 same device ID. Confirmed by
100 hardware testing. */
101#define AMIC_A25L40PU 0x2013
102#define AMIC_A25L80P 0x2014 /* Seems that no A25L80PT exists */
103#define AMIC_A25L16PT 0x2025
104#define AMIC_A25L16PU 0x2015
Dan Lenski11617122010-07-29 15:00:40 +0000105#define AMIC_A25L512 0x3010
106#define AMIC_A25L010 0x3011
107#define AMIC_A25L020 0x3012
108#define AMIC_A25L040 0x3013
109#define AMIC_A25L080 0x3014
110#define AMIC_A25L016 0x3015
111#define AMIC_A25L032 0x3016
112#define AMIC_A25LQ032 0x4016
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000113#define AMIC_A29002B 0x0d
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000114#define AMIC_A29002T 0x8C /* Same as A290021T */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000115#define AMIC_A29040B 0x86
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000116#define AMIC_A29400T 0xB0 /* Same as 294001T */
117#define AMIC_A29400U 0x31 /* Same as A294001U */
118#define AMIC_A29800T 0x0E
119#define AMIC_A29800U 0x8F
120#define AMIC_A29L004T 0x34 /* Same as A29L400T */
121#define AMIC_A29L004U 0xB5 /* Same as A29L400U */
122#define AMIC_A29L008T 0x1A /* Same as A29L800T */
123#define AMIC_A29L008U 0x9B /* Same as A29L800U */
124#define AMIC_A29L040 0x92
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000125#define AMIC_A49LF040A 0x9d
126
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000127#define ATMEL_ID 0x1F /* Atmel */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000128#define ATMEL_AT25DF021 0x4300
129#define ATMEL_AT25DF041A 0x4401
130#define ATMEL_AT25DF081 0x4502
131#define ATMEL_AT25DF081A 0x4501 /* Yes, 81A has a lower number than 81 */
132#define ATMEL_AT25DF161 0x4602
133#define ATMEL_AT25DF321 0x4700 /* Same as 26DF321 */
134#define ATMEL_AT25DF321A 0x4701
135#define ATMEL_AT25DF641 0x4800
136#define ATMEL_AT25DQ161 0x8600
137#define ATMEL_AT25F512 /* No device ID found in datasheet. Vendor ID
Carl-Daniel Hailfingerfd7075a2010-07-29 13:09:18 +0000138 * can be read with AT25F512A_RDID */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000139#define ATMEL_AT25F512A 0x65 /* Needs AT25F512A_RDID */
140#define ATMEL_AT25F512B 0x6500
141#define ATMEL_AT25F1024 /* No device ID found in datasheet. Vendor ID
Carl-Daniel Hailfingerfd7075a2010-07-29 13:09:18 +0000142 * can be read with AT25F512A_RDID */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000143#define ATMEL_AT25F1024A 0x60 /* Needs AT25F512A_RDID */
144#define ATMEL_AT25FS010 0x6601
145#define ATMEL_AT25FS040 0x6604
146#define ATMEL_AT26DF041 0x4400
147#define ATMEL_AT26DF081 0x4500 /* guessed, no datasheet available */
148#define ATMEL_AT26DF081A 0x4501
149#define ATMEL_AT26DF161 0x4600
150#define ATMEL_AT26DF161A 0x4601
151#define ATMEL_AT26DF321 0x4700 /* Same as 25DF321 */
152#define ATMEL_AT26F004 0x0400
153#define ATMEL_AT29C040A 0xA4
154#define ATMEL_AT29C010A 0xD5
155#define ATMEL_AT29C020 0xDA
156#define ATMEL_AT29C512 0x5D
157#define ATMEL_AT45BR3214B /* No ID available */
158#define ATMEL_AT45CS1282 0x2920
159#define ATMEL_AT45D011 /* No ID available */
160#define ATMEL_AT45D021A /* No ID available */
161#define ATMEL_AT45D041A /* No ID available */
162#define ATMEL_AT45D081A /* No ID available */
163#define ATMEL_AT45D161 /* No ID available */
164#define ATMEL_AT45DB011 /* No ID available */
165#define ATMEL_AT45DB011B /* No ID available */
166#define ATMEL_AT45DB011D 0x2200
167#define ATMEL_AT45DB021A /* No ID available */
168#define ATMEL_AT45DB021B /* No ID available */
169#define ATMEL_AT45DB021D 0x2300
170#define ATMEL_AT45DB041A /* No ID available */
171#define ATMEL_AT45DB041D 0x2400
172#define ATMEL_AT45DB081A /* No ID available */
173#define ATMEL_AT45DB081D 0x2500
174#define ATMEL_AT45DB161 /* No ID available */
175#define ATMEL_AT45DB161B /* No ID available */
176#define ATMEL_AT45DB161D 0x2600
177#define ATMEL_AT45DB321 /* No ID available */
178#define ATMEL_AT45DB321B /* No ID available */
179#define ATMEL_AT45DB321C 0x2700
180#define ATMEL_AT45DB321D 0x2701 /* Buggy data sheet */
181#define ATMEL_AT45DB642 /* No ID available */
182#define ATMEL_AT45DB642D 0x2800
183#define ATMEL_AT49BV512 0x03
184#define ATMEL_AT49F020 0x0B
185#define ATMEL_AT49F002N 0x07 /* for AT49F002(N) */
186#define ATMEL_AT49F002NT 0x08 /* for AT49F002(N)T */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000187
Joshua Roysf1324e02010-09-16 00:51:51 +0000188/* Bright Microelectronics has the same manufacturer ID as Hyundai... */
189#define BRIGHT_ID 0xAD /* Bright Microelectronics */
190#define BRIGHT_BM29F040 0x40
191#define BRIGHT_BM29F400B 0xAB
192#define BRIGHT_BM29F400T 0xAD
193
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000194#define CATALYST_ID 0x31 /* Catalyst */
195
196#define EMST_ID 0x8C /* EMST / EFST Elite Flash Storage */
Michael Karcher80a59ea2010-06-19 22:06:35 +0000197#define EMST_F25L008A 0x2014
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000198#define EMST_F49B002UA 0x00
199
200/*
201 * EN25 chips are SPI, first byte of device ID is memory type,
202 * second byte of device ID is log(bitsize)-9.
203 * Vendor and device ID of EN29 series are both prefixed with 0x7F, which
204 * is the continuation code for IDs in bank 2.
205 * Vendor ID of EN25 series is NOT prefixed with 0x7F, this results in
206 * a collision with Mitsubishi. Mitsubishi once manufactured flash chips.
207 * Let's hope they are not manufacturing SPI flash chips as well.
208 */
209#define EON_ID 0x7F1C /* EON Silicon Devices */
210#define EON_ID_NOPREFIX 0x1C /* EON, missing 0x7F prefix */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000211#define EON_EN25B05 0x2010 /* Same as P05, 2^19 kbit or 2^16 kByte */
212#define EON_EN25B05T 0x25
213#define EON_EN25B05B 0x95
214#define EON_EN25B10 0x2011 /* Same as P10 */
215#define EON_EN25B10T 0x40
216#define EON_EN25B10B 0x30
217#define EON_EN25B20 0x2012 /* Same as P20 */
218#define EON_EN25B20T 0x41
219#define EON_EN25B20B 0x31
220#define EON_EN25B40 0x2013 /* Same as P40 */
221#define EON_EN25B40T 0x42
222#define EON_EN25B40B 0x32
223#define EON_EN25B80 0x2014 /* Same as P80 */
224#define EON_EN25B80T 0x43
225#define EON_EN25B80B 0x33
226#define EON_EN25B16 0x2015 /* Same as P16 */
227#define EON_EN25B16T 0x44
228#define EON_EN25B16B 0x34
229#define EON_EN25B32 0x2016 /* Same as P32 */
230#define EON_EN25B32T 0x45
231#define EON_EN25B32B 0x35
232#define EON_EN25B64 0x2017 /* Same as P64 */
233#define EON_EN25B64T 0x46
234#define EON_EN25B64B 0x36
235#define EON_EN25D16 0x3015
236#define EON_EN25F05 0x3110
237#define EON_EN25F10 0x3111
238#define EON_EN25F20 0x3112
239#define EON_EN25F40 0x3113
240#define EON_EN25F80 0x3114
241#define EON_EN25F16 0x3115
242#define EON_EN25F32 0x3116
243#define EON_EN29F512 0x7F21
244#define EON_EN29F010 0x20
245#define EON_EN29F040A 0x7F04
246#define EON_EN29LV010 0x7F6E
247#define EON_EN29LV040A 0x7F4F /* EN29LV040(A) */
248#define EON_EN29F002T 0x7F92 /* Same as EN29F002A */
249#define EON_EN29F002B 0x7F97 /* Same as EN29F002AN */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000250
251#define FUJITSU_ID 0x04 /* Fujitsu */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000252#define FUJITSU_MBM29DL400BC 0x0F
253#define FUJITSU_MBM29DL400TC 0x0C
254#define FUJITSU_MBM29DL800BA 0xCB
255#define FUJITSU_MBM29DL800TA 0x4A
256#define FUJITSU_MBM29F002BC 0x34
257#define FUJITSU_MBM29F002TC 0xB0
258#define FUJITSU_MBM29F004BC 0x7B
259#define FUJITSU_MBM29F004TC 0x77
260#define FUJITSU_MBM29F040C 0xA4
261#define FUJITSU_MBM29F080A 0xD5
262#define FUJITSU_MBM29F200BC 0x57
263#define FUJITSU_MBM29F200TC 0x51
264#define FUJITSU_MBM29F400BC 0xAB
265#define FUJITSU_MBM29F400TC 0x23
266#define FUJITSU_MBM29F800BA 0x58
267#define FUJITSU_MBM29F800TA 0xD6
268#define FUJITSU_MBM29LV002BC 0xC2
269#define FUJITSU_MBM29LV002TC 0x40
270#define FUJITSU_MBM29LV004BC 0xB6
271#define FUJITSU_MBM29LV004TC 0xB5
272#define FUJITSU_MBM29LV008BA 0x37
273#define FUJITSU_MBM29LV008TA 0x3E
274#define FUJITSU_MBM29LV080A 0x38
275#define FUJITSU_MBM29LV200BC 0xBF
276#define FUJITSU_MBM29LV200TC 0x3B
277#define FUJITSU_MBM29LV400BC 0xBA
278#define FUJITSU_MBM29LV400TC 0xB9
279#define FUJITSU_MBM29LV800BA 0x5B /* Same as MBM29LV800BE */
280#define FUJITSU_MBM29LV800TA 0xDA /* Same as MBM29LV800TE */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000281
282#define HYUNDAI_ID 0xAD /* Hyundai */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000283#define HYUNDAI_HY29F400T 0x23 /* Same as HY29F400AT */
284#define HYUNDAI_HY29F800B 0x58 /* Same as HY29F800AB */
285#define HYUNDAI_HY29LV800B 0x5B
286#define HYUNDAI_HY29F040A 0xA4
287#define HYUNDAI_HY29F400B 0xAB /* Same as HY29F400AB */
288#define HYUNDAI_HY29F002B 0x34
289#define HYUNDAI_HY29F002T 0xB0
290#define HYUNDAI_HY29LV400T 0xB9
291#define HYUNDAI_HY29LV400B 0xBA
292#define HYUNDAI_HY29F080 0xD5
293#define HYUNDAI_HY29F800T 0xD6 /* Same as HY29F800AT */
294#define HYUNDAI_HY29LV800T 0xDA
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000295
296#define IMT_ID 0x7F1F /* Integrated Memory Technologies */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000297#define IMT_IM29F004B 0xAE
298#define IMT_IM29F004T 0xAF
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000299
300#define INTEL_ID 0x89 /* Intel */
Mattias Mattssoncbee4a72010-10-05 20:28:36 +0000301#define INTEL_28F320J5 0x14
302#define INTEL_28F640J5 0x15
303#define INTEL_28F320J3 0x16
304#define INTEL_28F640J3 0x17
305#define INTEL_28F128J3 0x18
306#define INTEL_28F256J3 0x1D
307#define INTEL_28F400T 0x70 /* 28F400BV/BX/CE/CV-T */
308#define INTEL_28F400B 0x71 /* 28F400BV/BX/CE/CV-B */
309#define INTEL_28F200T 0x74 /* 28F200BL/BV/BX/CV-T */
310#define INTEL_28F200B 0x75 /* 28F200BL/BV/BX/CV-B */
311#define INTEL_28F004T 0x78 /* 28F004B5/BE/BV/BX-T */
312#define INTEL_28F004B 0x79 /* 28F004B5/BE/BV/BX-B */
313#define INTEL_28F002T 0x7C /* 28F002BC/BL/BV/BX-T */
314#define INTEL_28F002B 0x7D /* 28F002BL/BV/BX-B */
315#define INTEL_28F001T 0x94 /* 28F001BN/BX-T */
316#define INTEL_28F001B 0x95 /* 28F001BN/BX-B */
317#define INTEL_28F008T 0x98 /* 28F008BE/BV-T */
318#define INTEL_28F008B 0x99 /* 28F008BE/BV-B */
319#define INTEL_28F800T 0x9C /* 28F800B5/BV/CE/CV-T */
320#define INTEL_28F800B 0x9D /* 28F800B5/BV/CE/CV-B */
321#define INTEL_28F016SV 0xA0 /* 28F016SA/SV */
322#define INTEL_28F008SA 0xA2
323#define INTEL_28F008S3 0xA6 /* 28F008S3/S5/SC */
324#define INTEL_28F004S3 0xA7 /* 28F008S3/S5/SC */
325#define INTEL_28F016XS 0xA8
326#define INTEL_28F016S3 0xAA /* 28F016S3/S5/SC */
327#define INTEL_82802AC 0xAC
328#define INTEL_82802AB 0xAD
329#define INTEL_28F010 0xB4
330#define INTEL_28F512 0xB8
331#define INTEL_28F256A 0xB9
332#define INTEL_28F020 0xBD
333#define INTEL_28F016B3T 0xD0 /* 28F016B3-T */
334#define INTEL_28F016B3B 0xD1 /* 28F016B3-B */
335#define INTEL_28F008B3T 0xD2 /* 28F008B3-T */
336#define INTEL_28F008B3B 0xD3 /* 28F008B3-B */
337#define INTEL_28F004B3T 0xD4 /* 28F004B3-T */
338#define INTEL_28F004B3B 0xD5 /* 28F004B3-B */
339
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000340#define SHARP_LH28F008SA 0xA2 /* Sharp chip, Intel Vendor ID */
341#define SHARP_LH28F008SC 0xA6 /* Sharp chip, Intel Vendor ID */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000342
343#define ISSI_ID 0xD5 /* ISSI Integrated Silicon Solutions */
344
345/*
346 * MX25 chips are SPI, first byte of device ID is memory type,
347 * second byte of device ID is log(bitsize)-9.
348 * Generalplus SPI chips seem to be compatible with Macronix
349 * and use the same set of IDs.
350 */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000351#define MACRONIX_ID 0xC2 /* Macronix (MX) */
352#define MACRONIX_MX25L512 0x2010 /* Same as MX25V512 */
353#define MACRONIX_MX25L1005 0x2011
354#define MACRONIX_MX25L2005 0x2012
355#define MACRONIX_MX25L4005 0x2013 /* MX25L4005{,A} */
356#define MACRONIX_MX25L8005 0x2014 /* Same as MX25V8005 */
357#define MACRONIX_MX25L1605 0x2015 /* MX25L1605{,A,D} */
358#define MACRONIX_MX25L3205 0x2016 /* MX25L3205{,A} */
359#define MACRONIX_MX25L6405 0x2017 /* MX25L3205{,D} */
360#define MACRONIX_MX25L12805 0x2018 /* MX25L12805 */
361#define MACRONIX_MX25L1635D 0x2415
362#define MACRONIX_MX25L1635E 0x2515 /* MX25L1635{E} */
363#define MACRONIX_MX25L3235D 0x5E16 /* MX25L3225D/MX25L3235D/MX25L3237D */
364#define MACRONIX_MX29F001B 0x19
365#define MACRONIX_MX29F001T 0x18
366#define MACRONIX_MX29F002B 0x34 /* Same as MX29F002NB */
367#define MACRONIX_MX29F002T 0xB0 /* Same as MX29F002NT */
368#define MACRONIX_MX29F004B 0x46
369#define MACRONIX_MX29F004T 0x45
370#define MACRONIX_MX29F022T 0x36 /* Same as MX29F022NT */
371#define MACRONIX_MX29F040 0xA4 /* Same as MX29F040C */
372#define MACRONIX_MX29F080 0xD5
373#define MACRONIX_MX29F200B 0x57 /* Same as MX29F200CB */
374#define MACRONIX_MX29F200T 0x51 /* Same as MX29F200CT */
375#define MACRONIX_MX29F400B 0xAB /* Same as MX29F400CB */
376#define MACRONIX_MX29F400T 0x23 /* Same as MX29F400CT */
377#define MACRONIX_MX29F800B 0x58
378#define MACRONIX_MX29F800T 0xD6
379#define MACRONIX_MX29LV002CB 0x5A
380#define MACRONIX_MX29LV002CT 0x59
381#define MACRONIX_MX29LV004B 0xB6 /* Same as MX29LV004CB */
382#define MACRONIX_MX29LV004T 0xB5 /* Same as MX29LV004CT */
383#define MACRONIX_MX29LV008B 0x37 /* Same as MX29LV008CB */
384#define MACRONIX_MX29LV008T 0x3E /* Same as MX29LV008CT */
385#define MACRONIX_MX29LV040 0x4F /* Same as MX29LV040C */
386#define MACRONIX_MX29LV081 0x38
387#define MACRONIX_MX29LV128DB 0x7A
388#define MACRONIX_MX29LV128DT 0x7E
389#define MACRONIX_MX29LV160DB 0x49 /* Same as MX29LV161DB/MX29LV160CB */
390#define MACRONIX_MX29LV160DT 0xC4 /* Same as MX29LV161DT/MX29LV160CT */
391#define MACRONIX_MX29LV320DB 0xA8 /* Same as MX29LV321DB */
392#define MACRONIX_MX29LV320DT 0xA7 /* Same as MX29LV321DT */
393#define MACRONIX_MX29LV400B 0xBA /* Same as MX29LV400CB */
394#define MACRONIX_MX29LV400T 0xB9 /* Same as MX29LV400CT */
395#define MACRONIX_MX29LV640DB 0xCB /* Same as MX29LV640EB */
396#define MACRONIX_MX29LV640DT 0xC9 /* Same as MX29LV640ET */
397#define MACRONIX_MX29LV800B 0x5B /* Same as MX29LV800CB */
398#define MACRONIX_MX29LV800T 0xDA /* Same as MX29LV800CT */
399#define MACRONIX_MX29SL402CB 0xF1
400#define MACRONIX_MX29SL402CT 0x70
401#define MACRONIX_MX29SL800CB 0x6B /* Same as MX29SL802CB */
402#define MACRONIX_MX29SL800CT 0xEA /* Same as MX29SL802CT */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000403
404/*
405 * Programmable Micro Corp is listed in JEP106W in bank 2, so it should
406 * have a 0x7F continuation code prefix.
407 */
408#define PMC_ID 0x7F9D /* PMC */
409#define PMC_ID_NOPREFIX 0x9D /* PMC, missing 0x7F prefix */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000410#define PMC_PM25LV512 0x7B
411#define PMC_PM25LV010 0x7C
412#define PMC_PM25LV020 0x7D
413#define PMC_PM25LV040 0x7E
414#define PMC_PM25LV080B 0x13
415#define PMC_PM25LV016B 0x14
416#define PMC_PM29F002T 0x1D
417#define PMC_PM29F002B 0x2D
418#define PMC_PM39LV512 0x1B
419#define PMC_PM39F010 0x1C /* Same as Pm39LV010 */
420#define PMC_PM39LV020 0x3D
421#define PMC_PM39LV040 0x3E
422#define PMC_PM39F020 0x4D
423#define PMC_PM39F040 0x4E
424#define PMC_PM49FL002 0x6D
425#define PMC_PM49FL004 0x6E
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000426
Sean Nelson118e1d62009-11-24 02:08:11 +0000427/*
428 * The Sanyo chip found so far uses SPI, first byte is manufacture code,
429 * second byte is the device code,
430 * third byte is a dummy byte.
431 */
432#define SANYO_ID 0x62
433#define SANYO_LE25FW203A 0x1600
434
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000435#define SHARP_ID 0xB0 /* Sharp */
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000436#define SHARP_LH28F008BJxxPT 0xEC
437#define SHARP_LH28F008BJxxPB 0xED
438#define SHARP_LH28F800BVxxBTL 0x4B
439#define SHARP_LH28F800BVxxBV 0x4D
440#define SHARP_LH28F800BVxxTV 0x4C
441#define SHARP_LHF00L02 0xC9 /* Same as LHF00L06/LHF00L07 */
442#define SHARP_LHF00L04 0xCF /* Same as LHF00L03/LHF00L05 */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000443
444/*
445 * Spansion was previously a joint venture of AMD and Fujitsu.
446 * S25 chips are SPI. The first device ID byte is memory type and
447 * the second device ID byte is memory capacity.
448 */
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000449#define SPANSION_ID 0x01 /* Spansion, same ID as AMD */
Rudy Hostf4e57772010-11-29 00:37:49 +0000450#define SPANSION_S25FL004A 0x0212
Michael Karcher23ff4602010-01-12 23:29:30 +0000451#define SPANSION_S25FL008A 0x0213
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000452#define SPANSION_S25FL016A 0x0214
Rudy Hostf4e57772010-11-29 00:37:49 +0000453#define SPANSION_S25FL032A 0x0215
454#define SPANSION_S25FL064A 0x0216
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000455
456/*
457 * SST25 chips are SPI, first byte of device ID is memory type, second
458 * byte of device ID is related to log(bitsize) at least for some chips.
459 */
460#define SST_ID 0xBF /* SST */
Mattias Mattsson6eabe282010-09-15 23:31:03 +0000461#define SST_SST25WF512 0x2501
462#define SST_SST25WF010 0x2502
463#define SST_SST25WF020 0x2503
464#define SST_SST25WF040 0x2504
465#define SST_SST25VF512A_REMS 0x48 /* REMS or RES opcode */
466#define SST_SST25VF010_REMS 0x49 /* REMS or RES opcode */
467#define SST_SST25VF020_REMS 0x43 /* REMS or RES opcode */
468#define SST_SST25VF040_REMS 0x44 /* REMS or RES opcode, same as SST25LF040A */
469#define SST_SST25VF040B 0x258D
470#define SST_SST25VF040B_REMS 0x8D /* REMS or RES opcode */
471#define SST_SST25VF080_REMS 0x80 /* REMS or RES opcode */
472#define SST_SST25VF080B 0x258E
473#define SST_SST25VF080B_REMS 0x8E /* REMS or RES opcode */
474#define SST_SST25VF016B 0x2541
475#define SST_SST25VF032B 0x254A
476#define SST_SST25VF032B_REMS 0x4A /* REMS or RES opcode */
477#define SST_SST25VF064C 0x254B
478#define SST_SST26VF016 0x2601
479#define SST_SST26VF032 0x2602
480#define SST_SST27SF512 0xA4
481#define SST_SST27SF010 0xA5
482#define SST_SST27SF020 0xA6
483#define SST_SST27VF010 0xA9
484#define SST_SST27VF020 0xAA
485#define SST_SST28SF040 0x04
486#define SST_SST29EE512 0x5D
487#define SST_SST29EE010 0x07
488#define SST_SST29LE010 0x08 /* Same as SST29VE010 */
489#define SST_SST29EE020A 0x10 /* Same as SST29EE020 */
490#define SST_SST29LE020 0x12 /* Same as SST29VE020 */
491#define SST_SST29SF020 0x24
492#define SST_SST29VF020 0x25
493#define SST_SST29SF040 0x13
494#define SST_SST29VF040 0x14
495#define SST_SST39SF512 0xB4
496#define SST_SST39SF010 0xB5
497#define SST_SST39SF020 0xB6 /* Same as 39SF020A */
498#define SST_SST39SF040 0xB7
499#define SST_SST39VF512 0xD4
500#define SST_SST39VF010 0xD5
501#define SST_SST39VF020 0xD6 /* Same as 39LF020 */
502#define SST_SST39VF040 0xD7 /* Same as 39LF040 */
503#define SST_SST39VF080 0xD8 /* Same as 39LF080/39VF080/39VF088 */
504#define SST_SST49LF040B 0x50
505#define SST_SST49LF040 0x51
506#define SST_SST49LF020 0x61
507#define SST_SST49LF020A 0x52
508#define SST_SST49LF030A 0x1C
509#define SST_SST49LF080A 0x5B
510#define SST_SST49LF002A 0x57
511#define SST_SST49LF003A 0x1B
512#define SST_SST49LF004A 0x60 /* Same as 49LF004B */
513#define SST_SST49LF008A 0x5A
514#define SST_SST49LF004C 0x54
515#define SST_SST49LF008C 0x59
516#define SST_SST49LF016C 0x5C
517#define SST_SST49LF160C 0x4C
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000518
519/*
520 * ST25P chips are SPI, first byte of device ID is memory type, second
521 * byte of device ID is related to log(bitsize) at least for some chips.
522 */
523#define ST_ID 0x20 /* ST / SGS/Thomson */
524#define ST_M25P05A 0x2010
Carl-Daniel Hailfinger32961be2009-07-23 01:40:20 +0000525#define ST_M25P05_RES 0x10 /* Same code as M25P10. */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000526#define ST_M25P10A 0x2011
Carl-Daniel Hailfinger32961be2009-07-23 01:40:20 +0000527#define ST_M25P10_RES 0x10 /* Same code as M25P05. */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000528#define ST_M25P20 0x2012
529#define ST_M25P40 0x2013
530#define ST_M25P40_RES 0x12
531#define ST_M25P80 0x2014
532#define ST_M25P16 0x2015
533#define ST_M25P32 0x2016
534#define ST_M25P64 0x2017
535#define ST_M25P128 0x2018
Carl Worthd1dd72c2011-03-06 18:45:40 +0000536#define ST_M25PX16 0x7115
Jason Shriver4119e9b2010-09-14 13:16:01 +0000537#define ST_M25PX32 0x7116
538#define ST_M25PX64 0x7117
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000539#define ST_M25PE10 0x8011
540#define ST_M25PE20 0x8012
541#define ST_M25PE40 0x8013
542#define ST_M25PE80 0x8014
543#define ST_M25PE16 0x8015
544#define ST_M50FLW040A 0x08
545#define ST_M50FLW040B 0x28
546#define ST_M50FLW080A 0x80
547#define ST_M50FLW080B 0x81
548#define ST_M50FW002 0x29
549#define ST_M50FW040 0x2C
550#define ST_M50FW080 0x2D
551#define ST_M50FW016 0x2E
552#define ST_M50LPW116 0x30
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000553#define ST_M29F002B 0x34 /* Same as M29F002BB */
554#define ST_M29F002T 0xB0 /* Same as M29F002BT/M29F002NT/M29F002BNT */
555#define ST_M29F040B 0xE2 /* Same as M29F040 */
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000556#define ST_M29F080 0xF1
557#define ST_M29F200BT 0xD3
558#define ST_M29F200BB 0xD4
Carl-Daniel Hailfinger6d5d2532009-08-10 10:14:23 +0000559#define ST_M29F400BT 0xD5 /* Same as M29F400T */
560#define ST_M29F400BB 0xD6 /* Same as M29F400B */
Carl-Daniel Hailfinger350a0c32009-07-24 13:59:27 +0000561#define ST_M29F800DB 0x58
562#define ST_M29F800DT 0xEC
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000563#define ST_M29W010B 0x23
564#define ST_M29W040B 0xE3
Jeffrey A. Kentba7c9222010-02-01 05:49:46 +0000565#define ST_M29W512B 0x27
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000566
Mattias Mattsson4c066502010-07-29 20:01:13 +0000567#define SYNCMOS_MVC_ID 0x40 /* SyncMOS (SM) and Mosel Vitelic Corporation (MVC) */
568#define MVC_V29C51000T 0x00
569#define MVC_V29C51400T 0x13
570#define MVC_V29LC51000 0x20
571#define MVC_V29LC51001 0x60
572#define MVC_V29LC51002 0x82
573#define MVC_V29C51000B 0xA0
574#define MVC_V29C51400B 0xB3
575#define SM_MVC_29C51001T 0x01 /* Identical chips: {F,S,V}29C51001T */
576#define SM_MVC_29C51002T 0x02 /* Identical chips: {F,S,V}29C51002T */
577#define SM_MVC_29C51004T 0x03 /* Identical chips: {F,S,V}29C51004T */
578#define SM_MVC_29C31004T 0x63 /* Identical chips: {S,V}29C31004T */
579#define SM_MVC_29C31004B 0x73 /* Identical chips: {S,V}29C31004B */
580#define SM_MVC_29C51001B 0xA1 /* Identical chips: {F,S,V}29C51001B */
581#define SM_MVC_29C51002B 0xA2 /* Identical chips: {F,S,V}29C51002B */
582#define SM_MVC_29C51004B 0xA3 /* Identical chips: {F,S,V}29C51004B */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000583
584#define TI_ID 0x97 /* Texas Instruments */
585#define TI_OLD_ID 0x01 /* TI chips from last century */
586#define TI_TMS29F002RT 0xB0
587#define TI_TMS29F002RB 0x34
588
589/*
590 * W25X chips are SPI, first byte of device ID is memory type, second
591 * byte of device ID is related to log(bitsize).
592 */
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000593#define WINBOND_NEX_ID 0xEF /* Winbond (ex Nexcom) serial flashes */
Mattias Mattssona745cf42010-09-14 23:56:56 +0000594#define WINBOND_NEX_W25X10 0x3011
595#define WINBOND_NEX_W25X20 0x3012
596#define WINBOND_NEX_W25X40 0x3013
597#define WINBOND_NEX_W25X80 0x3014
598#define WINBOND_NEX_W25X16 0x3015
599#define WINBOND_NEX_W25X32 0x3016
600#define WINBOND_NEX_W25X64 0x3017
601#define WINBOND_NEX_W25Q40 0x4013
602#define WINBOND_NEX_W25Q80 0x4014
603#define WINBOND_NEX_W25Q16 0x4015
604#define WINBOND_NEX_W25Q32 0x4016
605#define WINBOND_NEX_W25Q64 0x4017
606#define WINBOND_NEX_W25Q128 0x4018
607
608#define WINBOND_ID 0xDA /* Winbond */
609#define WINBOND_W19B160BB 0x49
610#define WINBOND_W19B160BT 0xC4
611#define WINBOND_W19B320SB 0x2A /* Same as W19L320SB */
612#define WINBOND_W19B320ST 0xBA /* Same as W19L320ST */
613#define WINBOND_W19B322MB 0x92
614#define WINBOND_W19B322MT 0x10
615#define WINBOND_W19B323MB 0x94
616#define WINBOND_W19B323MT 0x13
617#define WINBOND_W19B324MB 0x97
618#define WINBOND_W19B324MT 0x16
619#define WINBOND_W29C010 0xC1 /* Same as W29C010M, W29C011A, W29EE011, W29EE012, and ASD AE29F1008 */
620#define WINBOND_W29C020 0x45 /* Same as W29C020C, W29C022 and ASD AE29F2008 */
621#define WINBOND_W29C040 0x46 /* Same as W29C040P */
622#define WINBOND_W29C512A 0xC8 /* Same as W29EE512 */
623#define WINBOND_W39L010 0x31
624#define WINBOND_W39L020 0xB5
625#define WINBOND_W39L040 0xB6
626#define WINBOND_W39L040A 0xD6
627#define WINBOND_W39L512 0x38
628#define WINBOND_W39V040A 0x3D
629#define WINBOND_W39V040FA 0x34
630#define WINBOND_W39V040B 0x54 /* Same as W39V040FB */
631#define WINBOND_W39V040C 0x50 /* Same as W39V040FC */
632#define WINBOND_W39V080A 0xD0
633#define WINBOND_W39V080FA 0xD3
634#define WINBOND_W39V080FA_DM 0x93 /* W39V080FA dual mode */
635#define WINBOND_W49F002 0x25 /* Same as W49F002B */
636#define WINBOND_W49F002U 0x0B /* Same as W49F002N and ASD AE49F2008 */
637#define WINBOND_W49F020 0x8C
638#define WINBOND_W49V002A 0xB0
639#define WINBOND_W49V002FA 0x32
Carl-Daniel Hailfinger08454642009-06-15 14:14:48 +0000640
641#endif /* !FLASHCHIPS_H */