Carl-Daniel Hailfinger | d6cbf76 | 2008-05-13 14:58:23 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the flashrom project. |
| 3 | * |
| 4 | * Copyright (C) 2007, 2008 Carl-Daniel Hailfinger |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 18 | */ |
| 19 | |
| 20 | #ifndef __SPI_H__ |
| 21 | #define __SPI_H__ 1 |
| 22 | |
| 23 | /* |
| 24 | * Contains the generic SPI headers |
| 25 | */ |
| 26 | |
Nico Huber | 0ecbacb | 2017-10-14 16:50:43 +0200 | [diff] [blame^] | 27 | #define JEDEC_MAX_ADDR_LEN 0x04 |
| 28 | |
Carl-Daniel Hailfinger | d6cbf76 | 2008-05-13 14:58:23 +0000 | [diff] [blame] | 29 | /* Read Electronic ID */ |
| 30 | #define JEDEC_RDID 0x9f |
| 31 | #define JEDEC_RDID_OUTSIZE 0x01 |
Carl-Daniel Hailfinger | dc1cda1 | 2010-05-28 17:07:57 +0000 | [diff] [blame] | 32 | /* INSIZE may be 0x04 for some chips*/ |
Carl-Daniel Hailfinger | d6cbf76 | 2008-05-13 14:58:23 +0000 | [diff] [blame] | 33 | #define JEDEC_RDID_INSIZE 0x03 |
| 34 | |
Stefan Tauner | 57794ac | 2012-12-29 15:04:20 +0000 | [diff] [blame] | 35 | /* Some Atmel AT25F* models have bit 3 as don't care bit in commands */ |
| 36 | #define AT25F_RDID 0x15 /* 0x15 or 0x1d */ |
| 37 | #define AT25F_RDID_OUTSIZE 0x01 |
| 38 | #define AT25F_RDID_INSIZE 0x02 |
Carl-Daniel Hailfinger | 0faf03e | 2008-11-28 23:47:55 +0000 | [diff] [blame] | 39 | |
Carl-Daniel Hailfinger | 14e50ac | 2008-11-28 01:25:00 +0000 | [diff] [blame] | 40 | /* Read Electronic Manufacturer Signature */ |
| 41 | #define JEDEC_REMS 0x90 |
| 42 | #define JEDEC_REMS_OUTSIZE 0x04 |
| 43 | #define JEDEC_REMS_INSIZE 0x02 |
| 44 | |
Stefan Tauner | ac1b4c8 | 2012-02-17 14:51:04 +0000 | [diff] [blame] | 45 | /* Read Serial Flash Discoverable Parameters (SFDP) */ |
| 46 | #define JEDEC_SFDP 0x5a |
| 47 | #define JEDEC_SFDP_OUTSIZE 0x05 /* 8b op, 24b addr, 8b dummy */ |
| 48 | /* JEDEC_SFDP_INSIZE : any length */ |
| 49 | |
Carl-Daniel Hailfinger | 42c5497 | 2008-05-15 03:19:49 +0000 | [diff] [blame] | 50 | /* Read Electronic Signature */ |
| 51 | #define JEDEC_RES 0xab |
| 52 | #define JEDEC_RES_OUTSIZE 0x04 |
Carl-Daniel Hailfinger | dc1cda1 | 2010-05-28 17:07:57 +0000 | [diff] [blame] | 53 | /* INSIZE may be 0x02 for some chips*/ |
Carl-Daniel Hailfinger | 42c5497 | 2008-05-15 03:19:49 +0000 | [diff] [blame] | 54 | #define JEDEC_RES_INSIZE 0x01 |
| 55 | |
Carl-Daniel Hailfinger | d6cbf76 | 2008-05-13 14:58:23 +0000 | [diff] [blame] | 56 | /* Write Enable */ |
| 57 | #define JEDEC_WREN 0x06 |
| 58 | #define JEDEC_WREN_OUTSIZE 0x01 |
| 59 | #define JEDEC_WREN_INSIZE 0x00 |
| 60 | |
| 61 | /* Write Disable */ |
| 62 | #define JEDEC_WRDI 0x04 |
| 63 | #define JEDEC_WRDI_OUTSIZE 0x01 |
| 64 | #define JEDEC_WRDI_INSIZE 0x00 |
| 65 | |
| 66 | /* Chip Erase 0x60 is supported by Macronix/SST chips. */ |
| 67 | #define JEDEC_CE_60 0x60 |
| 68 | #define JEDEC_CE_60_OUTSIZE 0x01 |
| 69 | #define JEDEC_CE_60_INSIZE 0x00 |
| 70 | |
Stefan Tauner | 3c0fcd0 | 2012-09-21 12:46:56 +0000 | [diff] [blame] | 71 | /* Chip Erase 0x62 is supported by Atmel AT25F chips. */ |
| 72 | #define JEDEC_CE_62 0x62 |
| 73 | #define JEDEC_CE_62_OUTSIZE 0x01 |
| 74 | #define JEDEC_CE_62_INSIZE 0x00 |
| 75 | |
Peter Stuge | f83221b | 2008-07-07 06:38:51 +0000 | [diff] [blame] | 76 | /* Chip Erase 0xc7 is supported by SST/ST/EON/Macronix chips. */ |
Carl-Daniel Hailfinger | d6cbf76 | 2008-05-13 14:58:23 +0000 | [diff] [blame] | 77 | #define JEDEC_CE_C7 0xc7 |
| 78 | #define JEDEC_CE_C7_OUTSIZE 0x01 |
| 79 | #define JEDEC_CE_C7_INSIZE 0x00 |
| 80 | |
Stefan Tauner | 94b39b4 | 2012-10-27 00:06:02 +0000 | [diff] [blame] | 81 | /* Block Erase 0x50 is supported by Atmel AT26DF chips. */ |
| 82 | #define JEDEC_BE_50 0x50 |
| 83 | #define JEDEC_BE_50_OUTSIZE 0x04 |
| 84 | #define JEDEC_BE_50_INSIZE 0x00 |
| 85 | |
Carl-Daniel Hailfinger | d54ef6e | 2008-11-15 13:55:43 +0000 | [diff] [blame] | 86 | /* Block Erase 0x52 is supported by SST and old Atmel chips. */ |
Carl-Daniel Hailfinger | d6cbf76 | 2008-05-13 14:58:23 +0000 | [diff] [blame] | 87 | #define JEDEC_BE_52 0x52 |
| 88 | #define JEDEC_BE_52_OUTSIZE 0x04 |
| 89 | #define JEDEC_BE_52_INSIZE 0x00 |
| 90 | |
Stefan Tauner | 94b39b4 | 2012-10-27 00:06:02 +0000 | [diff] [blame] | 91 | /* Block Erase 0x81 is supported by Atmel AT26DF chips. */ |
| 92 | #define JEDEC_BE_81 0x81 |
| 93 | #define JEDEC_BE_81_OUTSIZE 0x04 |
| 94 | #define JEDEC_BE_81_INSIZE 0x00 |
| 95 | |
Nikolay Nikolaev | 6f59b0b | 2013-06-28 21:29:51 +0000 | [diff] [blame] | 96 | /* Block Erase 0xc4 is supported by Micron chips. */ |
| 97 | #define JEDEC_BE_C4 0xc4 |
| 98 | #define JEDEC_BE_C4_OUTSIZE 0x04 |
| 99 | #define JEDEC_BE_C4_INSIZE 0x00 |
| 100 | |
Carl-Daniel Hailfinger | d6cbf76 | 2008-05-13 14:58:23 +0000 | [diff] [blame] | 101 | /* Block Erase 0xd8 is supported by EON/Macronix chips. */ |
| 102 | #define JEDEC_BE_D8 0xd8 |
| 103 | #define JEDEC_BE_D8_OUTSIZE 0x04 |
| 104 | #define JEDEC_BE_D8_INSIZE 0x00 |
| 105 | |
Sean Nelson | 5643c07 | 2010-01-19 03:23:07 +0000 | [diff] [blame] | 106 | /* Block Erase 0xd7 is supported by PMC chips. */ |
| 107 | #define JEDEC_BE_D7 0xd7 |
| 108 | #define JEDEC_BE_D7_OUTSIZE 0x04 |
| 109 | #define JEDEC_BE_D7_INSIZE 0x00 |
| 110 | |
Carl-Daniel Hailfinger | d6cbf76 | 2008-05-13 14:58:23 +0000 | [diff] [blame] | 111 | /* Sector Erase 0x20 is supported by Macronix/SST chips. */ |
| 112 | #define JEDEC_SE 0x20 |
| 113 | #define JEDEC_SE_OUTSIZE 0x04 |
| 114 | #define JEDEC_SE_INSIZE 0x00 |
| 115 | |
Nikolay Nikolaev | 579f1e0 | 2013-06-28 21:28:37 +0000 | [diff] [blame] | 116 | /* Page Erase 0xDB */ |
| 117 | #define JEDEC_PE 0xDB |
| 118 | #define JEDEC_PE_OUTSIZE 0x04 |
| 119 | #define JEDEC_PE_INSIZE 0x00 |
| 120 | |
Carl-Daniel Hailfinger | d6cbf76 | 2008-05-13 14:58:23 +0000 | [diff] [blame] | 121 | /* Read Status Register */ |
| 122 | #define JEDEC_RDSR 0x05 |
| 123 | #define JEDEC_RDSR_OUTSIZE 0x01 |
| 124 | #define JEDEC_RDSR_INSIZE 0x01 |
Stefan Tauner | 5e695ab | 2012-05-06 17:03:40 +0000 | [diff] [blame] | 125 | |
| 126 | /* Status Register Bits */ |
| 127 | #define SPI_SR_WIP (0x01 << 0) |
| 128 | #define SPI_SR_WEL (0x01 << 1) |
| 129 | #define SPI_SR_AAI (0x01 << 6) |
Carl-Daniel Hailfinger | d6cbf76 | 2008-05-13 14:58:23 +0000 | [diff] [blame] | 130 | |
Jason Wang | a3f04be | 2008-11-28 21:36:51 +0000 | [diff] [blame] | 131 | /* Write Status Enable */ |
| 132 | #define JEDEC_EWSR 0x50 |
| 133 | #define JEDEC_EWSR_OUTSIZE 0x01 |
| 134 | #define JEDEC_EWSR_INSIZE 0x00 |
| 135 | |
Carl-Daniel Hailfinger | d6cbf76 | 2008-05-13 14:58:23 +0000 | [diff] [blame] | 136 | /* Write Status Register */ |
| 137 | #define JEDEC_WRSR 0x01 |
| 138 | #define JEDEC_WRSR_OUTSIZE 0x02 |
| 139 | #define JEDEC_WRSR_INSIZE 0x00 |
| 140 | |
| 141 | /* Read the memory */ |
| 142 | #define JEDEC_READ 0x03 |
| 143 | #define JEDEC_READ_OUTSIZE 0x04 |
| 144 | /* JEDEC_READ_INSIZE : any length */ |
| 145 | |
| 146 | /* Write memory byte */ |
Carl-Daniel Hailfinger | d99b8d3 | 2010-07-29 16:32:24 +0000 | [diff] [blame] | 147 | #define JEDEC_BYTE_PROGRAM 0x02 |
Carl-Daniel Hailfinger | d6cbf76 | 2008-05-13 14:58:23 +0000 | [diff] [blame] | 148 | #define JEDEC_BYTE_PROGRAM_OUTSIZE 0x05 |
| 149 | #define JEDEC_BYTE_PROGRAM_INSIZE 0x00 |
| 150 | |
Carl-Daniel Hailfinger | 9c62d11 | 2010-06-20 10:41:35 +0000 | [diff] [blame] | 151 | /* Write AAI word (SST25VF080B) */ |
Carl-Daniel Hailfinger | d99b8d3 | 2010-07-29 16:32:24 +0000 | [diff] [blame] | 152 | #define JEDEC_AAI_WORD_PROGRAM 0xad |
| 153 | #define JEDEC_AAI_WORD_PROGRAM_OUTSIZE 0x06 |
| 154 | #define JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE 0x03 |
| 155 | #define JEDEC_AAI_WORD_PROGRAM_INSIZE 0x00 |
Carl-Daniel Hailfinger | 9c62d11 | 2010-06-20 10:41:35 +0000 | [diff] [blame] | 156 | |
Carl-Daniel Hailfinger | 3e9dbea | 2009-05-13 11:40:08 +0000 | [diff] [blame] | 157 | /* Error codes */ |
Carl-Daniel Hailfinger | 5cca01f | 2009-11-24 00:20:03 +0000 | [diff] [blame] | 158 | #define SPI_GENERIC_ERROR -1 |
Carl-Daniel Hailfinger | 3e9dbea | 2009-05-13 11:40:08 +0000 | [diff] [blame] | 159 | #define SPI_INVALID_OPCODE -2 |
| 160 | #define SPI_INVALID_ADDRESS -3 |
Carl-Daniel Hailfinger | 142e30f | 2009-07-14 10:26:56 +0000 | [diff] [blame] | 161 | #define SPI_INVALID_LENGTH -4 |
Carl-Daniel Hailfinger | fd7075a | 2010-07-29 13:09:18 +0000 | [diff] [blame] | 162 | #define SPI_FLASHROM_BUG -5 |
Carl-Daniel Hailfinger | eb0e7fc | 2010-08-18 15:12:43 +0000 | [diff] [blame] | 163 | #define SPI_PROGRAMMER_ERROR -6 |
Carl-Daniel Hailfinger | 3e9dbea | 2009-05-13 11:40:08 +0000 | [diff] [blame] | 164 | |
Carl-Daniel Hailfinger | d6cbf76 | 2008-05-13 14:58:23 +0000 | [diff] [blame] | 165 | #endif /* !__SPI_H__ */ |