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Carl-Daniel Hailfingerbfe5b4a2008-05-13 23:03:12 +00001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2007, 2008 Carl-Daniel Hailfinger
5 * Copyright (C) 2008 Ronald Hoogenboom <ronald@zonnet.nl>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21/*
22 * Contains the ITE IT87* SPI specific routines
23 */
24
25#include <stdio.h>
26#include <pci/pci.h>
27#include <stdint.h>
28#include <string.h>
29#include "flash.h"
30#include "spi.h"
31
32#define ITE_SUPERIO_PORT1 0x2e
33#define ITE_SUPERIO_PORT2 0x4e
34
35
36uint16_t it8716f_flashport = 0;
37/* use fast 33MHz SPI (<>0) or slow 16MHz (0) */
38int fast_spi = 1;
39
40/* Generic Super I/O helper functions */
41uint8_t regval(uint16_t port, uint8_t reg)
42{
43 outb(reg, port);
44 return inb(port + 1);
45}
46
47void regwrite(uint16_t port, uint8_t reg, uint8_t val)
48{
49 outb(reg, port);
50 outb(val, port + 1);
51}
52
53/* Helper functions for most recent ITE IT87xx Super I/O chips */
54#define CHIP_ID_BYTE1_REG 0x20
55#define CHIP_ID_BYTE2_REG 0x21
56static void enter_conf_mode_ite(uint16_t port)
57{
58 outb(0x87, port);
59 outb(0x01, port);
60 outb(0x55, port);
61 if (port == ITE_SUPERIO_PORT1)
62 outb(0x55, port);
63 else
64 outb(0xaa, port);
65}
66
67static void exit_conf_mode_ite(uint16_t port)
68{
69 regwrite(port, 0x02, 0x02);
70}
71
72static uint16_t find_ite_spi_flash_port(uint16_t port)
73{
74 uint8_t tmp = 0;
75 uint16_t id, flashport = 0;
76
77 enter_conf_mode_ite(port);
78
79 id = regval(port, CHIP_ID_BYTE1_REG) << 8;
80 id |= regval(port, CHIP_ID_BYTE2_REG);
81
82 /* TODO: Handle more IT87xx if they support flash translation */
83 if (id == 0x8716) {
84 /* NOLDN, reg 0x24, mask out lowest bit (suspend) */
85 tmp = regval(port, 0x24) & 0xFE;
86 printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
87 0xFFFE0000, 0xFFFFFFFF, (tmp & 1 << 1) ? "en" : "dis");
88 printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
89 0x000E0000, 0x000FFFFF, (tmp & 1 << 1) ? "en" : "dis");
90 printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
91 0xFFEE0000, 0xFFEFFFFF, (tmp & 1 << 2) ? "en" : "dis");
92 printf("Serial flash segment 0x%08x-0x%08x %sabled\n",
93 0xFFF80000, 0xFFFEFFFF, (tmp & 1 << 3) ? "en" : "dis");
94 printf("LPC write to serial flash %sabled\n",
95 (tmp & 1 << 4) ? "en" : "dis");
96 printf("serial flash pin %i\n", (tmp & 1 << 5) ? 87 : 29);
97 /* LDN 0x7, reg 0x64/0x65 */
98 regwrite(port, 0x07, 0x7);
99 flashport = regval(port, 0x64) << 8;
100 flashport |= regval(port, 0x65);
101 }
102 exit_conf_mode_ite(port);
103 return flashport;
104}
105
106int it87xx_probe_spi_flash(const char *name)
107{
108 it8716f_flashport = find_ite_spi_flash_port(ITE_SUPERIO_PORT1);
109 if (!it8716f_flashport)
110 it8716f_flashport = find_ite_spi_flash_port(ITE_SUPERIO_PORT2);
111 return (!it8716f_flashport);
112}
113
114/* The IT8716F only supports commands with length 1,2,4,5 bytes including
115 command byte and can not read more than 3 bytes from the device.
116 This function expects writearr[0] to be the first byte sent to the device,
117 whereas the IT8716F splits commands internally into address and non-address
118 commands with the address in inverse wire order. That's why the register
119 ordering in case 4 and 5 may seem strange. */
120int it8716f_spi_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr)
121{
122 uint8_t busy, writeenc;
123 int i;
124
125 do {
126 busy = inb(it8716f_flashport) & 0x80;
127 } while (busy);
128 if (readcnt > 3) {
129 printf("%s called with unsupported readcnt %i.\n",
130 __FUNCTION__, readcnt);
131 return 1;
132 }
133 switch (writecnt) {
134 case 1:
135 outb(writearr[0], it8716f_flashport + 1);
136 writeenc = 0x0;
137 break;
138 case 2:
139 outb(writearr[0], it8716f_flashport + 1);
140 outb(writearr[1], it8716f_flashport + 7);
141 writeenc = 0x1;
142 break;
143 case 4:
144 outb(writearr[0], it8716f_flashport + 1);
145 outb(writearr[1], it8716f_flashport + 4);
146 outb(writearr[2], it8716f_flashport + 3);
147 outb(writearr[3], it8716f_flashport + 2);
148 writeenc = 0x2;
149 break;
150 case 5:
151 outb(writearr[0], it8716f_flashport + 1);
152 outb(writearr[1], it8716f_flashport + 4);
153 outb(writearr[2], it8716f_flashport + 3);
154 outb(writearr[3], it8716f_flashport + 2);
155 outb(writearr[4], it8716f_flashport + 7);
156 writeenc = 0x3;
157 break;
158 default:
159 printf("%s called with unsupported writecnt %i.\n",
160 __FUNCTION__, writecnt);
161 return 1;
162 }
163 /* Start IO, 33 or 16 MHz, readcnt input bytes, writecnt output bytes.
164 * Note:
165 * We can't use writecnt directly, but have to use a strange encoding.
166 */
167 outb(((0x4 + (fast_spi ? 1 : 0)) << 4) | ((readcnt & 0x3) << 2) | (writeenc), it8716f_flashport);
168
169 if (readcnt > 0) {
170 do {
171 busy = inb(it8716f_flashport) & 0x80;
172 } while (busy);
173
174 for (i = 0; i < readcnt; i++) {
175 readarr[i] = inb(it8716f_flashport + 5 + i);
176 }
177 }
178
179 return 0;
180}
181
182/* Page size is usually 256 bytes */
183void it8716f_spi_page_program(int block, uint8_t *buf, uint8_t *bios) {
184 int i;
185
186 spi_write_enable();
187 outb(0x06 , it8716f_flashport + 1);
188 outb(((2 + (fast_spi ? 1 : 0)) << 4), it8716f_flashport);
189 for (i = 0; i < 256; i++) {
190 bios[256 * block + i] = buf[256 * block + i];
191 }
192 outb(0, it8716f_flashport);
193 /* Wait until the Write-In-Progress bit is cleared.
194 * This usually takes 1-10 ms, so wait in 1 ms steps.
195 */
196 while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
197 usleep(1000);
198}
199
200/*
201 * IT8716F only allows maximum of 512 kb SPI mapped to LPC memory cycles
202 * Program chip using firmware cycle byte programming. (SLOW!)
203 */
204int it8716f_over512k_spi_chip_write(struct flashchip *flash, uint8_t *buf)
205{
206 int total_size = 1024 * flash->total_size;
207 int i;
208 fast_spi = 0;
209
210 spi_disable_blockprotect();
211 for (i = 0; i < total_size; i++) {
212 spi_write_enable();
213 spi_byte_program(i, buf[i]);
214 while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
215 myusec_delay(10);
216 }
217 /* resume normal ops... */
218 outb(0x20, it8716f_flashport);
219 return 0;
220}
221
222/*
223 * IT8716F only allows maximum of 512 kb SPI mapped to LPC memory cycles
224 * Need to read this big flash using firmware cycles 3 byte at a time.
225 */
226int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf)
227{
228 int total_size = 1024 * flash->total_size;
229 int i;
230 fast_spi = 0;
231
232 if (total_size > 512 * 1024) {
233 for (i = 0; i < total_size; i += 3) {
234 int toread = 3;
235 if (total_size - i < toread)
236 toread = total_size - i;
237 spi_nbyte_read(i, buf + i, toread);
238 }
239 } else {
240 memcpy(buf, (const char *)flash->virtual_memory, total_size);
241 }
242 return 0;
243}
244
245int it8716f_spi_chip_write(struct flashchip *flash, uint8_t *buf) {
246 int total_size = 1024 * flash->total_size;
247 int i;
248 if (total_size > 512 * 1024) {
249 it8716f_over512k_spi_chip_write(flash, buf);
250 } else {
251 for (i = 0; i < total_size / 256; i++) {
252 spi_page_program(i, buf, (uint8_t *)flash->virtual_memory);
253 }
254 }
255 return 0;
256}
257