Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 1 | /* |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 2 | * This file is part of the flashrom project. |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 3 | * |
Uwe Hermann | d22a1d4 | 2007-09-09 20:21:05 +0000 | [diff] [blame] | 4 | * Copyright (C) 2000 Silicon Integrated System Corporation |
| 5 | * Copyright (C) 2005 coresystems GmbH <stepan@openbios.org> |
Sean Nelson | 51c83fb | 2010-01-20 20:55:53 +0000 | [diff] [blame] | 6 | * Copyright (C) 2009 Sean Nelson <audiohacked@gmail.com> |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 7 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2 of the License, or |
| 11 | * (at your option) any later version. |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 12 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 17 | * |
Uwe Hermann | d110764 | 2007-08-29 17:52:32 +0000 | [diff] [blame] | 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 21 | */ |
| 22 | |
| 23 | #include "flash.h" |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 24 | |
| 25 | #define AUTO_PG_ERASE1 0x20 |
| 26 | #define AUTO_PG_ERASE2 0xD0 |
Ollie Lho | cf29de8 | 2004-03-18 19:40:07 +0000 | [diff] [blame] | 27 | #define AUTO_PGRM 0x10 |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 28 | #define CHIP_ERASE 0x30 |
| 29 | #define RESET 0xFF |
| 30 | #define READ_ID 0x90 |
| 31 | |
Uwe Hermann | 09e04f7 | 2009-05-16 22:36:00 +0000 | [diff] [blame] | 32 | static void protect_28sf040(chipaddr bios) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 33 | { |
Stefan Reinauer | 9e72aa5 | 2009-09-16 08:18:08 +0000 | [diff] [blame] | 34 | chip_readb(bios + 0x1823); |
| 35 | chip_readb(bios + 0x1820); |
| 36 | chip_readb(bios + 0x1822); |
| 37 | chip_readb(bios + 0x0418); |
| 38 | chip_readb(bios + 0x041B); |
| 39 | chip_readb(bios + 0x0419); |
| 40 | chip_readb(bios + 0x040A); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 41 | } |
| 42 | |
Uwe Hermann | 09e04f7 | 2009-05-16 22:36:00 +0000 | [diff] [blame] | 43 | static void unprotect_28sf040(chipaddr bios) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 44 | { |
Stefan Reinauer | 9e72aa5 | 2009-09-16 08:18:08 +0000 | [diff] [blame] | 45 | chip_readb(bios + 0x1823); |
| 46 | chip_readb(bios + 0x1820); |
| 47 | chip_readb(bios + 0x1822); |
| 48 | chip_readb(bios + 0x0418); |
| 49 | chip_readb(bios + 0x041B); |
| 50 | chip_readb(bios + 0x0419); |
| 51 | chip_readb(bios + 0x041A); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 52 | } |
| 53 | |
Sean Nelson | 51c83fb | 2010-01-20 20:55:53 +0000 | [diff] [blame] | 54 | int erase_sector_28sf040(struct flashchip *flash, unsigned int address, unsigned int sector_size) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 55 | { |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 56 | chipaddr bios = flash->virtual_memory; |
| 57 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 58 | chip_writeb(AUTO_PG_ERASE1, bios); |
| 59 | chip_writeb(AUTO_PG_ERASE2, bios + address); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 60 | |
| 61 | /* wait for Toggle bit ready */ |
| 62 | toggle_ready_jedec(bios); |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 63 | |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 64 | if (check_erased_range(flash, address, sector_size)) { |
| 65 | fprintf(stderr, "ERASE FAILED!\n"); |
| 66 | return -1; |
| 67 | } |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 68 | return 0; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 69 | } |
| 70 | |
Sean Nelson | 51c83fb | 2010-01-20 20:55:53 +0000 | [diff] [blame] | 71 | int write_sector_28sf040(chipaddr bios, uint8_t *src, chipaddr dst, |
Uwe Hermann | 09e04f7 | 2009-05-16 22:36:00 +0000 | [diff] [blame] | 72 | unsigned int page_size) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 73 | { |
| 74 | int i; |
| 75 | |
| 76 | for (i = 0; i < page_size; i++) { |
| 77 | /* transfer data from source to destination */ |
| 78 | if (*src == 0xFF) { |
| 79 | dst++, src++; |
| 80 | /* If the data is 0xFF, don't program it */ |
| 81 | continue; |
| 82 | } |
| 83 | /*issue AUTO PROGRAM command */ |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 84 | chip_writeb(AUTO_PGRM, dst); |
| 85 | chip_writeb(*src++, dst++); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 86 | |
| 87 | /* wait for Toggle bit ready */ |
| 88 | toggle_ready_jedec(bios); |
| 89 | } |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 90 | |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 91 | return 0; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 92 | } |
| 93 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 94 | int probe_28sf040(struct flashchip *flash) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 95 | { |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 96 | chipaddr bios = flash->virtual_memory; |
Ed Swierk | 966dc20 | 2007-08-13 04:10:32 +0000 | [diff] [blame] | 97 | uint8_t id1, id2; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 98 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 99 | chip_writeb(RESET, bios); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 100 | programmer_delay(10); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 101 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 102 | chip_writeb(READ_ID, bios); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 103 | programmer_delay(10); |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 104 | id1 = chip_readb(bios); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 105 | programmer_delay(10); |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 106 | id2 = chip_readb(bios + 0x01); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 107 | |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 108 | chip_writeb(RESET, bios); |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 109 | programmer_delay(10); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 110 | |
Uwe Hermann | 04aa59a | 2009-09-02 22:09:00 +0000 | [diff] [blame] | 111 | printf_debug("%s: id1 0x%02x, id2 0x%02x\n", __func__, id1, id2); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 112 | if (id1 == flash->manufacture_id && id2 == flash->model_id) |
| 113 | return 1; |
| 114 | |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 115 | return 0; |
| 116 | } |
| 117 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 118 | int erase_28sf040(struct flashchip *flash) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 119 | { |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 120 | chipaddr bios = flash->virtual_memory; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 121 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 122 | unprotect_28sf040(bios); |
Carl-Daniel Hailfinger | 0472f3d | 2009-03-06 22:26:00 +0000 | [diff] [blame] | 123 | chip_writeb(CHIP_ERASE, bios); |
| 124 | chip_writeb(CHIP_ERASE, bios); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 125 | protect_28sf040(bios); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 126 | |
Carl-Daniel Hailfinger | ca8bfc6 | 2009-06-05 17:48:08 +0000 | [diff] [blame] | 127 | programmer_delay(10); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 128 | toggle_ready_jedec(bios); |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 129 | |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 130 | if (check_erased_range(flash, 0, flash->total_size * 1024)) { |
| 131 | fprintf(stderr, "ERASE FAILED!\n"); |
| 132 | return -1; |
| 133 | } |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 134 | return 0; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 135 | } |
| 136 | |
Ollie Lho | 184a404 | 2005-11-26 21:55:36 +0000 | [diff] [blame] | 137 | int write_28sf040(struct flashchip *flash, uint8_t *buf) |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 138 | { |
| 139 | int i; |
Uwe Hermann | a7e0548 | 2007-05-09 10:17:44 +0000 | [diff] [blame] | 140 | int total_size = flash->total_size * 1024; |
| 141 | int page_size = flash->page_size; |
Carl-Daniel Hailfinger | 5820f42 | 2009-05-16 21:22:56 +0000 | [diff] [blame] | 142 | chipaddr bios = flash->virtual_memory; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 143 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 144 | unprotect_28sf040(bios); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 145 | |
Uwe Hermann | a502dce | 2007-10-17 23:55:15 +0000 | [diff] [blame] | 146 | printf("Programming page: "); |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 147 | for (i = 0; i < total_size / page_size; i++) { |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 148 | /* erase the page before programming */ |
Carl-Daniel Hailfinger | 30f7cb2 | 2009-06-15 17:23:36 +0000 | [diff] [blame] | 149 | if (erase_sector_28sf040(flash, i * page_size, page_size)) { |
| 150 | fprintf(stderr, "ERASE FAILED!\n"); |
| 151 | return -1; |
| 152 | } |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 153 | |
| 154 | /* write to the sector */ |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 155 | printf("%04d at address: 0x%08x", i, i * page_size); |
| 156 | write_sector_28sf040(bios, buf + i * page_size, |
| 157 | bios + i * page_size, page_size); |
Ollie Lho | 8b8897a | 2004-03-27 00:18:15 +0000 | [diff] [blame] | 158 | printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b"); |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 159 | } |
| 160 | printf("\n"); |
| 161 | |
Ollie Lho | 761bf1b | 2004-03-20 16:46:10 +0000 | [diff] [blame] | 162 | protect_28sf040(bios); |
Ronald G. Minnich | eaab50b | 2003-09-12 22:41:53 +0000 | [diff] [blame] | 163 | |
Uwe Hermann | ffec5f3 | 2007-08-23 16:08:21 +0000 | [diff] [blame] | 164 | return 0; |
Ronald G. Minnich | 5e5f75e | 2002-01-29 18:21:41 +0000 | [diff] [blame] | 165 | } |
Sean Nelson | 51c83fb | 2010-01-20 20:55:53 +0000 | [diff] [blame] | 166 | |
| 167 | int erase_chip_28sf040(struct flashchip *flash, unsigned int addr, unsigned int blocklen) |
| 168 | { |
| 169 | if ((addr != 0) || (blocklen != flash->total_size * 1024)) { |
| 170 | fprintf(stderr, "%s called with incorrect arguments\n", |
| 171 | __func__); |
| 172 | return -1; |
| 173 | } |
| 174 | return erase_28sf040(flash); |
| 175 | } |