Remove hardcoded wait from SPI write/erase routines and check the chip status register instead

This has been tested by Harald Gutmann <harald.gutmann@gmx.net> with a
MX25L4005 chip.

Corresponding to flashrom svn r154 and coreboot v2 svn r2876.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
1 file changed