tree bb7b8be5e2fc7ac08411963e830c360a8a299355
parent 67808fe9ca2ea2300838333e7090eed2e24a2e4f
author Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> 1192730202 +0000
committer Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> 1192730202 +0000

Remove hardcoded wait from SPI write/erase routines and check the chip status register instead

This has been tested by Harald Gutmann <harald.gutmann@gmx.net> with a
MX25L4005 chip.

Corresponding to flashrom svn r154 and coreboot v2 svn r2876.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>