)]}'
{
  "commit": "145acec2a345a229afc33bc6ab80cf7d82eb7f95",
  "tree": "bb7b8be5e2fc7ac08411963e830c360a8a299355",
  "parents": [
    "67808fe9ca2ea2300838333e7090eed2e24a2e4f"
  ],
  "author": {
    "name": "Carl-Daniel Hailfinger",
    "email": "c-d.hailfinger.devel.2006@gmx.net",
    "time": "Thu Oct 18 17:56:42 2007 +0000"
  },
  "committer": {
    "name": "Carl-Daniel Hailfinger",
    "email": "c-d.hailfinger.devel.2006@gmx.net",
    "time": "Thu Oct 18 17:56:42 2007 +0000"
  },
  "message": "Remove hardcoded wait from SPI write/erase routines and check the chip status register instead\n\nThis has been tested by Harald Gutmann \u003charald.gutmann@gmx.net\u003e with a\nMX25L4005 chip.\n\nCorresponding to flashrom svn r154 and coreboot v2 svn r2876.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Stefan Reinauer \u003cstepan@coresystems.de\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "7e61b1a14eddb0943e9f1bb95f7c8b85fd81e778",
      "old_mode": 33188,
      "old_path": "spi.c",
      "new_id": "26c0d4a023b6ffa2a35cebe763625ead5de1bf94",
      "new_mode": 33188,
      "new_path": "spi.c"
    }
  ]
}