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Nico Huber83693c82016-10-08 22:17:55 +02001--
Nico Huberaf9cc9e2017-01-09 13:11:32 +01002-- Copyright (C) 2015-2017 secunet Security Networks AG
Nico Huber83693c82016-10-08 22:17:55 +02003--
4-- This program is free software; you can redistribute it and/or modify
5-- it under the terms of the GNU General Public License as published by
Nico Huber125a29e2016-10-18 00:23:54 +02006-- the Free Software Foundation; either version 2 of the License, or
7-- (at your option) any later version.
Nico Huber83693c82016-10-08 22:17:55 +02008--
9-- This program is distributed in the hope that it will be useful,
10-- but WITHOUT ANY WARRANTY; without even the implied warranty of
11-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12-- GNU General Public License for more details.
13--
14
15with Ada.Unchecked_Conversion;
16
17with HW.Debug;
18with GNAT.Source_Info;
19
20with HW.GFX.DP_Defs;
21
22use type HW.Word8;
23
24package body HW.GFX.DP_Info is
25
26 procedure Read_Caps
27 (Link : in out DP_Link;
28 Port : in T;
29 Success : out Boolean)
30 is
31 Data : DP_Defs.Aux_Payload;
32 Length : DP_Defs.Aux_Payload_Length;
33
34 Caps_Size : constant := 15;
35 begin
36 pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
37
38 Length := Caps_Size;
39 Aux_Ch.Aux_Read
40 (Port => Port,
41 Address => 16#00000#,
42 Length => Length,
43 Data => Data,
44 Success => Success);
45 Success := Success and Length = Caps_Size;
46
47 if Length = Caps_Size then
48 Link.Receiver_Caps.Rev := Data (0);
49 case Data (1) is
50 when 16#06# =>
51 Link.Receiver_Caps.Max_Link_Rate := DP_Bandwidth_1_62;
52 when 16#0a# =>
53 Link.Receiver_Caps.Max_Link_Rate := DP_Bandwidth_2_7;
54 when 16#14# =>
55 Link.Receiver_Caps.Max_Link_Rate := DP_Bandwidth_5_4;
56 when others =>
57 if Data (1) > 16#14# then
58 Link.Receiver_Caps.Max_Link_Rate := DP_Bandwidth_5_4;
59 else
60 Link.Receiver_Caps.Max_Link_Rate := DP_Bandwidth_1_62;
61 end if;
62 end case;
63 case Data (2) and 16#1f# is
64 when 0 | 1 =>
65 Link.Receiver_Caps.Max_Lane_Count := DP_Lane_Count_1;
66 when 2 | 3 =>
67 Link.Receiver_Caps.Max_Lane_Count := DP_Lane_Count_2;
68 when others =>
69 Link.Receiver_Caps.Max_Lane_Count := DP_Lane_Count_4;
70 end case;
71 Link.Receiver_Caps.TPS3_Supported := (Data (2) and 16#40#) /= 0;
72 Link.Receiver_Caps.Enhanced_Framing := (Data (2) and 16#80#) /= 0;
73 Link.Receiver_Caps.No_Aux_Handshake := (Data (3) and 16#40#) /= 0;
74 Link.Receiver_Caps.Aux_RD_Interval := Data (14);
75
76 pragma Debug (Debug.New_Line);
77 pragma Debug (Debug.Put_Line ("DPCD:"));
78 pragma Debug (Debug.Put_Reg8 (" Rev ", Data (0)));
79 pragma Debug (Debug.Put_Reg8 (" Max_Link_Rate ", Data (1)));
80 pragma Debug (Debug.Put_Reg8 (" Max_Lane_Count ", Data (2) and 16#1f#));
81 pragma Debug (Debug.Put_Reg8 (" TPS3_Supported ", Data (2) and 16#40#));
82 pragma Debug (Debug.Put_Reg8 (" Enhanced_Framing", Data (2) and 16#80#));
83 pragma Debug (Debug.Put_Reg8 (" No_Aux_Handshake", Data (3) and 16#40#));
84 pragma Debug (Debug.Put_Reg8 (" Aux_RD_Interval ", Data (14)));
85 pragma Debug (Debug.New_Line);
86 end if;
87 end Read_Caps;
88
89 procedure Minimum_Lane_Count
90 (Link : in out DP_Link;
91 Mode : in Mode_Type;
92 Success : out Boolean)
93 with
94 Depends => ((Link, Success) => (Link, Mode))
95 is
96 function Link_Pixel_Per_Second
97 (Link_Rate : DP_Bandwidth)
98 return Positive
99 with
100 Post => Pos64 (Link_Pixel_Per_Second'Result) <=
101 ((DP_Symbol_Rate_Type'Last * 8) / 3) / BPC_Type'First
102 is
103 begin
104 -- Link_Rate is brutto with 8/10 bit symbols; three colors
105 pragma Assert (Positive (DP_Symbol_Rate (Link_Rate)) <= (Positive'Last / 8) * 3);
106 pragma Assert ((Int64 (DP_Symbol_Rate (Link_Rate)) * 8) / 3
107 >= Int64 (BPC_Type'Last));
108 return Positive
109 (((Int64 (DP_Symbol_Rate (Link_Rate)) * 8) / 3)
110 / Int64 (Mode.BPC));
111 end Link_Pixel_Per_Second;
112
113 Count : Natural;
114 begin
115 Count := Link_Pixel_Per_Second (Link.Bandwidth);
116 Count := (Positive (Mode.Dotclock) + Count - 1) / Count;
117
118 Success := True;
119 case Count is
120 when 1 => Link.Lane_Count := DP_Lane_Count_1;
121 when 2 => Link.Lane_Count := DP_Lane_Count_2;
122 when 3 | 4 => Link.Lane_Count := DP_Lane_Count_4;
123 when others => Success := False;
124 end case;
125 end Minimum_Lane_Count;
126
127 procedure Preferred_Link_Setting
128 (Link : in out DP_Link;
129 Mode : in Mode_Type;
130 Success : out Boolean)
131 is
132 begin
133 Link.Bandwidth := Link.Receiver_Caps.Max_Link_Rate;
134 Link.Enhanced_Framing := Link.Receiver_Caps.Enhanced_Framing;
135
136 Minimum_Lane_Count (Link, Mode, Success);
137
138 Success := Success and
139 Link.Lane_Count <= Link.Receiver_Caps.Max_Lane_Count;
140
Nico Huber83693c82016-10-08 22:17:55 +0200141 pragma Debug (not Success, Debug.Put_Line
142 ("Mode requirements exceed available bandwidth!"));
143 end Preferred_Link_Setting;
144
145 procedure Next_Link_Setting
146 (Link : in out DP_Link;
147 Mode : in Mode_Type;
148 Success : out Boolean)
149 is
150 begin
151 if Link.Bandwidth > DP_Bandwidth'First then
152 Link.Bandwidth := DP_Bandwidth'Pred (Link.Bandwidth);
153
154 Minimum_Lane_Count (Link, Mode, Success);
155
156 Success := Success and
157 Link.Lane_Count <= Link.Receiver_Caps.Max_Lane_Count;
158 else
159 Success := False;
160 end if;
Nico Huber83693c82016-10-08 22:17:55 +0200161 end Next_Link_Setting;
162
Nico Huberaf9cc9e2017-01-09 13:11:32 +0100163 procedure Dump_Link_Setting (Link : DP_Link)
164 is
165 begin
166 Debug.Put ("Trying DP settings: Symbol Rate = ");
167 Debug.Put_Int32 (Int32 (DP_Symbol_Rate (Link.Bandwidth)));
168 Debug.Put ("; Lane Count = ");
169 Debug.Put_Int32 (Int32 (Lane_Count_As_Integer (Link.Lane_Count)));
170 Debug.New_Line;
171 Debug.New_Line;
172 end Dump_Link_Setting;
173
Nico Huber83693c82016-10-08 22:17:55 +0200174 ----------------------------------------------------------------------------
175
176 procedure Calculate_M_N
177 (Link : in DP_Link;
178 Mode : in Mode_Type;
179 Data_M : out M_Type;
180 Data_N : out N_Type;
181 Link_M : out M_Type;
182 Link_N : out N_Type)
183 is
184 DATA_N_MAX : constant := 16#800000#;
185 LINK_N_MAX : constant := 16#100000#;
186
187 subtype Calc_M_Type is Int64 range 0 .. 2 ** 36;
188 subtype Calc_N_Type is Int64 range 0 .. 2 ** 36;
189 subtype N_Rounded_Type is Int64 range
190 0 .. Int64'Max (DATA_N_MAX, LINK_N_MAX);
191
192 M : Calc_M_Type;
193 N : Calc_N_Type;
194
195 procedure Cancel_M_N
196 (M : in out Calc_M_Type;
197 N : in out Calc_N_Type;
198 N_Max : in N_Rounded_Type)
199 with
200 Depends => ((M, N) => (M, N, N_max)),
201 Pre => (N > 0 and M in 0 .. Calc_M_Type'Last / 2),
202 Post => (M <= M_N_Max and N <= M_N_Max)
203 is
204 Orig_N : constant Calc_N_Type := N;
205
206 function Round_N (N : Calc_N_Type) return N_Rounded_Type
207 with
208 Post => (Round_N'Result <= N * 2)
209 is
210 RN : Calc_N_Type;
211 RN2 : Calc_N_Type := N_Max;
212 begin
213 loop
214 RN := RN2;
215 RN2 := RN2 / 2;
216 exit when RN2 < N;
217 pragma Loop_Invariant (RN2 = RN / 2 and RN2 in N .. N_Max);
218 end loop;
219 return RN;
220 end Round_N;
221 begin
222 N := Round_N (N);
223
224 -- The automatic provers need a little nudge here.
225 pragma Assert
226 (if M <= Calc_M_Type'Last/2 and
227 N <= Orig_N * 2 and
228 Orig_N > 0 and
229 M > 0
230 then
231 M * N / Orig_N <= Calc_M_Type'Last);
232
233 pragma Annotate (GNATprove, False_Positive,
234 "assertion might fail",
235 "The property cannot be proven automatically. An Isabelle proof is included as an axiom");
236
237 M := M * N / Orig_N;
238
239 -- This loop is never hit for sane values (i.e. M <= N) but
240 -- we have to make sure returned values are always in range.
241 while M > M_N_Max loop
242 pragma Loop_Invariant (N <= M_N_Max);
243 M := M / 2;
244 N := N / 2;
245 end loop;
246 end Cancel_M_N;
247 begin
248 pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
249
250 pragma Assert (3
251 * Mode.BPC
252 * Mode.Dotclock
253 in Pos64);
254 M := 3
255 * Mode.BPC
256 * Mode.Dotclock;
257
258 pragma Assert (8
259 * DP_Symbol_Rate (Link.Bandwidth)
260 * Lane_Count_As_Integer (Link.Lane_Count)
261 in Pos64);
262 N := 8
263 * DP_Symbol_Rate (Link.Bandwidth)
264 * Lane_Count_As_Integer (Link.Lane_Count);
265
266 Cancel_M_N (M, N, DATA_N_MAX);
267 Data_M := M;
268 Data_N := N;
269
270 -------------------------------------------------------------------
271
272 M := Pos64 (Mode.Dotclock);
273 N := Pos64 (DP_Symbol_Rate (Link.Bandwidth));
274
275 Cancel_M_N (M, N, LINK_N_MAX);
276 Link_M := M;
277 Link_N := N;
278 end Calculate_M_N;
279
280 ----------------------------------------------------------------------------
281
282 procedure Read_Link_Status
283 (Port : in T;
284 Status : out Link_Status;
285 Success : out Boolean)
286 is
287 subtype Status_Index is DP_Defs.Aux_Payload_Index range 0 .. 5;
288 subtype Status_Buffer is Buffer (Status_Index);
289 function Buffer_As_Status is new Ada.Unchecked_Conversion
290 (Source => Status_Buffer, Target => Link_Status);
291
292 Data : DP_Defs.Aux_Payload;
293 Length : DP_Defs.Aux_Payload_Length;
294 begin
295 pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
296
297 Length := Status_Index'Last + 1;
298 Aux_Ch.Aux_Read
299 (Port => Port,
300 Address => 16#00202#,
301 Length => Length,
302 Data => Data,
303 Success => Success);
304 Success := Success and Length = Status_Index'Last + 1;
305 Status := Buffer_As_Status (Data (Status_Index));
306 end Read_Link_Status;
307
308 function All_CR_Done
309 (Status : Link_Status;
310 Link : DP_Link)
311 return Boolean
312 is
313 CR_Done : Boolean := True;
314 begin
315 for Lane in Lane_Index
316 range 0 .. Lane_Index (Lane_Count_As_Integer (Link.Lane_Count) - 1)
317 loop
318 CR_Done := CR_Done and Status.Lanes (Lane).CR_Done;
319 end loop;
320 return CR_Done;
321 end All_CR_Done;
322
323 function All_EQ_Done
324 (Status : Link_Status;
325 Link : DP_Link)
326 return Boolean
327 is
328 EQ_Done : Boolean := True;
329 begin
330 for Lane in Lane_Index
331 range 0 .. Lane_Index (Lane_Count_As_Integer (Link.Lane_Count) - 1)
332 loop
333 EQ_Done := EQ_Done and Status.Lanes (Lane).CR_Done
334 and Status.Lanes (Lane).Channel_EQ_Done
335 and Status.Lanes (Lane).Symbol_Locked;
336 end loop;
337 return EQ_Done and Status.Interlane_Align_Done;
338 end All_EQ_Done;
339
340 function Max_Requested_VS
341 (Status : Link_Status;
342 Link : DP_Link)
343 return DP_Voltage_Swing
344 is
345 VS : DP_Voltage_Swing := DP_Voltage_Swing'First;
346 begin
347 for Lane in Lane_Index
348 range 0 .. Lane_Index (Lane_Count_As_Integer (Link.Lane_Count) - 1)
349 loop
350 if Status.Adjust_Requests (Lane).Voltage_Swing > VS then
351 VS := Status.Adjust_Requests (Lane).Voltage_Swing;
352 end if;
353 end loop;
354 return VS;
355 end Max_Requested_VS;
356
357 function Max_Requested_Emph
358 (Status : Link_Status;
359 Link : DP_Link)
360 return DP_Pre_Emph
361 is
362 Emph : DP_Pre_Emph := DP_Pre_Emph'First;
363 begin
364 for Lane in Lane_Index
365 range 0 .. Lane_Index (Lane_Count_As_Integer (Link.Lane_Count) - 1)
366 loop
367 if Status.Adjust_Requests (Lane).Pre_Emph > Emph then
368 Emph := Status.Adjust_Requests (Lane).Pre_Emph;
369 end if;
370 end loop;
371 return Emph;
372 end Max_Requested_Emph;
373
374end HW.GFX.DP_Info;