gma: Add a flag to use GMCH transcoder registers
Change-Id: Ic9bff918bdcab3c5c55316cb6de1a8a8bf1c6430
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/25406
Reviewed-by: Nico Huber <nico.h@gmx.de>
diff --git a/common/hw-gfx-gma-config.ads.template b/common/hw-gfx-gma-config.ads.template
index b38201e..a0f3eed 100644
--- a/common/hw-gfx-gma-config.ads.template
+++ b/common/hw-gfx-gma-config.ads.template
@@ -57,6 +57,7 @@
Has_PF_Pipe_Select : constant Boolean := CPU in Ivybridge .. Haswell;
VGA_Plane_Workaround : constant Boolean := CPU = Ivybridge;
Has_GMCH_VGACNTRL : constant Boolean := false;
+ Has_GMCH_DP_Transcoder : constant Boolean := false;
----- Panel power: -----
Has_PP_Write_Protection : constant Boolean := CPU <= Ivybridge;
diff --git a/common/hw-gfx-gma-registers.ads b/common/hw-gfx-gma-registers.ads
index 37e62e8..40d3437 100644
--- a/common/hw-gfx-gma-registers.ads
+++ b/common/hw-gfx-gma-registers.ads
@@ -436,6 +436,10 @@
PIPEACONF,
PIPEAMISC,
PIPE_FRMCNT_A,
+ PIPEA_GMCH_DATA_M,
+ PIPEA_GMCH_DATA_N,
+ PIPEA_GMCH_LINK_M,
+ PIPEA_GMCH_LINK_N,
DSPACNTR,
DSPALINOFF,
DSPASTRIDE,
@@ -457,6 +461,10 @@
PIPEBCONF,
PIPEBMISC,
PIPE_FRMCNT_B,
+ PIPEB_GMCH_DATA_M,
+ PIPEB_GMCH_DATA_N,
+ PIPEB_GMCH_LINK_M,
+ PIPEB_GMCH_LINK_N,
DSPBCNTR,
DSPBLINOFF,
DSPBSTRIDE,
@@ -707,6 +715,10 @@
PIPEA_DATA_N1 => 16#06_0034# / Register_Width,
PIPEA_LINK_M1 => 16#06_0040# / Register_Width,
PIPEA_LINK_N1 => 16#06_0044# / Register_Width,
+ PIPEA_GMCH_DATA_M => 16#07_0050# / Register_Width,
+ PIPEA_GMCH_DATA_N => 16#07_0054# / Register_Width,
+ PIPEA_GMCH_LINK_M => 16#07_0060# / Register_Width,
+ PIPEA_GMCH_LINK_N => 16#07_0064# / Register_Width,
PIPEA_DDI_FUNC_CTL => 16#06_0400# / Register_Width,
PIPEA_MSA_MISC => 16#06_0410# / Register_Width,
@@ -798,6 +810,10 @@
PIPEB_DATA_N1 => 16#06_1034# / Register_Width,
PIPEB_LINK_M1 => 16#06_1040# / Register_Width,
PIPEB_LINK_N1 => 16#06_1044# / Register_Width,
+ PIPEB_GMCH_DATA_M => 16#07_1050# / Register_Width,
+ PIPEB_GMCH_DATA_N => 16#07_1054# / Register_Width,
+ PIPEB_GMCH_LINK_M => 16#07_1060# / Register_Width,
+ PIPEB_GMCH_LINK_N => 16#07_1064# / Register_Width,
PIPEB_DDI_FUNC_CTL => 16#06_1400# / Register_Width,
PIPEB_MSA_MISC => 16#06_1410# / Register_Width,
diff --git a/common/hw-gfx-gma-transcoder.adb b/common/hw-gfx-gma-transcoder.adb
index 91ef6b6..5990fcf 100644
--- a/common/hw-gfx-gma-transcoder.adb
+++ b/common/hw-gfx-gma-transcoder.adb
@@ -15,7 +15,6 @@
with HW.Debug;
with GNAT.Source_Info;
-with HW.GFX.GMA.Config;
with HW.GFX.GMA.DP_Info;
package body HW.GFX.GMA.Transcoder is
diff --git a/common/hw-gfx-gma-transcoder.ads b/common/hw-gfx-gma-transcoder.ads
index aa67eb4..79be8f7 100644
--- a/common/hw-gfx-gma-transcoder.ads
+++ b/common/hw-gfx-gma-transcoder.ads
@@ -13,6 +13,7 @@
--
with HW.GFX.GMA.Registers;
+with HW.GFX.GMA.Config;
private package HW.GFX.GMA.Transcoder
is
@@ -49,6 +50,35 @@
type Transcoder_Array is array (Transcoder_Index) of Transcoder_Regs;
+ PIPE_DATA_M1 : constant array (0 .. 1) of Registers.Registers_Index :=
+ (if Config.Has_GMCH_DP_Transcoder then
+ (0 => Registers.PIPEA_GMCH_DATA_M,
+ 1 => Registers.PIPEB_GMCH_DATA_M)
+ else
+ (0 => Registers.PIPEA_DATA_M1,
+ 1 => Registers.PIPEB_DATA_M1));
+ PIPE_DATA_N1 : constant array (0 .. 1) of Registers.Registers_Index :=
+ (if Config.Has_GMCH_DP_Transcoder then
+ (0 => Registers.PIPEA_GMCH_DATA_N,
+ 1 => Registers.PIPEB_GMCH_DATA_N)
+ else
+ (0 => Registers.PIPEA_DATA_N1,
+ 1 => Registers.PIPEB_DATA_N1));
+ PIPE_LINK_M1 : constant array (0 .. 1) of Registers.Registers_Index :=
+ (if Config.Has_GMCH_DP_Transcoder then
+ (0 => Registers.PIPEA_GMCH_LINK_M,
+ 1 => Registers.PIPEB_GMCH_LINK_M)
+ else
+ (0 => Registers.PIPEA_LINK_M1,
+ 1 => Registers.PIPEB_LINK_M1));
+ PIPE_LINK_N1 : constant array (0 .. 1) of Registers.Registers_Index :=
+ (if Config.Has_GMCH_DP_Transcoder then
+ (0 => Registers.PIPEA_GMCH_LINK_N,
+ 1 => Registers.PIPEB_GMCH_LINK_N)
+ else
+ (0 => Registers.PIPEA_LINK_N1,
+ 1 => Registers.PIPEB_LINK_N1));
+
Transcoders : constant Transcoder_Array :=
(Trans_EDP =>
(HTOTAL => Registers.HTOTAL_EDP,
@@ -73,10 +103,10 @@
VBLANK => Registers.VBLANK_A,
VSYNC => Registers.VSYNC_A,
CONF => Registers.PIPEACONF,
- DATA_M1 => Registers.PIPEA_DATA_M1,
- DATA_N1 => Registers.PIPEA_DATA_N1,
- LINK_M1 => Registers.PIPEA_LINK_M1,
- LINK_N1 => Registers.PIPEA_LINK_N1,
+ DATA_M1 => PIPE_DATA_M1 (0),
+ DATA_N1 => PIPE_DATA_N1 (0),
+ LINK_M1 => PIPE_LINK_M1 (0),
+ LINK_N1 => PIPE_LINK_N1 (0),
DDI_FUNC_CTL => Registers.PIPEA_DDI_FUNC_CTL,
MSA_MISC => Registers.PIPEA_MSA_MISC,
CLK_SEL => Registers.TRANSA_CLK_SEL),
@@ -88,10 +118,10 @@
VBLANK => Registers.VBLANK_B,
VSYNC => Registers.VSYNC_B,
CONF => Registers.PIPEBCONF,
- DATA_M1 => Registers.PIPEB_DATA_M1,
- DATA_N1 => Registers.PIPEB_DATA_N1,
- LINK_M1 => Registers.PIPEB_LINK_M1,
- LINK_N1 => Registers.PIPEB_LINK_N1,
+ DATA_M1 => PIPE_DATA_M1 (1),
+ DATA_N1 => PIPE_DATA_N1 (1),
+ LINK_M1 => PIPE_LINK_M1 (1),
+ LINK_N1 => PIPE_LINK_N1 (1),
DDI_FUNC_CTL => Registers.PIPEB_DDI_FUNC_CTL,
MSA_MISC => Registers.PIPEB_MSA_MISC,
CLK_SEL => Registers.TRANSB_CLK_SEL),