gma: Begin Tiger Lake (TGL) integration
Tiger Lake's integrated graphics engine is built off an entirely new
igfx architecture named "Iris Xe". This patch adds just enough support
to compile for Tiger Lake. Fortunately, the backlight programming
hasn't changed since SKL, so with a little bit of hacking, one can
also have libgfxinit turn on the backlight to verify something is
working and running.
The first pass through the support will focus mostly on the eDP panel,
then Type-C ports (both in fixed/native mode [DP/HDMI] and in Type-C
DP Alt Mode). TBT will not be mostly ignored in this first pass, as
it is not as widely used (yet?) as the other protocols.
This patch includes changes to fix ironlake gnatprove errors caused by
the new PCH_HDMI_A port definition.
Tested on google/voxel, with DEBUG_ADA_CODE enabled.
Tested on google/skolas, with DEBUG_ADA_CODE enabled.
This patch leaves the following unresolved gnatprove errors:
- hw-gfx-gma-port_detect.ads:17:14:
warning: subprogram "Initialize" has no effect
- hw-gfx-gma-port_detect.ads:20:07:
warning: unused variable "Port"
- hw-gfx-gma-port_detect.ads:23:14:
warning: subprogram "Clear_Hotplug_Detect" has no effect
- hw-gfx-gma-connectors.ads:39:14:
warning: subprogram "Post_Off" has no effect
- hw-gfx-gma-connectors.ads:42:14:
warning: subprogram "Post_All_Off" has no effect
These errors will by addressed by the proper implementation of these
procedures.
Change-Id: I84f15837856ecc5ec8df18b39d3989885cd550d4
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/libgfxinit/+/70887
Tested-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-by: Nico Huber <nico.h@gmx.de>
diff --git a/common/Makefile.inc b/common/Makefile.inc
index 7dda011..906e1cd 100644
--- a/common/Makefile.inc
+++ b/common/Makefile.inc
@@ -62,13 +62,14 @@
CONFIG_GFX_GMA_ANALOG_I2C_PORT := $(call strip_quotes,$(CONFIG_GFX_GMA_ANALOG_I2C_PORT))
CONFIG_GFX_GMA_IGNORE_PRESENCE_STRAPS := $(if $(filter y,$(CONFIG_GFX_GMA_IGNORE_PRESENCE_STRAPS)),True,False)
-_GEN_TLA_SUBSTITUTIONS := g45 ilk hsw skl
+_GEN_TLA_SUBSTITUTIONS := g45 ilk hsw skl tgl
_GEN_NONCONST := $(strip \
$(if $(filter G45,$(CONFIG_GFX_GMA_GENERATION)),g45, \
$(if $(filter Ironlake,$(CONFIG_GFX_GMA_GENERATION)),ilk, \
$(if $(filter Haswell,$(CONFIG_GFX_GMA_GENERATION)),hsw, \
- $(if $(filter Skylake,$(CONFIG_GFX_GMA_GENERATION)),skl)))))
+ $(if $(filter Skylake,$(CONFIG_GFX_GMA_GENERATION)),skl, \
+ $(if $(filter Tigerlake,$(CONFIG_GFX_GMA_GENERATION)),tgl))))))
# GNATprove (GPL 2017) doesn't realize when a boolean expression
# that depends both on static values and variables can be evalu-
# ated at compile time (e.g. `False and then Variable` is always
@@ -130,4 +131,6 @@
subdirs-y += haswell_shared broxton
else ifneq ($(filter Skylake,$(CONFIG_GFX_GMA_GENERATION)),)
subdirs-y += haswell_shared skylake
+else ifneq ($(filter Tigerlake,$(CONFIG_GFX_GMA_GENERATION)),)
+subdirs-y += tigerlake
endif
diff --git a/common/hw-gfx-gma-config.ads.template b/common/hw-gfx-gma-config.ads.template
index 66dea02..6aa242e 100644
--- a/common/hw-gfx-gma-config.ads.template
+++ b/common/hw-gfx-gma-config.ads.template
@@ -22,18 +22,20 @@
when Ironlake => Ironlake,
when Haswell => Haswell,
when Broxton => Broxton,
- when Skylake => Skylake);
+ when Skylake => Skylake,
+ when Tigerlake => Tigerlake);
CPU_Last : constant CPU_Type :=
(case Gen is
when G45 => GM45,
when Ironlake => Ivybridge,
when Haswell => Broadwell,
when Broxton => Broxton,
- when Skylake => Kabylake);
+ when Skylake => Kabylake,
+ when Tigerlake => Tigerlake);
CPU_Var_Last : constant CPU_Variant :=
(case Gen is
- when Haswell | Skylake => ULX,
- when others => Normal);
+ when Haswell | Skylake | Tigerlake => ULX,
+ when others => Normal);
subtype Gen_CPU_Type is CPU_Type range CPU_First .. CPU_Last;
subtype Gen_CPU_Variant is CPU_Variant range Normal .. CPU_Var_Last;
@@ -47,14 +49,16 @@
when Ironlake => Ibex_Peak,
when Haswell => Lynx_Point,
when Broxton => No_PCH,
- when Skylake => Sunrise_Point);
+ when Skylake => Sunrise_Point,
+ when Tigerlake => Tiger_Point);
PCH_Last : constant PCH_Type :=
(case Gen is
when G45 => No_PCH,
when Ironlake => Cougar_Point,
when Haswell => Lynx_Point,
when Broxton => No_PCH,
- when Skylake => Cannon_Point);
+ when Skylake => Cannon_Point,
+ when Tigerlake => Tiger_Point);
subtype Gen_PCH_Type is PCH_Type range PCH_First .. PCH_Last;
PCH : constant Gen_PCH_Type := <<PCH>>;
@@ -138,12 +142,14 @@
Gen_Haswell : <genbool> := Gen = Haswell;
Gen_Broxton : <genbool> := Gen = Broxton;
Gen_Skylake : <genbool> := Gen = Skylake;
+ Gen_Tigerlake : <genbool> := Gen = Tigerlake;
Up_To_Ironlake : <genbool> := Gen <= Ironlake;
Ironlake_On : <genbool> := Gen >= Ironlake;
Haswell_On : <genbool> := Gen >= Haswell;
Broxton_On : <genbool> := Gen >= Broxton;
Skylake_On : <genbool> := Gen >= Skylake;
+ Tigerlake_On : <genbool> := Gen >= Tigerlake;
GMCH_GM45 : <g45bool> := Gen_G45 and then CPU = GM45;
CPU_Ironlake : <ilkbool> := Gen_Ironlake and then CPU = Ironlake;
@@ -153,6 +159,7 @@
CPU_Broadwell : <hswbool> := Gen_Haswell and then CPU = Broadwell;
CPU_Skylake : <sklbool> := Gen_Skylake and then CPU = Skylake;
CPU_Kabylake : <sklbool> := Gen_Skylake and then CPU = Kabylake;
+ CPU_Tigerlake : <tglbool> := Gen_Tigerlake;
Sandybridge_On : <ilkbool> :=
((Gen_Ironlake and then CPU >= Sandybridge) or Haswell_On);
@@ -166,6 +173,7 @@
Cougar_Point_On : <genbool> :=
((Gen_Ironlake and then PCH >= Cougar_Point) or Haswell_On);
Cannon_Point_On : <genbool> := Skylake_On and then PCH >= Cannon_Point;
+ Tiger_Point_On : <genbool> := Tigerlake_On and then PCH >= Tiger_Point;
----------------------------------------------------------------------------
@@ -175,11 +183,11 @@
Have_DVI_I : constant Boolean := Analog_I2C_Port /= PCH_DAC;
Has_Presence_Straps : <genbool> := not Gen_Broxton;
- Is_ULT : <hswsklbool> :=
- ((Gen_Haswell or Gen_Skylake) and then CPU_Var = ULT);
- Is_ULX : <hswsklbool> :=
- ((Gen_Haswell or Gen_Skylake) and then CPU_Var = ULX);
- Is_LP : <hswsklbool> := Is_ULT or Is_ULX;
+ Is_ULT : <hswskltglbool> :=
+ ((Gen_Haswell or Gen_Skylake or Gen_Tigerlake) and then CPU_Var = ULT);
+ Is_ULX : <hswskltglbool> :=
+ ((Gen_Haswell or Gen_Skylake or Gen_Tigerlake) and then CPU_Var = ULX);
+ Is_LP : <hswskltglbool> := Is_ULT or Is_ULX;
---------- CPU pipe: ---------
Has_Tertiary_Pipe : <ilkbool> := Ivybridge_On;
@@ -279,6 +287,9 @@
----------- GTT: -------------
Has_64bit_GTT : <hswbool> := Broadwell_On;
+ ----------- Type-C: ----------
+ Has_Type_C_Ports : <genbool> := Tigerlake_On;
+
----------------------------------------------------------------------------
Max_Pipe : <ilkvar> Pipe_Index :=
@@ -295,7 +306,8 @@
eDP => False,
LVDS => Gen_Ironlake,
DP1 .. HDMI3 => Gen_Ironlake,
- Analog => Has_PCH_DAC);
+ Analog => Has_PCH_DAC,
+ others => False);
type FDI_Lanes_Per_Port is array (GPU_Port) of DP_Lane_Count;
FDI_Lane_Count : constant FDI_Lanes_Per_Port :=
@@ -316,6 +328,7 @@
(if CPU_Haswell then 6
elsif CPU_Broadwell then 7
elsif Broxton_On then 8
+ elsif Tigerlake_On then 6
else 0);
----------------------------------------------------------------------------
@@ -328,6 +341,7 @@
elsif Gen_Haswell then 450_000_000
elsif Gen_Broxton then 288_000_000
elsif Gen_Skylake then 337_500_000
+ elsif Gen_Tigerlake then CDClk_Range'First -- depends on ref clk
else CDClk_Range'First);
Default_RawClk_Freq : <hswvar> Frequency_Type :=
@@ -336,6 +350,7 @@
elsif Gen_Haswell then (if Is_LP then 24_000_000 else 125_000_000)
elsif Gen_Broxton then Frequency_Type'First -- none needed
elsif Gen_Skylake then 24_000_000
+ elsif Gen_Tigerlake then 24_000_000
else Frequency_Type'First);
----------------------------------------------------------------------------
@@ -363,7 +378,7 @@
Maximum_Cursor_X : constant :=
(case Gen is
when G45 .. Ironlake => 4095,
- when Haswell .. Skylake => 8191);
+ when Haswell .. Tigerlake => 8191);
Maximum_Cursor_Y : constant := 4095;
@@ -372,9 +387,10 @@
-- FIXME: Unknown for Broxton, Linux' i915 contains a fixme too :-D
HDMI_Max_Clock_24bpp : constant Frequency_Type :=
(case Gen is
- when Generation'First .. G45 => 165_000_000,
- when Ironlake => 225_000_000,
- when Haswell .. Generation'Last => 300_000_000);
+ when Generation'First .. G45 => 165_000_000,
+ when Ironlake => 225_000_000,
+ when Haswell .. Skylake => 300_000_000,
+ when Tigerlake .. Generation'Last => 600_000_000);
----------------------------------------------------------------------------
@@ -467,6 +483,25 @@
(Device_Id and 16#ff8f#) = 16#9b86# or
(Device_Id and 16#ff8f#) = 16#9b88#);
+ -- For TGL, the distinction is UP4 (formerly Y), UP3 (U), or H (Normal),
+ -- however, the PRMs state "The Intel UHD Graphics Device ID SKUs are
+ -- unified for both UP3 and UP4, e.g. there is no unique device ID
+ -- between UP3 and UP4"
+ function Is_Tiger_Lake_U (Device_Id : Word16) return Boolean is
+ (Device_Id = 16#9a40# or
+ Device_Id = 16#9a49# or
+ Device_Id = 16#9a59# or
+ Device_Id = 16#9a78# or
+ Device_Id = 16#9ac0# or
+ Device_Id = 16#9ac9# or
+ Device_Id = 16#9ad9# or
+ Device_Id = 16#9af8#);
+
+ function Is_Tiger_Lake_H (Device_Id : Word16) return Boolean is
+ (Device_Id = 16#9a60# or
+ Device_Id = 16#9a68# or
+ Device_Id = 16#9a70#);
+
function Is_GPU (Device_Id : Word16; CPU : CPU_Type; CPU_Var : CPU_Variant)
return Boolean is
(case CPU is
@@ -500,7 +535,12 @@
when ULX =>
Is_Kaby_Lake_Y (Device_Id) or
Is_Kaby_Lake_Y_AML (Device_Id) or
- Is_Coffee_Lake_Y_AML (Device_Id)));
+ Is_Coffee_Lake_Y_AML (Device_Id)),
+ when Tigerlake => (case CPU_Var is
+ when Normal =>
+ Is_Tiger_Lake_H (Device_Id),
+ when ULT | ULX =>
+ Is_Tiger_Lake_U (Device_Id)));
function Compatible_GPU (Device_Id : Word16) return Boolean is
(Is_GPU (Device_Id, CPU, CPU_Var));
diff --git a/common/hw-gfx-gma-config_helpers.adb b/common/hw-gfx-gma-config_helpers.adb
index 2a09305..868d514 100644
--- a/common/hw-gfx-gma-config_helpers.adb
+++ b/common/hw-gfx-gma-config_helpers.adb
@@ -36,7 +36,8 @@
when HDMI1 | DP1 => DIGI_B,
when HDMI2 | DP2 => DIGI_C,
when HDMI3 | DP3 => DIGI_D,
- when Analog => VGA),
+ when Analog => VGA,
+ when others => DIGI_A), -- n/a, actually
when Ironlake => -- everything but eDP through FDI/PCH
(if Port = eDP then
DIGI_A
@@ -45,6 +46,19 @@
when Primary => DIGI_B,
when Secondary => DIGI_C,
when Tertiary => DIGI_D)),
+ when Tigerlake =>
+ (case Port is
+ when eDP => DIGI_A,
+ when HDMI1 | DP1 => DIGI_A,
+ when HDMI2 | DP2 => DIGI_B,
+ when HDMI3 | DP3 => DIGI_C,
+ when USBC1_DP | USBC1_HDMI => DDI_TC1,
+ when USBC2_DP | USBC2_HDMI => DDI_TC2,
+ when USBC3_DP | USBC3_HDMI => DDI_TC3,
+ when USBC4_DP | USBC4_HDMI => DDI_TC4,
+ when USBC5_DP | USBC5_HDMI => DDI_TC5,
+ when USBC6_DP | USBC6_HDMI => DDI_TC6,
+ when others => LVDS), -- n/a, actually
when others => -- everything but VGA directly on CPU
(case Port is
when LVDS => LVDS, -- n/a, actually
@@ -52,23 +66,39 @@
when HDMI1 | DP1 => DIGI_B,
when HDMI2 | DP2 => DIGI_C,
when HDMI3 | DP3 => DIGI_D,
- when Analog => DIGI_E));
+ when Analog => DIGI_E,
+ when others => LVDS)); -- n/a, actually
end To_GPU_Port;
function To_PCH_Port (Port : Active_Port_Type) return PCH_Port
is
begin
return
- (case Port is
- when LVDS => PCH_LVDS,
- when eDP => PCH_LVDS, -- n/a, actually
- when Analog => PCH_DAC,
- when HDMI1 => PCH_HDMI_B,
- when HDMI2 => PCH_HDMI_C,
- when HDMI3 => PCH_HDMI_D,
- when DP1 => PCH_DP_B,
- when DP2 => PCH_DP_C,
- when DP3 => PCH_DP_D);
+ (if Config.Has_Type_C_Ports
+ then
+ (case Port is
+ when HDMI1 => PCH_HDMI_A,
+ when HDMI2 => PCH_HDMI_B,
+ when HDMI3 => PCH_HDMI_C,
+ when USBC1_HDMI | USBC1_DP => PCH_TC1,
+ when USBC2_HDMI | USBC2_DP => PCH_TC2,
+ when USBC3_HDMI | USBC3_DP => PCH_TC3,
+ when USBC4_HDMI | USBC4_DP => PCH_TC4,
+ when USBC5_HDMI | USBC5_DP => PCH_TC5,
+ when USBC6_HDMI | USBC6_DP => PCH_TC6,
+ when others => PCH_LVDS) -- n/a, actually
+ else
+ (case Port is
+ when LVDS => PCH_LVDS,
+ when eDP => PCH_LVDS, -- n/a, actually
+ when Analog => PCH_DAC,
+ when HDMI1 => PCH_HDMI_B,
+ when HDMI2 => PCH_HDMI_C,
+ when HDMI3 => PCH_HDMI_D,
+ when DP1 => PCH_DP_B,
+ when DP2 => PCH_DP_C,
+ when DP3 => PCH_DP_D,
+ when others => PCH_LVDS)); -- n/a, actually
end To_PCH_Port;
function To_Display_Type (Port : Active_Port_Type) return Display_Type
@@ -76,11 +106,15 @@
begin
return Display_Type'
(case Port is
- when LVDS => LVDS,
- when eDP => DP,
- when Analog => VGA,
- when HDMI1 .. HDMI3 => HDMI,
- when DP1 .. DP3 => DP);
+ when LVDS => LVDS,
+ when eDP => DP,
+ when Analog => VGA,
+ when HDMI1 .. HDMI3 => HDMI,
+ when DP1 .. DP3 => DP,
+ when USBC1_DP | USBC2_DP | USBC3_DP |
+ USBC4_DP | USBC5_DP | USBC6_DP => DP,
+ when USBC1_HDMI | USBC2_HDMI | USBC3_HDMI |
+ USBC4_HDMI | USBC5_HDMI | USBC6_HDMI => HDMI);
end To_Display_Type;
function To_Panel (Port : Active_Port_Type) return Panel_Control
diff --git a/common/hw-gfx-gma.adb b/common/hw-gfx-gma.adb
index 4a1050e..c66fa5d 100644
--- a/common/hw-gfx-gma.adb
+++ b/common/hw-gfx-gma.adb
@@ -53,19 +53,31 @@
is
pragma Disable_Atomic_Synchronization;
- subtype Port_Name is String (1 .. 8);
+ subtype Port_Name is String (1 .. 10);
type Port_Name_Array is array (Port_Type) of Port_Name;
Port_Names : constant Port_Name_Array :=
- (Disabled => "Disabled",
- LVDS => "LVDS ",
- eDP => "eDP ",
- DP1 => "DP1 ",
- DP2 => "DP2 ",
- DP3 => "DP3 ",
- HDMI1 => "HDMI1 ",
- HDMI2 => "HDMI2 ",
- HDMI3 => "HDMI3 ",
- Analog => "Analog ");
+ (Disabled => "Disabled ",
+ LVDS => "LVDS ",
+ eDP => "eDP ",
+ DP1 => "DP1 ",
+ DP2 => "DP2 ",
+ DP3 => "DP3 ",
+ HDMI1 => "HDMI1 ",
+ HDMI2 => "HDMI2 ",
+ HDMI3 => "HDMI3 ",
+ Analog => "Analog ",
+ USBC1_DP => "USBC1-DP ",
+ USBC2_DP => "USBC2-DP ",
+ USBC3_DP => "USBC3-DP ",
+ USBC4_DP => "USBC4-DP ",
+ USBC5_DP => "USBC5-DP ",
+ USBC6_DP => "USBC6-DP ",
+ USBC1_HDMI => "USBC1-HDMI",
+ USBC2_HDMI => "USBC2-HDMI",
+ USBC3_HDMI => "USBC3-HDMI",
+ USBC4_HDMI => "USBC4-HDMI",
+ USBC5_HDMI => "USBC5-HDMI",
+ USBC6_HDMI => "USBC6-HDMI");
package Dev is new HW.PCI.Dev (PCI.Address'(0, 2, 0));
@@ -485,7 +497,7 @@
Registers.Read (Registers.G4X_AUD_VID_DID, Audio_VID_DID);
when Ironlake =>
Registers.Read (Registers.PCH_AUD_VID_DID, Audio_VID_DID);
- when Haswell .. Skylake =>
+ when Haswell .. Tigerlake =>
Registers.Read (Registers.AUD_VID_DID, Audio_VID_DID);
end case;
Success :=
@@ -500,7 +512,8 @@
(Config.CPU_Ironlake and Audio_VID_DID = 16#0000_0000#) or
(Config.Gen_G45 and (Audio_VID_DID = 16#8086_2801# or
Audio_VID_DID = 16#8086_2802# or
- Audio_VID_DID = 16#8086_2803#)));
+ Audio_VID_DID = 16#8086_2803#)) or
+ (Config.CPU_Tigerlake and (Audio_VID_DID = 16#8086_2812#)));
end Check_Platform;
procedure Check_Platform_PCI (Success : out Boolean)
diff --git a/common/hw-gfx-gma.ads b/common/hw-gfx-gma.ads
index 1282e89..37dec95 100644
--- a/common/hw-gfx-gma.ads
+++ b/common/hw-gfx-gma.ads
@@ -35,7 +35,7 @@
subtype GTT_Range is Natural range 0 .. 16#8_0000# - 1;
GTT_Rotation_Offset : constant GTT_Range := GTT_Range'Last / 2 + 1;
- type Generation is (G45, Ironlake, Haswell, Broxton, Skylake);
+ type Generation is (G45, Ironlake, Haswell, Broxton, Skylake, Tigerlake);
type CPU_Type is
(G45,
@@ -47,7 +47,8 @@
Broadwell,
Broxton,
Skylake,
- Kabylake);
+ Kabylake,
+ Tigerlake);
type CPU_Variant is (Normal, ULT, ULX);
@@ -57,7 +58,8 @@
Cougar_Point, -- Panther Point compatible
Lynx_Point, -- Wildcat Point compatible
Sunrise_Point, -- Union Point compatible
- Cannon_Point);
+ Cannon_Point,
+ Tiger_Point);
type Port_Type is
(Disabled,
@@ -69,10 +71,24 @@
HDMI1, -- or DVI
HDMI2, -- or DVI
HDMI3, -- or DVI
- Analog);
+ Analog,
+ USBC1_DP,
+ USBC2_DP,
+ USBC3_DP,
+ USBC4_DP,
+ USBC5_DP,
+ USBC6_DP,
+ USBC1_HDMI,
+ USBC2_HDMI,
+ USBC3_HDMI,
+ USBC4_HDMI,
+ USBC5_HDMI,
+ USBC6_HDMI);
subtype Active_Port_Type is Port_Type
range Port_Type'Succ (Disabled) .. Port_Type'Last;
subtype Internal_Port_Type is Port_Type range LVDS .. eDP;
+ subtype Combo_Port_Type is Port_Type range DP1 .. HDMI3;
+ subtype USBC_Port_Type is Port_Type range USBC1_DP .. USBC6_HDMI;
type Cursor_Mode is (No_Cursor, ARGB_Cursor);
type Cursor_Size is (Cursor_64x64, Cursor_128x128, Cursor_256x256);
@@ -267,19 +283,30 @@
----------------------------------------------------------------------------
-- Internal representation of a single pipe's configuration
- type GPU_Port is (DIGI_A, DIGI_B, DIGI_C, DIGI_D, DIGI_E, LVDS, VGA);
+ type GPU_Port is
+ (DIGI_A, DIGI_B, DIGI_C, DIGI_D, DIGI_E,
+ DDI_TC1, DDI_TC2, DDI_TC3, DDI_TC4, DDI_TC5, DDI_TC6,
+ LVDS, VGA);
subtype Digital_Port is GPU_Port range DIGI_A .. DIGI_E;
subtype GMCH_DP_Port is GPU_Port range DIGI_B .. DIGI_D;
subtype GMCH_HDMI_Port is GPU_Port range DIGI_B .. DIGI_C;
+ subtype Combo_Port is GPU_Port range DIGI_A .. DIGI_C;
+ subtype USBC_Port is GPU_Port range DDI_TC1 .. DDI_TC6;
+ subtype TGL_Digital_Port is GPU_Port range DIGI_A .. DDI_TC6;
+
+ function Is_Digital_Port (Port : GPU_Port) return Boolean is
+ (Port in Digital_Port or Port in TGL_Digital_Port);
type PCH_Port is
(PCH_DAC, PCH_LVDS,
- PCH_HDMI_B, PCH_HDMI_C, PCH_HDMI_D,
- PCH_DP_B, PCH_DP_C, PCH_DP_D);
+ PCH_HDMI_A, PCH_HDMI_B, PCH_HDMI_C, PCH_HDMI_D,
+ PCH_DP_B, PCH_DP_C, PCH_DP_D,
+ PCH_TC1, PCH_TC2, PCH_TC3, PCH_TC4, PCH_TC5, PCH_TC6);
- subtype PCH_HDMI_Port is PCH_Port range PCH_HDMI_B .. PCH_HDMI_D;
+ subtype PCH_HDMI_Port is PCH_Port range PCH_HDMI_A .. PCH_HDMI_D;
subtype PCH_DP_Port is PCH_Port range PCH_DP_B .. PCH_DP_D;
+ subtype PCH_TC_Port is PCH_Port range PCH_TC1 .. PCH_TC6;
type Panel_Control is (No_Panel, Panel_1, Panel_2);
subtype Valid_Panels is Panel_Control range Panel_1 .. Panel_2;
diff --git a/common/ironlake/hw-gfx-gma-connectors.adb b/common/ironlake/hw-gfx-gma-connectors.adb
index 5970ea5..1c3a243 100644
--- a/common/ironlake/hw-gfx-gma-connectors.adb
+++ b/common/ironlake/hw-gfx-gma-connectors.adb
@@ -85,7 +85,7 @@
PCH.VGA.On (FDI_Port, Port_Cfg.Mode);
elsif Port_Cfg.PCH_Port = PCH_LVDS then
PCH.LVDS.On (Port_Cfg, FDI_Port);
- elsif Port_Cfg.PCH_Port in PCH_HDMI_Port then
+ elsif Port_Cfg.PCH_Port in PCH.HDMI.IRL_PCH_HDMI_Port then
PCH.HDMI.On (Port_Cfg, FDI_Port);
elsif Port_Cfg.PCH_Port in PCH_DP_Port then
PCH.DP.On (Port_Cfg, FDI_Port, Success);
@@ -137,7 +137,7 @@
PCH.VGA.Off;
elsif Port_Cfg.PCH_Port = PCH_LVDS then
PCH.LVDS.Off;
- elsif Port_Cfg.PCH_Port in PCH_HDMI_Port then
+ elsif Port_Cfg.PCH_Port in PCH.HDMI.IRL_PCH_HDMI_Port then
PCH.HDMI.Off (Port_Cfg.PCH_Port);
end if;
PCH.Transcoder.Off (FDI_Port);
diff --git a/common/ironlake/hw-gfx-gma-pch-hdmi.adb b/common/ironlake/hw-gfx-gma-pch-hdmi.adb
index 15d4e9f..47a500c 100644
--- a/common/ironlake/hw-gfx-gma-pch-hdmi.adb
+++ b/common/ironlake/hw-gfx-gma-pch-hdmi.adb
@@ -39,7 +39,7 @@
PCH_HDMI_HSYNC_ACTIVE_HIGH or
PCH_HDMI_VSYNC_ACTIVE_HIGH);
- type PCH_HDMI_Array is array (PCH_HDMI_Port) of Registers.Registers_Index;
+ type PCH_HDMI_Array is array (IRL_PCH_HDMI_Port) of Registers.Registers_Index;
PCH_HDMI : constant PCH_HDMI_Array := PCH_HDMI_Array'
(PCH_HDMI_B => Registers.PCH_HDMIB,
PCH_HDMI_C => Registers.PCH_HDMIC,
@@ -74,7 +74,7 @@
----------------------------------------------------------------------------
- procedure Off (Port : PCH_HDMI_Port)
+ procedure Off (Port : IRL_PCH_HDMI_Port)
is
With_Transcoder_B_Enabled : Boolean := False;
begin
@@ -115,7 +115,7 @@
begin
pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
- for Port in PCH_HDMI_Port loop
+ for Port in IRL_PCH_HDMI_Port loop
Off (Port);
end loop;
end All_Off;
diff --git a/common/ironlake/hw-gfx-gma-pch-hdmi.ads b/common/ironlake/hw-gfx-gma-pch-hdmi.ads
index 31d9564..1193711 100644
--- a/common/ironlake/hw-gfx-gma-pch-hdmi.ads
+++ b/common/ironlake/hw-gfx-gma-pch-hdmi.ads
@@ -14,12 +14,13 @@
package HW.GFX.GMA.PCH.HDMI
is
+ subtype IRL_PCH_HDMI_Port is PCH_HDMI_Port range PCH_HDMI_B .. PCH_HDMI_D;
procedure On (Port_Cfg : Port_Config; FDI_Port : FDI_Port_Type)
with
- Pre => Port_Cfg.PCH_Port in PCH_HDMI_Port;
+ Pre => Port_Cfg.PCH_Port in IRL_PCH_HDMI_Port;
- procedure Off (Port : PCH_HDMI_Port);
+ procedure Off (Port : IRL_PCH_HDMI_Port);
procedure All_Off;
end HW.GFX.GMA.PCH.HDMI;
diff --git a/common/ironlake/hw-gfx-gma-port_detect.adb b/common/ironlake/hw-gfx-gma-port_detect.adb
index 7efadeb..599c2cd 100644
--- a/common/ironlake/hw-gfx-gma-port_detect.adb
+++ b/common/ironlake/hw-gfx-gma-port_detect.adb
@@ -15,6 +15,7 @@
with HW.GFX.GMA.Config;
with HW.GFX.GMA.Registers;
with HW.GFX.GMA.Config_Helpers;
+with HW.GFX.GMA.PCH.HDMI;
package body HW.GFX.GMA.Port_Detect
is
@@ -25,7 +26,7 @@
SHOTPLUG_CTL_DETECT_MASK : constant := 16#0003_0303#;
- type PCH_Digital_Port_Value is array (PCH_HDMI_Port) of Word32;
+ type PCH_Digital_Port_Value is array (PCH.HDMI.IRL_PCH_HDMI_Port) of Word32;
SHOTPLUG_CTL_HPD_INPUT_ENABLE : constant PCH_Digital_Port_Value :=
(PCH_HDMI_B => 1 * 2 ** 4,
PCH_HDMI_C => 1 * 2 ** 12,
@@ -43,7 +44,7 @@
PCH_HDMI_C => 1 * 2 ** 9,
PCH_HDMI_D => 1 * 2 ** 17);
- type PCH_Digital_Regs is array (PCH_HDMI_Port) of Registers.Registers_Index;
+ type PCH_Digital_Regs is array (PCH.HDMI.IRL_PCH_HDMI_Port) of Registers.Registers_Index;
PCH_HDMI : constant PCH_Digital_Regs :=
(PCH_HDMI_B => Registers.PCH_HDMIB,
PCH_HDMI_C => Registers.PCH_HDMIC,
@@ -60,7 +61,7 @@
HDMI_Detected,
DP_Detected : Boolean;
- type PCH_Port_To_GMA_Port is array (PCH_HDMI_Port) of Port_Type;
+ type PCH_Port_To_GMA_Port is array (PCH.HDMI.IRL_PCH_HDMI_Port) of Port_Type;
To_Digital_Port : constant PCH_Port_To_GMA_Port :=
(PCH_HDMI_B => HDMI1,
PCH_HDMI_C => HDMI2,
@@ -87,7 +88,7 @@
Config.Valid_Port (eDP) := eDP_Detected;
-- PCH_HDMI_[BCD], PCH_DP_[BCD] share hotplug registers
- for PCH_Port in PCH_HDMI_Port loop
+ for PCH_Port in PCH.HDMI.IRL_PCH_HDMI_Port loop
Registers.Is_Set_Mask
(Register => PCH_HDMI (PCH_Port),
Mask => PCH_DIGI_PORT_DETECTED,
diff --git a/common/tigerlake/Makefile.inc b/common/tigerlake/Makefile.inc
new file mode 100644
index 0000000..b99a57e
--- /dev/null
+++ b/common/tigerlake/Makefile.inc
@@ -0,0 +1,6 @@
+gfxinit-y += hw-gfx-gma-power_and_clocks.adb
+gfxinit-y += hw-gfx-gma-power_and_clocks.ads
+gfxinit-y += hw-gfx-gma-connectors.adb
+gfxinit-y += hw-gfx-gma-port_detect.adb
+gfxinit-y += hw-gfx-gma-plls.adb
+gfxinit-y += hw-gfx-gma-plls.ads
diff --git a/common/tigerlake/hw-gfx-gma-connectors.adb b/common/tigerlake/hw-gfx-gma-connectors.adb
new file mode 100644
index 0000000..5e66b96
--- /dev/null
+++ b/common/tigerlake/hw-gfx-gma-connectors.adb
@@ -0,0 +1,80 @@
+--
+-- Copyright (C) 2022 Google, LLC
+--
+-- This program is free software; you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation; either version 2 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+
+with HW.GFX.GMA.Config;
+with HW.GFX.GMA.Panel;
+
+with HW.Debug;
+with GNAT.Source_Info;
+
+package body HW.GFX.GMA.Connectors is
+
+ procedure Post_Reset_Off is
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+ end Post_Reset_Off;
+
+ procedure Initialize is
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+ end Initialize;
+
+ procedure Pre_On
+ (Pipe : in Pipe_Index;
+ Port_Cfg : in Port_Config;
+ PLL_Hint : in Word32;
+ Success : out Boolean) is
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+ Success := True;
+ end Pre_On;
+
+ procedure Post_On
+ (Pipe : in Pipe_Index;
+ Port_Cfg : in Port_Config;
+ PLL_Hint : in Word32;
+ Success : out Boolean) is
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+ Panel.Backlight_On (Port_Cfg.Panel);
+ Success := True;
+ end Post_On;
+
+ procedure Pre_Off (Port_Cfg : Port_Config) is
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+ Panel.Backlight_Off (Port_Cfg.Panel);
+ Panel.Off (Port_Cfg.Panel);
+ end Pre_Off;
+
+ procedure Post_Off (Port_Cfg : Port_Config) is
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+ end Post_Off;
+
+ procedure Pre_All_Off is
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+ for P in Valid_Panels loop
+ Panel.Backlight_Off (P);
+ Panel.Off (P);
+ end loop;
+ end Pre_All_Off;
+
+ procedure Post_All_Off is
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+ end Post_All_Off;
+
+end HW.GFX.GMA.Connectors;
diff --git a/common/tigerlake/hw-gfx-gma-plls.adb b/common/tigerlake/hw-gfx-gma-plls.adb
new file mode 100644
index 0000000..bf58f57
--- /dev/null
+++ b/common/tigerlake/hw-gfx-gma-plls.adb
@@ -0,0 +1,67 @@
+--
+-- Copyright (C) 2022 Google, LLC
+--
+-- This program is free software; you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation; either version 2 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+
+with HW.Debug;
+with GNAT.Source_Info;
+
+package body HW.GFX.GMA.PLLs
+with
+ Refined_State => (State => PLLs)
+is
+
+ type Count_Range is new Natural range 0 .. 2;
+
+ type PLL_State is record
+ Use_Count : Count_Range;
+ end record;
+
+ type PLL_State_Array is array (Configurable_DPLLs) of PLL_State;
+ PLLs : PLL_State_Array;
+
+ procedure Initialize is
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+ PLLs :=
+ (Configurable_DPLLs =>
+ (Use_Count => 0));
+ end Initialize;
+
+ procedure Alloc
+ (Port_Cfg : in Port_Config;
+ PLL : out T;
+ Success : out Boolean)
+ is
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+ PLL := Invalid_PLL;
+ Success := True;
+ end Alloc;
+
+ procedure Free (PLL : T) is
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+ end Free;
+
+ procedure All_Off is
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+ end All_Off;
+
+ function Register_Value (PLL : T) return Word32
+ is
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+ Return 0;
+ end Register_Value;
+end HW.GFX.GMA.PLLs;
diff --git a/common/tigerlake/hw-gfx-gma-plls.ads b/common/tigerlake/hw-gfx-gma-plls.ads
new file mode 100644
index 0000000..3e55044
--- /dev/null
+++ b/common/tigerlake/hw-gfx-gma-plls.ads
@@ -0,0 +1,53 @@
+--
+-- Copyright (C) 2022 Google, LLC
+--
+-- This program is free software; you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation; either version 2 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+
+private package HW.GFX.GMA.PLLs
+with
+ Abstract_State => (State with Part_Of => GMA.State)
+is
+
+ -- XXX: Types should be private (but that triggers a bug in SPARK GPL 2016)
+ type T is (Invalid_PLL, DPLL0, DPLL1, DPLL4, DPLL2);
+ subtype Configurable_DPLLs is T range DPLL0 .. DPLL4;
+ Invalid : constant T := Invalid_PLL;
+
+ procedure Initialize
+ with
+ Global => (Output => State);
+
+ pragma Warnings (Off, "unused variable ""Port_Cfg""",
+ Reason => "Not yet implemented.");
+ procedure Alloc
+ (Port_Cfg : in Port_Config;
+ PLL : out T;
+ Success : out Boolean);
+ pragma Warnings (On, "unused variable ""Port_Cfg""");
+
+
+ pragma Warnings (Off, "subprogram ""Free"" has no effect",
+ Reason => "Not yet implemented.");
+ procedure Free (PLL : T);
+ pragma Warnings (On, "subprogram ""Free"" has no effect");
+
+ pragma Warnings (Off, "subprogram ""All_Off"" has no effect",
+ Reason => "Not yet implemented.");
+ procedure All_Off;
+ pragma Warnings (On, "subprogram ""All_Off"" has no effect");
+
+ pragma Warnings (Off, "unused variable ""PLL""",
+ Reason => "Not yet implemented.");
+ function Register_Value (PLL : T) return Word32;
+ pragma Warnings (On, "unused variable ""PLL""");
+
+end HW.GFX.GMA.PLLs;
diff --git a/common/tigerlake/hw-gfx-gma-port_detect.adb b/common/tigerlake/hw-gfx-gma-port_detect.adb
new file mode 100644
index 0000000..a0bad14
--- /dev/null
+++ b/common/tigerlake/hw-gfx-gma-port_detect.adb
@@ -0,0 +1,47 @@
+--
+-- Copyright (C) Google, LLC
+--
+-- This program is free software; you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation; either version 2 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+
+with HW.GFX.GMA.Config;
+with HW.GFX.GMA.Registers;
+with HW.GFX.GMA.Config_Helpers;
+
+with HW.Debug;
+with GNAT.Source_Info;
+
+package body HW.GFX.GMA.Port_Detect
+is
+ procedure Initialize is
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+ end Initialize;
+
+ pragma Warnings (Off, "unused variable ""Port""",
+ Reason => "Not yet implemented.");
+ procedure Hotplug_Detect
+ (Port : in Active_Port_Type;
+ Detected : out Boolean)
+ is
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+ Detected := False;
+ end Hotplug_Detect;
+ pragma Warnings (On, "unused variable ""Port""");
+
+ procedure Clear_Hotplug_Detect (Port : Active_Port_Type)
+ is
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+ end Clear_Hotplug_Detect;
+
+end HW.GFX.GMA.Port_Detect;
diff --git a/common/tigerlake/hw-gfx-gma-power_and_clocks.adb b/common/tigerlake/hw-gfx-gma-power_and_clocks.adb
new file mode 100644
index 0000000..0a78217
--- /dev/null
+++ b/common/tigerlake/hw-gfx-gma-power_and_clocks.adb
@@ -0,0 +1,66 @@
+--
+-- Copyright (C) 2022 Google, LLC
+--
+-- This program is free software; you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation; either version 2 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+
+with HW.Debug;
+with GNAT.Source_Info;
+
+with HW.GFX.GMA.Config;
+
+package body HW.GFX.GMA.Power_And_Clocks is
+
+ procedure Pre_All_Off is
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+ end Pre_All_Off;
+
+ procedure Post_All_Off is
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+ end Post_All_Off;
+
+ procedure Initialize is
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+ end Initialize;
+
+ procedure Limit_Dotclocks
+ (Configs : in out Pipe_Configs;
+ CDClk_Switch : out Boolean) is
+ begin
+ CDClk_Switch := False;
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+ end Limit_Dotclocks;
+
+ procedure Update_CDClk (Configs : in out Pipe_Configs) is
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+ end Update_CDClk;
+
+ procedure Power_Set_To (Configs : Pipe_Configs) is
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+ end Power_Set_To;
+
+ procedure Power_Up (Old_Configs, New_Configs : Pipe_Configs) is
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+ end Power_Up;
+
+ procedure Power_Down (Old_Configs, Tmp_Configs, New_Configs : Pipe_Configs)
+ is
+ begin
+ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity));
+ end Power_Down;
+
+end HW.GFX.GMA.Power_And_Clocks;
diff --git a/common/tigerlake/hw-gfx-gma-power_and_clocks.ads b/common/tigerlake/hw-gfx-gma-power_and_clocks.ads
new file mode 100644
index 0000000..72854e8
--- /dev/null
+++ b/common/tigerlake/hw-gfx-gma-power_and_clocks.ads
@@ -0,0 +1,44 @@
+--
+-- Copyright (C) 2022 Google, LLC
+--
+-- This program is free software; you can redistribute it and/or modify
+-- it under the terms of the GNU General Public License as published by
+-- the Free Software Foundation; either version 2 of the License, or
+-- (at your option) any later version.
+--
+-- This program is distributed in the hope that it will be useful,
+-- but WITHOUT ANY WARRANTY; without even the implied warranty of
+-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+-- GNU General Public License for more details.
+--
+
+with HW.GFX.GMA.Config_Helpers;
+
+private package HW.GFX.GMA.Power_And_Clocks is
+
+ pragma Warnings (Off, "subprogram ""*"" has no effect",
+ Reason => "Not yet implemented.");
+ procedure Pre_All_Off;
+ procedure Post_All_Off;
+
+ procedure Initialize;
+
+ pragma Warnings (Off, """Configs"" is not modified, could be IN",
+ Reason => "Not yet implemented.");
+ procedure Limit_Dotclocks
+ (Configs : in out Pipe_Configs;
+ CDClk_Switch : out Boolean)
+ with
+ Post => Config_Helpers.Stable_FB (Configs'Old, Configs);
+ procedure Update_CDClk (Configs : in out Pipe_Configs)
+ with
+ Post => Config_Helpers.Stable_FB (Configs'Old, Configs);
+ pragma Warnings (On, """Configs"" is not modified, could be IN");
+ procedure Enable_CDClk is null;
+
+ procedure Power_Set_To (Configs : Pipe_Configs);
+ procedure Power_Up (Old_Configs, New_Configs : Pipe_Configs);
+ procedure Power_Down (Old_Configs, Tmp_Configs, New_Configs : Pipe_Configs);
+ pragma Warnings (On, "subprogram ""*"" has no effect");
+
+end HW.GFX.GMA.Power_And_Clocks;
diff --git a/configs/tigerlake b/configs/tigerlake
new file mode 100644
index 0000000..e28e818
--- /dev/null
+++ b/configs/tigerlake
@@ -0,0 +1,6 @@
+CONFIG_GFX_GMA_DYN_CPU = y
+CONFIG_GFX_GMA_GENERATION = Tigerlake
+CONFIG_GFX_GMA_PCH = Tiger_Point
+CONFIG_GFX_GMA_PANEL_1_PORT = eDP
+CONFIG_GFX_GMA_ANALOG_I2C_PORT = PCH_DAC # N/A
+CONFIG_GFX_GMA_DEFAULT_MMIO = 16\#e000_0000\#