gma skl: Disable DDI clocks on reset path
After reset DPLL_CTRL2 is initialized to 0. Which means some clock
disable bits are not set and might cause some hassle later. Set them
and close the related TODO.
Change-Id: I1a470dff55e317e8119906b3e397f6f2314abcbd
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/20648
Tested-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
diff --git a/common/haswell_shared/hw-gfx-gma-connectors-ddi.ads b/common/haswell_shared/hw-gfx-gma-connectors-ddi.ads
index 4ccd995..ec1fce2 100644
--- a/common/haswell_shared/hw-gfx-gma-connectors-ddi.ads
+++ b/common/haswell_shared/hw-gfx-gma-connectors-ddi.ads
@@ -28,6 +28,8 @@
procedure Off (Port : Digital_Port);
+ procedure Post_Reset_Off;
+
private
type Buf_Trans_Range is range 0 .. 19;
type Buf_Trans_Array is array (Buf_Trans_Range) of Word32;