gma skl: Disable DDI clocks on reset path
After reset DPLL_CTRL2 is initialized to 0. Which means some clock
disable bits are not set and might cause some hassle later. Set them
and close the related TODO.
Change-Id: I1a470dff55e317e8119906b3e397f6f2314abcbd
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/20648
Tested-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
diff --git a/TODO b/TODO
index 505d2db..a122c82 100644
--- a/TODO
+++ b/TODO
@@ -4,6 +4,4 @@
low LVDS 8bit colors, data format???
-medium SKL check if DPLL_CTRL2 really defaults to `Clock Off` => 0
-
medium gfxtest take care of our own framebuffer mapping
diff --git a/common/haswell_shared/hw-gfx-gma-connectors-ddi.adb b/common/haswell_shared/hw-gfx-gma-connectors-ddi.adb
index 0fc4ad9..fa62a98 100644
--- a/common/haswell_shared/hw-gfx-gma-connectors-ddi.adb
+++ b/common/haswell_shared/hw-gfx-gma-connectors-ddi.adb
@@ -747,4 +747,18 @@
end if;
end Off;
+ ----------------------------------------------------------------------------
+
+ procedure Post_Reset_Off
+ is
+ Clocks_Off : Word32 := 0;
+ begin
+ if not Config.Has_Per_DDI_Clock_Sel and not Config.Has_DDI_PHYs then
+ for Port in Digital_Port loop
+ Clocks_Off := Clocks_Off or DPLL_CTRL2_DDIx_CLOCK_OFF (Port);
+ end loop;
+ Registers.Set_Mask (Registers.DPLL_CTRL2, Clocks_Off);
+ end if;
+ end Post_Reset_Off;
+
end HW.GFX.GMA.Connectors.DDI;
diff --git a/common/haswell_shared/hw-gfx-gma-connectors-ddi.ads b/common/haswell_shared/hw-gfx-gma-connectors-ddi.ads
index 4ccd995..ec1fce2 100644
--- a/common/haswell_shared/hw-gfx-gma-connectors-ddi.ads
+++ b/common/haswell_shared/hw-gfx-gma-connectors-ddi.ads
@@ -28,6 +28,8 @@
procedure Off (Port : Digital_Port);
+ procedure Post_Reset_Off;
+
private
type Buf_Trans_Range is range 0 .. 19;
type Buf_Trans_Array is array (Buf_Trans_Range) of Word32;
diff --git a/common/haswell_shared/hw-gfx-gma-connectors.adb b/common/haswell_shared/hw-gfx-gma-connectors.adb
index f5e2e01..eb080e8 100644
--- a/common/haswell_shared/hw-gfx-gma-connectors.adb
+++ b/common/haswell_shared/hw-gfx-gma-connectors.adb
@@ -21,6 +21,12 @@
package body HW.GFX.GMA.Connectors is
+ procedure Post_Reset_Off
+ is
+ begin
+ DDI.Post_Reset_Off;
+ end Post_Reset_Off;
+
procedure Initialize
is
begin
diff --git a/common/hw-gfx-gma-connectors.ads b/common/hw-gfx-gma-connectors.ads
index 30a382f..134b076 100644
--- a/common/hw-gfx-gma-connectors.ads
+++ b/common/hw-gfx-gma-connectors.ads
@@ -14,10 +14,11 @@
private package HW.GFX.GMA.Connectors is
- pragma Warnings (GNATprove, Off, "subprogram ""Initialize"" has no effect",
+ pragma Warnings (GNATprove, Off, "subprogram ""*"" has no effect",
Reason => "Only effects some platforms");
+ procedure Post_Reset_Off;
procedure Initialize;
- pragma Warnings (GNATprove, On, "subprogram ""Initialize"" has no effect");
+ pragma Warnings (GNATprove, On, "subprogram ""*"" has no effect");
pragma Warnings (GNATprove, Off, "unused variable ""P*""",
Reason => "Needed for a common interface");
diff --git a/common/hw-gfx-gma.adb b/common/hw-gfx-gma.adb
index b3818a3..99a1276 100644
--- a/common/hw-gfx-gma.adb
+++ b/common/hw-gfx-gma.adb
@@ -408,8 +408,10 @@
Registers.Clear_Fences;
else
-- According to PRMs, VGA plane is the only thing
- -- that's enabled by default after reset.
+ -- that's enabled by default after reset...
Display_Controller.Legacy_VGA_Off;
+ -- ... along with some DDI port bits since Skylake.
+ Connectors.Post_Reset_Off;
end if;
-------------------- Now restart from a clean state ---------------------
diff --git a/common/ironlake/hw-gfx-gma-connectors.adb b/common/ironlake/hw-gfx-gma-connectors.adb
index 8ae47fd..f18f64f 100644
--- a/common/ironlake/hw-gfx-gma-connectors.adb
+++ b/common/ironlake/hw-gfx-gma-connectors.adb
@@ -29,11 +29,8 @@
package body HW.GFX.GMA.Connectors
is
- procedure Initialize
- is
- begin
- null;
- end Initialize;
+ procedure Post_Reset_Off is null;
+ procedure Initialize is null;
function Is_Internal (Port_Cfg : Port_Config) return Boolean
is