gma config, port detection: Scatter Valid_Port initialization

We did overwrite most the default values for `Config.Valid_Port` anyway.
So move the few remaining defaults where they are visible together with
the other runtime settings.

Change-Id: I17df08de0aa1ffb303646ea564c100bb702407f5
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/libgfxinit/+/27047
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
diff --git a/common/g45/hw-gfx-gma-port_detect.adb b/common/g45/hw-gfx-gma-port_detect.adb
index c865079..479b626 100644
--- a/common/g45/hw-gfx-gma-port_detect.adb
+++ b/common/g45/hw-gfx-gma-port_detect.adb
@@ -73,6 +73,8 @@
          DIGI_D => DP3);
 
    begin
+      Config.Valid_Port (Analog) := True;
+      Config.Valid_Port (Internal) := Config.Internal_Is_LVDS;
       for HDMI_Port in GMCH_HDMI_Port loop
          Registers.Is_Set_Mask
            (Register => GMCH_HDMI (HDMI_Port),
diff --git a/common/haswell_shared/hw-gfx-gma-port_detect.adb b/common/haswell_shared/hw-gfx-gma-port_detect.adb
index be83bd5..50c14cd 100644
--- a/common/haswell_shared/hw-gfx-gma-port_detect.adb
+++ b/common/haswell_shared/hw-gfx-gma-port_detect.adb
@@ -135,10 +135,8 @@
          else
             DDI_Detected := True;
          end if;
-         Config.Valid_Port (To_HDMI_Port (Port)) :=
-            Config.Valid_Port (To_HDMI_Port (Port)) and DDI_Detected;
-         Config.Valid_Port (To_DP_Port (Port)) :=
-            Config.Valid_Port (To_DP_Port (Port)) and DDI_Detected;
+         Config.Valid_Port (To_HDMI_Port (Port)) := DDI_Detected;
+         Config.Valid_Port (To_DP_Port (Port)) := DDI_Detected;
 
          if DDI_Detected then
             Registers.Unset_And_Set_Mask
diff --git a/common/hw-gfx-gma-config.ads.template b/common/hw-gfx-gma-config.ads.template
index a922b05..150937d 100644
--- a/common/hw-gfx-gma-config.ads.template
+++ b/common/hw-gfx-gma-config.ads.template
@@ -14,7 +14,7 @@
 
 private package HW.GFX.GMA.Config
 with
-   Initializes => (Valid_Port_GPU, Raw_Clock)
+   Initializes => (Valid_Port, Raw_Clock)
 is
 
    CPU : constant CPU_Type := <<CPU>>;
@@ -38,6 +38,7 @@
    Default_MMIO_Base_Set   : constant Boolean := Default_MMIO_Base /= 0;
 
    Has_Internal_Display    : constant Boolean := Internal_Display /= None;
+   Internal_Is_LVDS        : constant Boolean := Internal_Display = LVDS;
    Internal_Is_EDP         : constant Boolean := Internal_Display = DP;
    Have_DVI_I              : constant Boolean := Analog_I2C_Port /= PCH_DAC;
    Has_Presence_Straps     : constant Boolean := CPU /= Broxton;
@@ -136,55 +137,9 @@
    Max_Pipe : constant Pipe_Index :=
      (if Has_Tertiary_Pipe then Tertiary else Secondary);
 
-   type Valid_Per_Port is array (Port_Type) of Boolean;
-   type Valid_Per_GPU is array (CPU_Type) of Valid_Per_Port;
-   Valid_Port_GPU : Valid_Per_GPU :=
-     (G45         =>
-        (Disabled => False,
-         Internal => Config.Internal_Display = LVDS,
-         HDMI3    => False,
-         others   => True),
-      Ironlake    =>
-        (Disabled => False,
-         Internal => Config.Internal_Display = LVDS,
-         others   => True),
-      Sandybridge =>
-        (Disabled => False,
-         Internal => Config.Internal_Display = LVDS,
-         others   => True),
-      Ivybridge   =>
-        (Disabled => False,
-         Internal => Config.Internal_Display /= None,
-         others   => True),
-      Haswell     =>
-        (Disabled => False,
-         Internal => Config.Internal_Display = DP,
-         HDMI3    => CPU_Var = Normal,
-         DP3      => CPU_Var = Normal,
-         Analog   => CPU_Var = Normal,
-         others   => True),
-      Broadwell   =>
-        (Disabled => False,
-         Internal => Config.Internal_Display = DP,
-         HDMI3    => CPU_Var = Normal,
-         DP3      => CPU_Var = Normal,
-         Analog   => CPU_Var = Normal,
-         others   => True),
-      Broxton     =>
-        (Internal => Config.Internal_Display = DP,
-         DP1      => True,
-         DP2      => True,
-         HDMI1    => True,
-         HDMI2    => True,
-         others   => False),
-      Skylake     =>
-        (Disabled => False,
-         Internal => Config.Internal_Display = DP,
-         Analog   => False,
-         others   => True))
+   Valid_Port : array (Port_Type) of Boolean := (others => False)
    with
       Part_Of => GMA.Config_State;
-   Valid_Port : Valid_Per_Port renames Valid_Port_GPU (CPU);
 
    Last_Digital_Port : constant Digital_Port :=
      (if Has_DDI_E then DIGI_E else DIGI_C);
@@ -195,7 +150,7 @@
    Is_FDI_Port : constant FDI_Per_Port :=
      (case CPU is
          when Ironlake .. Ivybridge => FDI_Per_Port'
-           (Internal => Internal_Display = LVDS,
+           (Internal => Internal_Is_LVDS,
             others   => True),
          when Haswell .. Broadwell => FDI_Per_Port'
            (Analog   => Has_PCH_DAC,
diff --git a/common/hw-gfx-gma.adb b/common/hw-gfx-gma.adb
index a443132..b3d9362 100644
--- a/common/hw-gfx-gma.adb
+++ b/common/hw-gfx-gma.adb
@@ -44,7 +44,7 @@
          HPD_Delay, Wait_For_HPD,
          Linear_FB_Base),
       Init_State => Initialized,
-      Config_State => (Config.Valid_Port_GPU, Config.Raw_Clock),
+      Config_State => (Config.Valid_Port, Config.Raw_Clock),
       Device_State =>
         (Dev.PCI_State, Registers.Register_State, Registers.GTT_State))
 is
@@ -371,7 +371,7 @@
    with
       Refined_Global =>
         (In_Out =>
-           (Config.Valid_Port_GPU, Dev.PCI_State,
+           (Config.Valid_Port, Dev.PCI_State,
             Registers.Register_State, Port_IO.State,
             Config.Raw_Clock),
          Input =>
diff --git a/common/ironlake/hw-gfx-gma-port_detect.adb b/common/ironlake/hw-gfx-gma-port_detect.adb
index 900c505..5af2e84 100644
--- a/common/ironlake/hw-gfx-gma-port_detect.adb
+++ b/common/ironlake/hw-gfx-gma-port_detect.adb
@@ -69,6 +69,8 @@
          PCH_HDMI_C => DP2,
          PCH_HDMI_D => DP3);
    begin
+      Config.Valid_Port (Analog) := True;
+
       case Config.Internal_Display is
          when LVDS =>
             -- PCH_LVDS